Patents by Inventor Mark E. Tuttle

Mark E. Tuttle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10141259
    Abstract: Semiconductor devices having one or more vias filled with a transparent and electrically conductive material are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die stacked over a second semiconductor die. The first semiconductor die can include at least one via that is axially aligned with a corresponding via of the second semiconductor die. The vias of the first and second semiconductor dies can be filled with a transparent and electrically conductive material that both electrically and optically couples the first and second semiconductor dies.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 27, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Eiichi Nakano, Mark E. Tuttle
  • Patent number: 10103038
    Abstract: Semiconductor devices having a semiconductor die electrically coupled to a redistribution structure and a molded material over the redistribution structure are disclosed herein, along with associated systems and methods. In one embodiment, a semiconductor device includes a semiconductor die attached to a first side of a substrate-free redistribution structure, and a plurality of conductive columns extending through a molded material disposed on the first side of the redistribution structure. The semiconductor device can also include a second redistribution structure on the molded material and electrically coupled to the conductive columns. A semiconductor device can be manufactured using a single carrier and requiring processing on only a single side of the semiconductor device.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: October 16, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Chan H. Yoo, John F. Kaeding, Ashok Pachamuthu, Mark E. Tuttle
  • Patent number: 9570350
    Abstract: Microfeature workpieces having interconnects and conductive backplanes and associated systems and methods are disclosed herein. One such device includes a semiconductor substrate having integrated circuitry and terminals electrically coupled to the integrated circuitry. The device also includes electrically conductive interconnects extending through at least a portion of the semiconductor substrate and electrically coupled to corresponding terminals. The device further includes a conductive backplane assembly having a conductive layer at a back side of the semiconductor substrate. One or more of the interconnects are electrically coupled to the conductive layer at the back side of the semiconductor substrate.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: February 14, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Mark E. Tuttle
  • Publication number: 20150303110
    Abstract: Microfeature workpieces having interconnects and conductive backplanes and associated systems and methods are disclosed herein. One such device includes a semiconductor substrate having integrated circuitry and terminals electrically coupled to the integrated circuitry. The device also includes electrically conductive interconnects extending through at least a portion of the semiconductor substrate and electrically coupled to corresponding terminals. The device further includes a conductive backplane assembly having a conductive layer at a back side of the semiconductor substrate. One or more of the interconnects are electrically coupled to the conductive layer at the back side of the semiconductor substrate.
    Type: Application
    Filed: July 1, 2015
    Publication date: October 22, 2015
    Inventor: Mark E. Tuttle
  • Patent number: 9153614
    Abstract: Non-symmetrically located lenses are employed with semiconductor devices comprising optically active regions which are non-symmetrically located on a surface thereof. The optical axes of the lenses are aligned with the centers of the optically active regions. Wafer-level assemblies of semiconductor devices and lenses may be fabricated, mutually secured with the non-symmetrically placed lenses aligned over the non-symmetrically placed optically active regions, and singulated to form packages, such as image sensor packages. Related methods, and systems incorporating devices with non-symmetrically placed optically active regions and aligned lenses are also disclosed.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: October 6, 2015
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Mark E. Tuttle
  • Patent number: 9099539
    Abstract: Microfeature workpieces having interconnects and conductive backplanes and associated systems and methods are disclosed herein. One such device includes a semiconductor substrate having integrated circuitry and terminals electrically coupled to the integrated circuitry. The device also includes electrically conductive interconnects extending through at least a portion of the semiconductor substrate and electrically coupled to corresponding terminals. The device further includes a conductive backplane assembly having a conductive layer at a back side of the semiconductor substrate. One or more of the interconnects are electrically coupled to the conductive layer at the back side of the semiconductor substrate.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: August 4, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Mark E. Tuttle
  • Patent number: 8736028
    Abstract: The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the substrate, and forming an aperture through the passivation layer and the pad using a substantially continuous process. An insulative layer is deposited in the aperture followed by a conductive layer and a conductive fill. In another embodiment of the invention, a semiconductor device is formed including a first interconnect structure that extends through a conductive pad and is electrically coupled with the conductive pad while a second interconnect structure is formed through another conductive pad while being electrically isolated therefrom. Semiconductor devices and assemblies produced with the methods are also disclosed.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: May 27, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Mark E. Tuttle
  • Patent number: 8669179
    Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: March 11, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, Charles M. Watkins, William M. Hiatt, David R. Hembree, James M. Wark, Warren M. Farnworth, Mark E. Tuttle, Sidney B. Rigg, Steven D. Oliver, Kyle K. Kirby, Alan G. Wood, Lu Velicky
  • Publication number: 20140035730
    Abstract: A batch comprises separate units of objects that are physically joined together. RFID tags are attached to each of the units and to the batch. The codes stored in the RFID tags are electrically associated with one another in the database.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 6, 2014
    Inventors: Ross R. Dando, Mark E. Tuttle
  • Patent number: 8643474
    Abstract: Methods and apparatus, including computer program products, for a computer with a radio frequency identification (RFID) reader. A system includes a processor, a store of codes representing goods and services cross-referenced to supplemental information, a radio frequency identification (RFID) interrogator, an input/output tag (IO), and a memory including a process that matches a received code from the RFID interrogator to a code in the store of codes and to display supplemental information of a good or service on the IO tag.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: February 4, 2014
    Assignee: Round Rock Research, LLC
    Inventor: Mark E. Tuttle
  • Patent number: 8624711
    Abstract: An adjustable radio frequency data communications device has a monolithic semiconductor integrated circuit with integrated circuitry, interrogation receiving circuitry provided on the monolithic integrated circuit forming at least part of the integrated circuitry and configured to receive an interrogation signal from the interrogator unit, an antenna electrically coupled to the interrogation receiving circuitry and configured to communicate with the remote interrogator unit, a power source electrically coupled to the integrated circuitry and configured to generate operating power for the communications device, and at least one of the antenna and the interrogation receiving circuitry having reconfigurable electrical characteristics, the electrical characteristics being reconfigurable to selectively tune the at least one of the antenna and the interrogation receiving circuitry within a range of tuned and detuned states to realize a desired receiver sensitivity of the communications device.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: January 7, 2014
    Assignee: Round Rock Research, LLC
    Inventors: Mark E. Tuttle, John R. Tuttle
  • Publication number: 20130341416
    Abstract: An RFID tag includes a base having at least one fold formed therein. An integrated circuit is formed on the base. At least one antenna segment extends from the integrated circuit and crosses the fold. When the fold is creased, a portion of the antenna segment on one side of the fold is aligned to be orthogonal to a portion of the antenna segment on the other side of the fold.
    Type: Application
    Filed: August 28, 2013
    Publication date: December 26, 2013
    Applicant: ROUND ROCK RESEARCH, LLC
    Inventors: Mark E. Tuttle, Roy Greeff, Freddie W. Smith, John R. Tuttle
  • Publication number: 20130295766
    Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
    Type: Application
    Filed: July 11, 2013
    Publication date: November 7, 2013
    Inventors: Salman Akram, Charles M. Watkins, William M. Hiatt, David R. Hembree, James M. Wark, Warren M. Farnworth, Mark E. Tuttle, Sidney B. Rigg, Steven D. Oliver, Kyle K. Kirby, Alan G. Wood, Lu Velicky
  • Patent number: 8531298
    Abstract: An RFID tag includes a base having at least one fold formed therein. An integrated circuit is formed on the base. At least one antenna segment extends from the integrated circuit and crosses the fold. When the fold is creased, a portion of the antenna segment on one side of the fold is aligned to be orthogonal to a portion of the antenna segment on the other side of the fold.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: September 10, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Mark E. Tuttle, Roy Greeff, Freddie W. Smith, John R. Tuttle
  • Publication number: 20130228922
    Abstract: The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the substrate, and forming an aperture through the passivation layer and the pad using a substantially continuous process. An insulative layer is deposited in the aperture followed by a conductive layer and a conductive fill. In another embodiment of the invention, a semiconductor device is formed including a first interconnect structure that extends through a conductive pad and is electrically coupled with the conductive pad while a second interconnect structure is formed through another conductive pad while being electrically isolated therefrom. Semiconductor devices and assemblies produced with the methods are also disclosed.
    Type: Application
    Filed: March 22, 2013
    Publication date: September 5, 2013
    Applicant: Micron Technology, Inc.
    Inventor: Mark E. Tuttle
  • Patent number: 8502353
    Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: August 6, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, Charles M. Watkins, William M. Hiatt, David R. Hembree, James M. Wark, Warren M. Farnworth, Mark E. Tuttle, Sidney B. Rigg, Steven D. Oliver, Kyle K. Kirby, Alan G. Wood, Lu Velicky
  • Patent number: 8405191
    Abstract: The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the substrate, and forming an aperture through the passivation layer and the pad using a substantially continuous process. An insulative layer is deposited in the aperture followed by a conductive layer and a conductive fill. In another embodiment of the invention, a semiconductor device is formed including a first interconnect structure that extends through a conductive pad and is electrically coupled with the conductive pad while a second interconnect structure is formed through another conductive pad while being electrically isolated therefrom. Semiconductor devices and assemblies produced with the methods are also disclosed.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: March 26, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Mark E. Tuttle
  • Patent number: 8400297
    Abstract: Methods and apparatus, including computer program products, for a power conserving active RFID label. A system for performing radio frequency (RF) communications includes a radio frequency identification (RFID) tag attached to one or more items to be tracked, the RFID tag configured to receive a request and a time interval indicating a time for determining a temperature and a battery voltage, and to adjust the time interval at a time of determining the temperature and the battery voltage if the detected voltage is less than a predetermined voltage, and an interrogator communicatively coupled to one or more antennas to transmit one or more requests to the RFID tag and to receive one or more responses, at least one response including a time, temperature and battery voltage.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: March 19, 2013
    Assignee: Round Rock Research, LLC
    Inventor: Mark E. Tuttle
  • Publication number: 20130030881
    Abstract: A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.
    Type: Application
    Filed: July 20, 2012
    Publication date: January 31, 2013
    Inventors: James E. O'Toole, John R. Tuttle, Mark E. Tuttle, Tyler Lowrey, Kevin M. Devereaux, George E. Pax, Brian P. Higgins, David K. Ovard, Shu-Sun Yu, Robert R. Rotzoll
  • Patent number: RE44409
    Abstract: In one aspect, the invention encompasses a method for electronic tracking of units originating from a common source which comprises a plurality of units physically joined with one another. A first transponder is physically associated with the common source, and the source is split to separate it into three or more of the units. A second transponder is physically associated with one of the three or more units, and the second transponder sends a code. The code of the second transponder is electrically associated with an identifier of the common source. In a particular aspect, the common source is an animal carcass. A batch comprises separate units of objects that are physically joined together. RFID tags are attached to each of the units and to the batch. The codes stored in the RFID tags are electrically associated with one another in the database.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: August 6, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Ross S. Dando, Mark E. Tuttle