Patents by Inventor Mark Hiatt

Mark Hiatt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11887969
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: January 30, 2024
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Publication number: 20220415855
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Application
    Filed: February 28, 2022
    Publication date: December 29, 2022
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Patent number: 11264360
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: March 1, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Publication number: 20200058621
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 20, 2020
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Patent number: 10468382
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: November 5, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Patent number: 9678019
    Abstract: A lumber check grader-actuatable interface enables a check grader to interact with grade-quality measured boards of lumber conveyed along a flow path and passing in front of the check grader. The interface accurately and continuously tracks the location of each board in front of a check grader and tracks the location of the check grader's hands relative to the boards. Gestures can, therefore, be used for a selected board to perform additional actions, such as changing the grade or changing the trims. The interface enables a check grader to walk alongside and keep pace with a board of interest as it is transported and to provide feedback to the interface about a needed change for the board of interest. By knowing which board is of interest to a check grader, the interface can display additional information for only that board without overwhelming the check grader with non-stop information overload.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: June 13, 2017
    Assignee: Lucidyne Technologies, Inc.
    Inventors: Aaron R. Paul, Josh Miller, Mark Miller, Wendy Roberts, Mark Hiatt, Hayden Michael Aronson
  • Publication number: 20170074805
    Abstract: A lumber check grader-actuatable interface enables a check grader to interact with grade-quality measured boards of lumber conveyed along a flow path and passing in front of the check grader. The interface accurately and continuously tracks the location of each board in front of a check grader and tracks the location of the check grader's hands relative to the boards. Gestures can, therefore, be used for a selected board to perform additional actions, such as changing the grade or changing the trims. The interface enables a check grader to walk alongside and keep pace with a board of interest as it is transported and to provide feedback to the interface about a needed change for the board of interest. By knowing which board is of interest to a check grader, the interface can display additional information for only that board without overwhelming the check grader with non-stop information overload.
    Type: Application
    Filed: September 15, 2015
    Publication date: March 16, 2017
    Inventors: Aaron R. Paul, Josh Miller, Mark Miller, Wendy Roberts, Mark Hiatt, Hayden Michael Aronson
  • Publication number: 20160240515
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Application
    Filed: April 25, 2016
    Publication date: August 18, 2016
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Patent number: 9324690
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: April 26, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Patent number: 8687294
    Abstract: An optics block includes a substrate having first and second opposing surfaces, the substrate being a first material, a plurality of through holes extending in the substrate between the first and second opposing surface, a second material, different than the first material, filling a portion of the through holes and extending on a portion of the first surface of the substrate outside the through holes, and a first lens structure in the second material and corresponding to each of the through holes.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: April 1, 2014
    Assignee: Digitaloptics Corporation
    Inventors: Gregory J. Kintz, Michael R. Feldman, James E. Morris, Paul Elliott, David Keller, W. Hudson Welch, David Ovrutsky, Jeremy Huddleston, Mark Hiatt
  • Patent number: 8531046
    Abstract: The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: September 10, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dave Pratt, Kyle K. Kirby, Steve Oliver, Mark Hiatt
  • Publication number: 20130036606
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Application
    Filed: January 30, 2012
    Publication date: February 14, 2013
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Publication number: 20120229908
    Abstract: An optics block includes a substrate having first and second opposing surfaces, the substrate being a first material, a plurality of through holes extending in the substrate between the first and second opposing surface, a second material, different than the first material, filling a portion of the through holes and extending on a portion of the first surface of the substrate outside the through holes, and a first lens structure in the second material and corresponding to each of the through holes.
    Type: Application
    Filed: May 25, 2012
    Publication date: September 13, 2012
    Applicant: DigitalOptics Corporation East
    Inventors: Gregory J. Kintz, Michael R. Feldman, James E. Morris, Paul Elliott, David Keller, W. Hudson Welch, David Ovrutsky, Jeremy Huddleston, Mark Hiatt
  • Patent number: 8189277
    Abstract: An optics block includes a substrate having first and second opposing surfaces, the substrate being a first material, a plurality of through holes extending in the substrate between the first and second opposing surface, a second material, different than the first material, filling a portion of the through holes and extending on a portion of the first surface of the substrate outside the through holes, and a first lens structure in the second material and corresponding to each of the through holes.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: May 29, 2012
    Assignee: Digitaloptics Corporation East
    Inventors: Gregory J. Kintz, Michael R. Feldman, James E. Morris, Paul Elliott, David Keller, W. Hudson Welch, David Ovrutsky, Jeremy Huddleston, Mark Hiatt
  • Patent number: 8106520
    Abstract: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between the base and at least one of the first and second dice.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: January 31, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Brent Keeth, Mark Hiatt, Terry R. Lee, Mark Tuttle, Rahul Advani, John F. Schreck
  • Publication number: 20110233777
    Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
    Type: Application
    Filed: June 7, 2011
    Publication date: September 29, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Salman Akram, Charles Watkins, Mark Hiatt, David Hembree, James Wark, Warren Farnworth, Mark Tuttle, Sidney Rigg, Steven Oliver, Kyle Kirby, Alan Wood, Lu Velicky
  • Publication number: 20110222171
    Abstract: An optics block includes a substrate having first and second opposing surfaces, the substrate being a first material, a plurality of through holes extending in the substrate between the first and second opposing surface, a second material, different than the first material, filling a portion of the through holes and extending on a portion of the first surface of the substrate outside the through holes, and a first lens structure in the second material and corresponding to each of the through holes.
    Type: Application
    Filed: March 17, 2011
    Publication date: September 15, 2011
    Inventors: Gregory J. KINTZ, Michael R. Feldman, James E. Morris, Paul Elliott, David Keller, W. Hudson Welch, David Ovrutsky, Jeremy Huddleston, Mark Hiatt
  • Publication number: 20110204526
    Abstract: The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined.
    Type: Application
    Filed: May 3, 2011
    Publication date: August 25, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Dave Pratt, Kyle Kirby, Steve Oliver, Mark Hiatt
  • Patent number: 7956443
    Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: June 7, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, Charles M. Watkins, Mark Hiatt, David R. Hembree, James M. Wark, Warren M. Farnworth, Mark E. Tuttle, Sidney B. Rigg, Steven D. Oliver, Kyle K. Kirby, Alan G. Wood, Lu Velicky
  • Patent number: 7955946
    Abstract: The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined.
    Type: Grant
    Filed: May 22, 2006
    Date of Patent: June 7, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Dave Pratt, Kyle Kirby, Steve Oliver, Mark Hiatt