Abstract: A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites accessible for electrical coupling to other electrical structures. A plurality of electrically conductive couplers are connected between the first connection sites and the second connection sites, with neighboring conductive couplers being spaced apart to define at least one flow channel. The at least one flow channel is in fluid communication with a region external to the microelectronic substrate. The generally non-conductive material can be spaced apart from the support member to allow the microelectronic substrate to be separated from the support member.

Abstract: Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies including integrated circuits, external contacts electrically coupled to the integrated circuits, and image sensors operably coupled to the integrated circuits. The individual image sensors include at least one dark current pixel at a perimeter portion of the image sensor. The method includes depositing a cover layer onto the workpiece and over the image sensors. The method further includes patterning and selectively developing the cover layer to form discrete volumes of cover layer material over corresponding image sensors. The discrete volumes of cover layer material have sidewalls aligned with an inboard edge of the individual dark current pixels such that the dark current pixels are not covered by the discrete volumes.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined.

Abstract: An infusion catheter system includes an elongated catheter body and an inner elongated cannula body. The catheter body has a sidewall perforated with a plurality of side ports and the cannula body may have an outlet opening in a distal end. The side ports of the catheter body are selectively in fluid communication with the outlet opening of the cannula by moving the cannula between a first and second position within the catheter body.

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract: An integrally formed angioplasty cutting device for balloon angioplasty of a stenotic lesion in a body vessel. The device comprises a distal collar and a proximal collar. The device further comprises at least one strut integrally formed with the distal collar and the proximal collar. At least one of the collars has a slot formed therethrough defining a C-shaped configuration. The strut is configured to be disposed at the stenotic lesion to engage the stenotic lesion for dilatation of the body vessel during angioplasty.

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract: A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites accessible for electrical coupling to other electrical structures. A plurality of electrically conductive couplers are connected between the first connection sites and the second connection sites, with neighboring conductive couplers being spaced apart to define at least one flow channel. The at least one flow channel is in fluid communication with a region external to the microelectronic substrate. The generally non-conductive material can be spaced apart from the support member to allow the microelectronic substrate to be separated from the support member.

Abstract: Abstract of the Disclosure A dilator (10) for creating tracheostomies in one pass. Dilator (10) includes a generally linear shaft (12) extending from a proximal end (14) and beginning at a distance therefrom, gradually and continuously through a curved distal portion (16) of continuously decreasing diameter (from about 38 french) to a distal tip portion (18) of small diameter of about 12 french at distal end (20). The outer surface of the insertable portion is treated or hydrophilically coated to minimize friction, and the gradual taper gradually widens the tracheal entrance opening (44) between tracheal rings (46,48) with minimal trauma. The wall thickness gradually decreases from the linear shaft (12) to the soft distal tip portion (18). The continuing curve of the distal portion (16) enables the increasingly longer inserted portion of the dilator to remain situated in the trachea (50) during insertion and for the distal tip portion to clear the posterior tracheal wall.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: A process tool, preferably a spin coater, includes a set of at least three arms and an adjustable rinse nozzle. The arms lift a substrate, e.g. a semiconductor wafer, from a chuck inside the process chamber after having performed the corresponding manufacturing step, e.g. coating. The contact area between the arms and the substrate is as small as possible. The rinse nozzle dispenses a solvent liquid onto the backside of the substrate, thereby removing contaminating particles located at the area of contact between the vacuum channels of the chuck and the substrate. The set of arms rotates for a homogeneous cleaning. A gas flowing out of vacuum ports of the chuck prevents the vacuum ports from being obstructed with particles. While the substrate is being lifted, the chuck can also be cleaned by dispensing the solvent liquid onto the chuck.

Abstract: A process tool, preferably a spin coater, includes a set of at least three arms and an adjustable rinse nozzle. The arms lift a substrate, e.g. a semiconductor wafer, from a chuck inside the process chamber after having performed the corresponding manufacturing step, e.g. coating. The contact area between the arms and the substrate is as small as possible. The rinse nozzle dispenses a solvent liquid onto the backside of the substrate, thereby removing contaminating particles located at the area of contact between the vacuum channels of the chuck and the substrate. The set of arms rotates for a homogeneous cleaning. A gas flowing out of vacuum ports of the chuck prevents the vacuum ports from being obstructed with particles. While the substrate is being lifted, the chuck can also be cleaned by dispensing the solvent liquid onto the chuck.

Abstract: A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites accessible for electrical coupling to other electrical structures. A plurality of electrically conductive couplers are connected between the first connection sites and the second connection sites, with neighboring conductive couplers being spaced apart to define at least one flow channel. The at least one flow channel is in fluid communication with a region external to the microelectronic substrate. The generally non-conductive material can be spaced apart from the support member to allow the microelectronic substrate to be separated from the support member.

Abstract: A system for monitoring ion implantation processing on a semiconductor wafer (10), comprising a plurality of Faraday cups (12-28, 32) for collecting charge that is not deposited on the wafer (10) during ion implantation processing, means (40) for determining Faraday cups (12-28, 32) that are collecting charge in a particular position of an ion beam (30) relative to the wafer (10) and means (40) for determining the particular ion beam position relative to the wafer (10) on the basis of the Faraday cups (12-28, 32) collecting charge. The present invention further relates to a method of monitoring ion implantation processing.

Abstract: A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites accessible for electrical coupling to other electrical structures. A plurality of electrically conductive couplers are connected between the first connection sites and the second connection sites, with neighboring conductive couplers being spaced apart to define at least one flow channel. The at least one flow channel is in fluid communication with a region external to the microelectronic substrate. The generally non-conductive material can be spaced apart from the support member to allow the microelectronic substrate to be separated from the support member.

Abstract: A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites accessible for electrical coupling to other electrical structures. A plurality of electrically conductive couplers are connected between the first connection sites and the second connection sites, with neighboring conductive couplers being spaced apart to define at least one flow channel. The at least one flow channel is in fluid communication with a region external to the microelectronic substrate. The generally non-conductive material can be spaced apart from the support member to allow the microelectronic substrate to be separated from the support member.

Abstract: A processing tool bay within a semiconductor fabrication site, including a plurality of semiconductor processing tools for processing wafers being arranged in two opposite rows. An intrabay transport system for transporting wafer carriers around the process tool bay at least in a vertical plane in front of one of said two rows of semiconductor process tools comprises at least one vehicle for receiving and delivering a wafer carrier to and from any one semiconductor process tool of said plurality of semiconductor process tools, and a vehicle guiding mechanism. The vehicle comprises a circular compartment structure including a plurality of compartments for buffering said wafer carrier between receiving it at a first location and delivering it at a second location. Each compartment is arranged for accommodating one wafer carrier. The compartment structure is rotatable around a symmetry axis of itself for an alignment.

Abstract: The present invention relates to a method of cleaning a wafer chuck (10) by an automated system that supplies a solvent to a chuck surface (12), washes the chuck surface (12), and dries the chuck surface (12) by spinning the chuck (10), in one embodiment. In another embodiment, the chuck surface (12) is dried by pulling a vacuum on the chuck surface (12) or flowing a gas on the chuck surface (12). Additionally, a brush can be used to wash the chuck surface (12).