Abstract: An apparatus having a cache and a controller is disclosed. The controller is configured to (i) gather a plurality of statistics corresponding to a plurality of requests made from one or more hosts to access a memory during an interval, (ii) store data of the requests selectively in the cache in response to a plurality of headers and (iii) adjust one or more parameters in the headers in response to the statistics. The requests and the parameters are recorded in the headers.

Abstract: A method for selectively placing cache data, comprising the steps of (A) determining a line temperature for a plurality of devices, (B) determining a device temperature for the plurality of devices, (C) calculating an entry temperature for the plurality of devices in response to the cache line temperature and the device temperature and (D) distributing a plurality of write operations across the plurality of devices such that thermal energy is distributed evenly over the plurality of devices.

Abstract: The disclosure is directed to a system and method for managing cache memory of at least one node of a multiple-node storage cluster. According to various embodiments, a first cache data and a first cache metadata are stored for data transfers between a respective node and regions of a storage cluster receiving at least a first selected number of data transfer requests. When the node is rebooted, a second (new) cache data is stored to replace the first (old) cache data. The second cache data is compiled utilizing the first cache metadata to identify previously cached regions of the storage cluster receiving at least a second selected number of data transfer requests after the node is rebooted. The second selected number of data transfer requests is less than the first selected number of data transfer requests to enable a rapid build of the second cache data.

Abstract: The disclosure is directed to a system and method for managing READ cache memory of at least one node of a multiple-node storage cluster. According to various embodiments, a cache data and a cache metadata are stored for data transfers between a respective node (hereinafter “first node”) and regions of a storage cluster. When the first node is disabled, data transfers are tracked between one or more active nodes of the plurality of nodes and cached regions of the storage cluster. When the first node is rebooted, at least a portion of valid cache data is retained based upon the tracked data transfers. Accordingly, local cache memory does not need to be entirely rebuilt each time a respective node is rebooted.

Abstract: An apparatus having a memory circuit and a manager is disclosed. The memory circuit generally has (i) one or more Flash memories and (ii) a memory space that spans a plurality of memory addresses. The manager may be configured to (i) receive data items in a random order from one or more applications, (ii) write the data items in an active one of a plurality of regions in a memory circuit and (iii) mark the memory addresses in the active region that store the data items as used. Each data item generally has a respective host address. The applications may be executed in one or more computers. The memory addresses in the active region may be accessed in a sequential order while writing the data items to minimize a write amplification. The random order is generally preserved between the data items while writing in the active region.

Abstract: A cache controller having a cache store and associated with a storage system maintains information stored in the cache store across a reboot of the cache controller. The cache controller communicates with a host computer system and a data storage system. The cache controller partitions the cache memory to include a metadata portion and log portion. A separate portion is used for cached data elements. The cache controller maintains a copy of the metadata in a separate memory accessible to the host computer system. Data is written to the cache store when the metadata log reaches its capacity. Upon a reboot, metadata is copied back to the host computer system and the metadata log is traversed to copy additional changes in the cache that have not been saved to the data storage system.

Abstract: An apparatus having one or more memories and a controller is disclosed. The memories are divided into a plurality of regions. Each regions is divided into a plurality of blocks. The blocks correspond to a plurality of memory addresses respectively. The controller is configured to (i) receive data from a host, (ii) generate metadata that maps a plurality of host addresses of the data to the memory addresses of the memories and (iii) write sequentially into a given one of the regions both (a) a portion of the data and (b) a corresponding portion of the metadata.

Abstract: A method of virtual cache window headers for long term access history is disclosed. The method may include steps (A) to (C). Step (A) may receive a request at a circuit from a host to access an address in a memory. The circuit generally controls the memory and a cache. Step (B) may update the access history in a first of the headers in response to the request. The headers may divide an address space of the memory into a plurality of windows. Each window generally includes a plurality of subwindows. Each subwindow may be sized to match one of a plurality of cache lines in the cache. A first of the subwindows in a first of the windows may correspond to the address. Step (C) may copy data from the memory to the cache in response to the access history.

Abstract: A data storage system is provided that implements a command-push model that reduces latencies. The host system has access to a nonvolatile memory (NVM) device of the memory controller to allow the host system to push commands into a command queue located in the NVM device. The host system completes each IO without the need for intervention from the memory controller, thereby obviating the need for synchronization, or handshaking, between the host system and the memory controller. For write commands, the memory controller does not need to issue a completion interrupt to the host system upon completion of the command because the host system considers the write command completed at the time that the write command is pushed into the queue of the memory controller. The combination of all of these features results in a large reduction in overall latency.

Abstract: A data storage system includes two tiers of caching memory. Cached data is organized into cache windows, and the cache windows are organized into a plurality of priority queues. Cache windows are moved between priority queues on the basis of a threshold data access frequency; only when both a cache window is flagged for promotion and a cache window is flagged for demotion will a swap occur.

Abstract: A data storage system having a slow tier and a fast tier maintains hot data on the fast tier by migrating data from the slow tier to reserve space on the fast tier as data becomes hot over time. The system maintains a reserve space table and performs a mass migration of data from the fast tier to the slow tier. Data migration is frequently unidirectional with data migrating from the slow to the fast tier, reducing overhead during normal operation.

Abstract: Disclosed is a method of storage tiering with minimal use of DRAM memory for header overhead that utilizes the beginning of the volume to store frequently accessed or hot data. A solid state storage device is placed at the beginning of a tiered volume and is used to store frequently accessed data. When data becomes less frequently accessed it is moved to a cold data storage area on a hard disk drive in the tiered volume. The data exchange is performed on a one-to-one basis reducing the amount and use of DRAM.

Abstract: A method for caching data in a storage medium implementing tiered data structures may include storing a first portion of critical data at the instruction of a storage control module. The first portion of critical data may be separated into data having different priority levels based upon at least one data utilization characteristic associated with a file system implemented by the storage control module. The method may also include storing a second portion of data at the instruction of the storage control module. The second storage medium may have at least one performance, reliability, or security characteristic different from the first storage medium.

Abstract: A method for selectively placing cache data, comprising the steps of (A) determining a line temperature for a plurality of devices, (B) determining a device temperature for the plurality of devices, (C) calculating an entry temperature for the plurality of devices in response to the cache line temperature and the device temperature and (D) distributing a plurality of write operations across the plurality of devices such that thermal energy is distributed evenly over the plurality of devices.

Abstract: An apparatus having a memory circuit and a manager is disclosed. The memory circuit generally has (i) one or more Flash memories and (ii) a memory space that spans a plurality of memory addresses. The manager may be configured to (i) receive data items in a random order from one or more applications, (ii) write the data items in an active one of a plurality of regions in a memory circuit and (iii) mark the memory addresses in the active region that store the data items as used. Each data item generally has a respective host address. The applications may be executed in one or more computers. The memory addresses in the active region may be accessed in a sequential order while writing the data items to minimize a write amplification. The random order is generally preserved between the data items while writing in the active region.

Abstract: An apparatus for elastic caching of redundant cache data. The apparatus may have a plurality of buffers and a circuit. The circuit may be configured to (i) receive a write request from a host to store write data in a storage volume, (ii) allocate a number of extents in the buffers based upon a redundant organization associated with the write request and (iii) store the write data in the number of extents, where (a) each of the number of extents is located in a different one of the buffers and (b) the number of extents are dynamically linked together in response to the write request.

Abstract: A data storage system having a slow tier and a fast tier maintains hot data on the fast tier by migrating data from the slow tier to reserve space on the fast tier as data becomes hot over time. The system maintains a reserve space table and performs a mass migration of data from the fast tier to the slow tier. Data migration is frequently unidirectional with data migrating from the slow to the fast tier, reducing overhead during normal operation.

Abstract: An apparatus comprising a controller and a memory. The controller may be configured to generate (i) an index signal and (ii) an information signal in response to (i) one or more address signals and (ii) a data signal. The memory may be configured to store said information signal in one of a plurality of cache lines. Each of the plurality of cache lines has an associated one of a plurality of cache headers. Each of the plurality of cache headers includes (i) a first bit configured to indicate whether the associated cache line has all valid entries and (ii) a second bit configured to indicate whether the associated cache line has at least one dirty entry.

Abstract: The present disclosure is directed to a system for dynamically adaptive caching. The system includes a storage device having a physical capacity for storing data received from a host. The system may also include a control module for receiving data from the host and compressing the data to a compressed data size. Alternatively, the data may also be compressed by the storage device. The control module may be configured for determining an amount of available space on the storage device and also determining a reclaimed space, the reclaimed space being according to a difference between the size of the data received from the host and the compressed data size. The system may also include an interface module for presenting a logical capacity to the host. The logical capacity has a variable size and may include at least a portion of the reclaimed space.

Abstract: The present invention is directed to a method for providing storage acceleration in a data storage system. In the data storage system described herein, multiple independent controllers may be utilized, such that a first storage controller may be connected to a first storage tier (ex.—a fast tier) which includes a solid-state drive, while a second storage controller may be connected to a second storage tier (ex.—a slower tier) which includes a hard disk drive. The accelerator functionality may be split between the host of the system and the first storage controller of the system (ex.—some of the accelerator functionality may be offloaded to the first storage controller) for promoting improved storage acceleration performance within the system.