Patents by Inventor Markus Zundel
Markus Zundel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11810958Abstract: A transistor includes: gate electrodes and field electrodes, wherein in each case one gate electrode and one field electrode are arranged one above another in a vertical direction in a common trench of a semiconductor body; a gate pad to which the gate electrodes are connected; and a source metallization arranged above the semiconductor body. The field electrodes of a first group include at least one contact section. The at least one contact section is arranged between two sections of a gate electrode arranged in the same trench and is connected to the source metallization. The two sections of the gate electrode are separated from one another in a region of the contact section. At least one of the two sections of the gate electrode arranged in the same trench is electrically connected to a gate electrode arranged in a further trench by way of a gate connecting electrode.Type: GrantFiled: August 12, 2021Date of Patent: November 7, 2023Assignee: Infineon Technologies AGInventors: Felix Buth, Margarete Deckers, Christian Feuerbaum, Uwe Schmalzbauer, Markus Zundel
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Patent number: 11804432Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.Type: GrantFiled: February 11, 2021Date of Patent: October 31, 2023Assignee: Infineon Technologies AGInventors: Markus Zundel, Sergey Ananiev, Andreas Behrendt, Holger Doepke, Uwe Schmalzbauer, Michael Sorger, Dominic Thurmer
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Patent number: 11695069Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes: a first active cell area comprising a first plurality of parallel gate trenches; a second active cell area comprising a second plurality of parallel gate trenches; and a metallization layer above the first and the second active cell areas. The metallization layer includes: a first part contacting a semiconductor mesa region between the plurality of parallel gate trenches in the first and the second active cell areas; and a second part surrounding the first part. The second part of the metallization layer contacts the first plurality of gate trenches along a first direction and the second plurality of gate trenches along a second direction different from the first direction.Type: GrantFiled: May 10, 2021Date of Patent: July 4, 2023Assignee: Infineon Technologies AGInventors: Markus Zundel, Stefan Mieslinger, Thomas Ostermann, Andrew Christopher Graeme Wood
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Patent number: 11664416Abstract: A semiconductor device includes a semiconductor body having a first surface. A first trench extends in a vertical direction into the semiconductor body. The semiconductor device also includes a first interlayer in the first trench and a first dopant source in the first trench. The first interlayer is arranged between the first dopant source and the semiconductor body, and the first dopant source includes a first dopant species. The semiconductor device also includes a semiconductor area doped with the first dopant species and which completely surrounds the first trench at least at a depth in the semiconductor body and adjoins the first trench.Type: GrantFiled: September 12, 2019Date of Patent: May 30, 2023Assignee: Infineon Technologies AGInventor: Markus Zundel
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Publication number: 20220285550Abstract: A method of manufacturing a semiconductor body includes forming a pattern at a first side of a substrate, forming a semiconductor layer on the first side of the substrate, attaching the substrate and the semiconductor layer to a carrier via a surface of the semiconductor layer, and removing the substrate from a second side opposite to the first side.Type: ApplicationFiled: May 25, 2022Publication date: September 8, 2022Inventors: Markus Zundel, Andreas Meiser, Hans-Peter Lang, Thorsten Meyer, Peter Irsigler
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Publication number: 20220254713Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.Type: ApplicationFiled: February 11, 2021Publication date: August 11, 2022Inventors: Markus Zundel, Sergey Ananiev, Andreas Behrendt, Holger Doepke, Uwe Schmalzbauer, Michael Sorger, Dominic Thurmer
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Publication number: 20220052171Abstract: A transistor includes: gate electrodes and field electrodes, wherein in each case one gate electrode and one field electrode are arranged one above another in a vertical direction in a common trench of a semiconductor body; a gate pad to which the gate electrodes are connected; and a source metallization arranged above the semiconductor body. The field electrodes of a first group include at least one contact section. The at least one contact section is arranged between two sections of a gate electrode arranged in the same trench and is connected to the source metallization. The two sections of the gate electrode are separated from one another in a region of the contact section. At least one of the two sections of the gate electrode arranged in the same trench is electrically connected to a gate electrode arranged in a further trench by way of a gate connecting electrode.Type: ApplicationFiled: August 12, 2021Publication date: February 17, 2022Inventors: Felix Buth, Margarete Deckers, Christian Feuerbaum, Uwe Schmalzbauer, Markus Zundel
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Patent number: 11239188Abstract: A power semiconductor device includes a semiconductor body configured to conduct a load current. A load terminal electrically connected with the semiconductor body is configured to couple the load current into and/or out of the semiconductor body. The load terminal includes a metallization having a frontside and a backside. The backside interfaces with a surface of the semiconductor body. The frontside is configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current. The frontside has a lateral structure formed at least by at least one local elevation of the metallization. The local elevation has a height in an extension direction defined by a distance between the base and top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top.Type: GrantFiled: November 20, 2017Date of Patent: February 1, 2022Assignee: Infineon Technologies AGInventors: Markus Zundel, Rainer Pelzer, Manfred Schneegans
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Patent number: 11227945Abstract: A transistor device includes at least one transistor cell which includes: a source region, a body region and a drift region in a semiconductor body; a gate electrode dielectrically insulated from the body region by a gate dielectric; a field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a contact plug extending from a first surface of the semiconductor body to the field electrode. A portion of the semiconductor body is arranged between the field electrode trench and the first surface of the semiconductor body. The portion of the semiconductor body that is arranged between the field electrode trench and the first surface comprises the body region. The body region directly contacts the upper surface of the field electrode dielectric.Type: GrantFiled: June 8, 2020Date of Patent: January 18, 2022Assignee: Infineon Technologies Austria AGInventors: Markus Zundel, Franz Hirler
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Publication number: 20210265497Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes: a first active cell area comprising a first plurality of parallel gate trenches; a second active cell area comprising a second plurality of parallel gate trenches; and a metallization layer above the first and the second active cell areas. The metallization layer includes: a first part contacting a semiconductor mesa region between the plurality of parallel gate trenches in the first and the second active cell areas; and a second part surrounding the first part. The second part of the metallization layer contacts the first plurality of gate trenches along a first direction and the second plurality of gate trenches along a second direction different from the first direction.Type: ApplicationFiled: May 10, 2021Publication date: August 26, 2021Inventors: Markus Zundel, Stefan Mieslinger, Thomas Ostermann, Andrew Christopher Graeme Wood
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Patent number: 11018250Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes: a first active cell area comprising a first plurality of parallel gate trenches; a second active cell area comprising a second plurality of parallel gate trenches; and a metallization layer above the first and the second active cell areas. The metallization layer includes: a first part contacting a semiconductor mesa region between the plurality of parallel gate trenches in the first and the second active cell areas; and a second part surrounding the first part. The second part of the metallization layer contacts the first plurality of gate trenches along a first direction and the second plurality of gate trenches along a second direction different from the first direction.Type: GrantFiled: May 6, 2019Date of Patent: May 25, 2021Assignee: Infineon Technologies AGInventors: Markus Zundel, Stefan Mieslinger, Thomas Ostermann, Andrew Christopher Graeme Wood
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Patent number: 10957686Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor. A method of producing the semiconductor device is also described.Type: GrantFiled: January 16, 2020Date of Patent: March 23, 2021Assignee: Infineon Technologies AGInventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
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Patent number: 10879384Abstract: An alternator assembly includes an input terminal configured to input an alternating voltage, an output terminal configured to output a rectified voltage, and a gated diode arranged in a load path between the input terminal and the output terminal.Type: GrantFiled: November 27, 2018Date of Patent: December 29, 2020Assignee: Infineon Technologies AGInventors: Dirk Ahlers, Markus Zundel, Dietrich Bonart, Ludger Borucki
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Publication number: 20200357917Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes: a first active cell area comprising a first plurality of parallel gate trenches; a second active cell area comprising a second plurality of parallel gate trenches; and a metallization layer above the first and the second active cell areas. The metallization layer includes: a first part contacting a semiconductor mesa region between the plurality of parallel gate trenches in the first and the second active cell areas; and a second part surrounding the first part. The second part of the metallization layer contacts the first plurality of gate trenches along a first direction and the second plurality of gate trenches along a second direction different from the first direction.Type: ApplicationFiled: May 6, 2019Publication date: November 12, 2020Inventors: Markus Zundel, Stefan Mieslinger, Thomas Ostermann, Andrew Christopher Graeme Wood
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Publication number: 20200303539Abstract: A transistor device includes at least one transistor cell which includes: a source region, a body region and a drift region in a semiconductor body; a gate electrode dielectrically insulated from the body region by a gate dielectric; a field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a contact plug extending from a first surface of the semiconductor body to the field electrode. A portion of the semiconductor body is arranged between the field electrode trench and the first surface of the semiconductor body. The portion of the semiconductor body that is arranged between the field electrode trench and the first surface comprises the body region. The body region directly contacts the upper surface of the field electrode dielectric.Type: ApplicationFiled: June 8, 2020Publication date: September 24, 2020Inventors: Markus Zundel, Franz Hirler
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Patent number: 10707342Abstract: Disclosed is a transistor device and a method for producing thereof. The transistor device includes at least one transistor cell, wherein the at least one transistor cell includes: a source region, a body region and a drift region in a semiconductor body; a gate electrode dielectrically insulated from the body region by a gate dielectric; a field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a contact plug extending from a first surface of the semiconductor body to the field electrode and adjoining the source region and the body region.Type: GrantFiled: March 1, 2019Date of Patent: July 7, 2020Assignee: Infineon Technology Austria AGInventors: Markus Zundel, Franz Hirler
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Patent number: 10672661Abstract: A semiconductor wafer having a main surface and a rear surface opposite from the main surface is provided. A die singulation preparation step is performed in kerf regions of the semiconductor wafer. The kerf regions enclose a plurality of die sites. The die singulation preparation step includes forming one or more preliminary kerf trenches between at least two immediately adjacent die sites. The method further includes forming active semiconductor devices in the die sites, and singulating the semiconductor wafer in the kerf regions thereby providing a plurality of discrete semiconductor dies from the die sites. The one or more preliminary kerf trenches are unfilled during the singulating, and the singulating includes removing semiconductor material from a surface of the semiconductor wafer that is between opposite facing sidewalls of the one or more preliminary kerf trenches.Type: GrantFiled: October 31, 2018Date of Patent: June 2, 2020Assignee: Infineon Technologies AGInventors: Markus Zundel, Stefan Mieslinger, Thomas Ostermann, Christian Westermeier, Jochen Hilsenbeck, Jens Peter Konrath, Boris Mayerhofer, Anatoly Sotnikov
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Publication number: 20200152621Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor.Type: ApplicationFiled: January 16, 2020Publication date: May 14, 2020Inventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
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Publication number: 20200135564Abstract: A semiconductor wafer having a main surface and a rear surface opposite from the main surface is provided. A die singulation preparation step is performed in kerf regions of the semiconductor wafer. The kerf regions enclose a plurality of die sites. The die singulation preparation step includes forming one or more preliminary kerf trenches between at least two immediately adjacent die sites. The method further includes forming active semiconductor devices in the die sites, and singulating the semiconductor wafer in the kerf regions thereby providing a plurality of discrete semiconductor dies from the die sites. The one or more preliminary kerf trenches are unfilled during the singulating, and the singulating includes removing semiconductor material from a surface of the semiconductor wafer that is between opposite facing sidewalls of the one or more preliminary kerf trenches.Type: ApplicationFiled: October 31, 2018Publication date: April 30, 2020Inventors: Markus Zundel, Stefan Mieslinger, Thomas Ostermann, Christian Westermeier, Jochen Hilsenbeck, Jens Peter Konrath, Boris Mayerhofer, Anatoly Sotnikov
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Publication number: 20200091284Abstract: A semiconductor device includes a semiconductor body having a first surface. A first trench extends in a vertical direction into the semiconductor body. The semiconductor device also includes a first interlayer in the first trench and a first dopant source in the first trench. The first interlayer is arranged between the first dopant source and the semiconductor body, and the first dopant source includes a first dopant species. The semiconductor device also includes a semiconductor area doped with the first dopant species and which completely surrounds the first trench at least at a depth in the semiconductor body and adjoins the first trench.Type: ApplicationFiled: September 12, 2019Publication date: March 19, 2020Inventor: Markus Zundel