Abstract: A semiconductor device includes a semiconductor body including a trench with first and second opposing sidewalls. A first electrode is arranged in a lower portion of the trench and a second electrode in an upper portion of the trench. A dielectric structure is arranged in the trench, including a first portion between the electrodes. The first portion includes, in sequence along a lateral direction from the first sidewall to the second sidewall, a first part including a first dielectric material, a second part including a second dielectric material selectively etchable to the first dielectric material, a third part including the first dielectric material, the first dielectric material of the third part being continuously arranged along a vertical direction from a top side of the first electrode to a bottom side of the second electrode, a fourth part including the second dielectric material and a fifth part including the first dielectric material.

Abstract: In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.

Abstract: A method for insulating a semiconducting material in a trench from a substrate, wherein the trench is formed in the substrate and comprising an upper portion and a lower portion, the lower portion being lined with a first insulating layer and filled, at least partially, with a semiconducting material, comprises an isotropic etching of the substrate and the semiconducting material, and forming a second insulating layer in the trench, wherein the second insulating layer covers, at least partially, the substrate and the semiconducting material.

Abstract: A method for producing a vertical transistor component includes providing a semiconductor substrate, applying an auxiliary layer to the semiconductor substrate, and patterning the auxiliary layer for the purpose of producing at least one trench which extends as far as the semiconductor substrate and which has opposite sidewalls. The method further includes producing a monocrystalline semiconductor layer on at least one of the sidewalls of the trench, producing an electrode insulated from the monocrystalline semiconductor layer on the at least one sidewall of the trench and the semiconductor substrate.

Abstract: A transistor component and method of forming a transistor component. One embodiment provides a semiconductor arrangement including a semiconductor body having a at least one first trench, a first field electrode arranged in the lower trench section of the at least one first trench and being insulated from the semiconductor body by a field electrode dielectric. A dielectric layer is formed on the first field electrode in the at least one first trench, including depositing a dielectric material on a first side of the semiconductor body and on the field plate at a higher deposition rate than on sidewalls of the at least one first trench.

Abstract: A method for manufacturing a field plate in a trench of a power transistor in a substrate of a first conductivity type is disclosed. The trench is formed in a first main surface of the substrate.

Abstract: In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.

Abstract: One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side of the semiconductor die, respectively. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side of the semiconductor die opposite to the first side, respectively. The contact areas of the drain of the first n-type channel FET, of the gate of the first n-type channel FET, of the source of the second n-type channel FET and of the gate of the second n-type channel FET are electrically separated from each other, respectively.

Abstract: A field-effect transistor and a method for manufacturing a field-effect transistor is disclosed. One embodiment includes a substrate having a surface along which a trench is implemented, wherein the trench has a trench bottom and a trench edge. A source area is implemented at the trench edge and a gate electrode at least partially implemented in the trench and separated from the substrate by an insulation layer. The field-effect transistor includes a drain electrode at a side of the substrate facing away from the surface. An additional electrode is implemented between the gate electrode and the trench bottom and electrically insulated from the substrate and an electrical connection between the additional electrode and the gate electrode, wherein the electrical connection has a predetermined ohmic resistance value.

Abstract: One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first side of one semiconductor die, respectively. The other one of source/drain of the first FET, a gate of the first FET, the other one of source/drain of the second FET and the gate of the second FET are electrically coupled to contact areas at a second side of the one semiconductor die opposite to the first side, respectively. The contact areas of the other one of source/drain of the first FET, of the gate of the first FET, of the other one of source/drain of the second FET and of the gate of the second FET are electrically separated from each other, respectively.

Abstract: A transistor component and method of forming a transistor component. One embodiment provides a semiconductor arrangement including a semiconductor body having a at least one first trench, a first field electrode arranged in the lower trench section of the at least one first trench and being insulated from the semiconductor body by a field electrode dielectric. A dielectric layer is formed on the first field electrode in the at least one first trench, including depositing a dielectric material on a first side of the semiconductor body and on the field plate at a higher deposition rate than on sidewalls of the at least one first trench.

Abstract: A method for producing a vertical transistor component includes providing a semiconductor substrate, applying an auxiliary layer to the semiconductor substrate, and patterning the auxiliary layer for the purpose of producing at least one trench which extends as far as the semiconductor substrate and which has opposite sidewalls. The method further includes producing a monocrystalline semiconductor layer on at least one of the sidewalls of the trench, producing an electrode insulated from the monocrystalline semiconductor layer on the at least one sidewall of the trench and the semiconductor substrate.

Abstract: A method is disclosed for producing a trench transistor which has at least two trenches with in each case a field electrode arranged therein and a gate electrode arranged therein. In the method, it is provided to implement the trenches with different trench widths and then to produce the field electrodes by filling up the trenches with an electrode material and subsequent cutting back of the electrode material. The different trench width leads to different etching rates during the cutting back of the electrode material, and thus to field electrodes which are spaced apart from a top edge of the trenches by different amounts. Following this, the gate electrodes are produced which, due to the different dimensions of the field electrodes, extend into the trenches to a different depth, resulting in different gate capacitances for the gate electrodes in the two trenches.

Abstract: A trench transistor having a semiconductor body, in which a trench structure and an electrode structure embedded in the trench structure is disclosed. The electrode structure is electrically insulated from the semiconductor body by an insulation structure. The electrode structure has a gate electrode structure and a field electrode structure arranged below the gate electrode structure and electrically insulated from the latter. There is provided between the gate electrode structure and the field electrode structure a shielding structure for reducing the capacitive coupling between the gate electrode structure and the field electrode structure.

Abstract: A method for producing a vertical transistor component includes steps of providing a semiconductor substrate, applying an auxiliary layer to the semiconductor substrate, and patterning the auxiliary layer for the purpose of producing at least one trench which extends as far as the semiconductor substrate and which has opposite sidewalls. The method further includes producing a monocrystalline semiconductor layer on at least one of the sidewalls of the trench, producing an electrode insulated from the monocrystalline semiconductor layer on the at least one sidewall of the trench and the semiconductor substrate.

Abstract: One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first side of one semiconductor die, respectively. The other one of source/drain of the first FET, a gate of the first FET, the other one of source/drain of the second FET and the gate of the second FET are electrically coupled to contact areas at a second side of the one semiconductor die opposite to the first side, respectively. The contact areas of the other one of source/drain of the first FET, of the gate of the first FET, of the other one of source/drain of the second FET and of the gate of the second FET are electrically separated from each other, respectively.

Abstract: In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.

Abstract: A method for forming a semiconductor device. One embodiment provides a semiconductor substrate having a trench with a sidewall isolation. The sidewall isolation is removed in a portion of the trench. A gate dielectric is formed on the laid open sidewall. A gate electrode is formed adjacent to the date dielectric. The upper surface of the gate electrode is located at a depth d1 below the surface of the semiconductor substrate. The gate oxide is removed above the gate electrode. An isolation is formed simultaneously on the gate electrode and the semiconductor substrate such that the absolute value of height difference d2 between the isolation over the gate electrode and the isolation over the semiconductor substrate is smaller than the depth d1.

Abstract: A method for manufacturing a field plate in a trench of a power transistor in a substrate of a first conductivity type is disclosed. The trench is formed in a first main surface of the substrate.

Abstract: A trench transistor having a semiconductor body, in which a trench structure and an electrode structure embedded in the trench structure is disclosed. The electrode structure is electrically insulated from the semiconductor body by an insulation structure. The electrode structure has a gate electrode structure and a field electrode structure arranged below the gate electrode structure and electrically insulated from the latter. There is provided between the gate electrode structure and the field electrode structure a shielding structure for reducing the capacitive coupling between the gate electrode structure and the field electrode structure.