Patents by Inventor Masaharu Nagai
Masaharu Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8362693Abstract: It is an object of the present invention to provide a reliable display device and a method for manufacturing the display device reducing the number of manufacturing steps, and with higher yield. A display device according to the invention includes a plurality of display elements each having a first electrode, a layer containing an organic compound, and a second electrode. The display device further includes a heat-resistant planarizing film over a substrate having an insulating surface, a first electrode over the heat-resistant, planarizing film, a wiring covering an end portion of the first electrode, a partition wall covering the end portion of first electrode and the wiring, a layer containing an organic compound, and a second electrode over the layer containing an organic compound.Type: GrantFiled: October 20, 2011Date of Patent: January 29, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masayuki Sakakura, Masaharu Nagai, Yutaka Matsuda, Kengo Akimoto, Gen Fujii, Tetsuji Yamaguchi
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Patent number: 8283862Abstract: An object of the present invention is to realize a light emitting device having low power consumption and high stability, in addition to improve extraction efficiency of light generated in a light emitting element. At least an interlayer insulating film (including a planarizing film), an anode, and a bank covering an edge portion of the anode contain chemically and physically stable silicon oxide, or are made of a material containing silicon oxide as its main component in order to accomplish a light emitting device having high stability. Generation of heat in a light emitting panel can be suppressed in addition to increase in efficiency (luminance/current) of a light emitting panel according to the structure of the present invention. Consequently, synergistic effect on reliability of a light emitting device is obtained.Type: GrantFiled: October 15, 2010Date of Patent: October 9, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Takashi Hamada, Masaharu Nagai, Yutaka Matsuda
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Publication number: 20120211862Abstract: The method for manufacturing an SOI substrate includes the following steps: forming an insulating film on a semiconductor substrate; exposing the semiconductor substrate to accelerated ions so that an embrittlement region is formed in the semiconductor substrate; bonding the semiconductor substrate to a base substrate with the insulating film interposed therebetween; separating the semiconductor substrate along the embrittlement region so that a semiconductor film is provided over the base substrate with the insulating film interposed therebetween; and forming a mask over the semiconductor film to etch part of the semiconductor film and part of the insulating film so that the periphery of the semiconductor film is on the inner side than the periphery of the insulating film.Type: ApplicationFiled: February 14, 2012Publication date: August 23, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masaharu NAGAI, Hideto OHNUMA, Kosei NEI
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Publication number: 20120208348Abstract: The method of one embodiment of the present invention includes: a first step of irradiating a bond substrate with ions to form an embrittlement region in the bond substrate; a second step of bonding the bond substrate to a base substrate with an insulating layer therebetween; a third step of splitting the bond substrate at the embrittlement region to form a semiconductor layer over the base substrate with the insulating layer therebetween; and a fourth step of subjecting the bond substrate split at the embrittlement region to a first heat treatment in an argon atmosphere and then a second heat treatment in an atmosphere of a mixture of oxygen and nitrogen to form a reprocessed bond substrate. The reprocessed bond substrate is used again as a bond substrate in the first step.Type: ApplicationFiled: April 24, 2012Publication date: August 16, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Kazuya HANAOKA, Hideki TSUYA, Masaharu NAGAI
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Patent number: 8198173Abstract: To improve bonding strength and improve reliability of an SOI substrate in bonding a semiconductor substrate and a base substrate to each other even when an insulating film containing nitrogen is used as a bonding layer, an oxide film is provided on the semiconductor substrate side, a nitrogen-containing layer is provided on the base substrate side, and the oxide film formed on the semiconductor substrate and the nitrogen-containing layer formed over the base substrate are bonded to each other. Further, plasma treatment is performed on at least one of the oxide film and the nitrogen-containing layer before bonding the oxide film formed on the semiconductor substrate and the nitrogen-containing layer formed over the base substrate to each other. Plasma treatment can be performed in a state in which a bias voltage is applied.Type: GrantFiled: October 22, 2010Date of Patent: June 12, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideto Ohnuma, Kenichiro Makino, Yoichi Iikubo, Masaharu Nagai, Aiko Shiga
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Patent number: 8168481Abstract: The method of one embodiment of the present invention includes: a first step of irradiating a bond substrate with ions to form an embrittlement region in the bond substrate; a second step of bonding the bond substrate to a base substrate with an insulating layer therebetween; a third step of splitting the bond substrate at the embrittlement region to form a semiconductor layer over the base substrate with the insulating layer therebetween; and a fourth step of subjecting the bond substrate split at the embrittlement region to a first heat treatment in an argon atmosphere and then a second heat treatment in an atmosphere of a mixture of oxygen and nitrogen to form a reprocessed bond substrate. The reprocessed bond substrate is used again as a bond substrate in the first step.Type: GrantFiled: April 19, 2010Date of Patent: May 1, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazuya Hanaoka, Hideki Tsuya, Masaharu Nagai
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Publication number: 20120032159Abstract: It is an object of the present invention to provide a reliable display device and a method for manufacturing the display device reducing the number of manufacturing steps, and with higher yield. A display device according to the invention includes a plurality of display elements each having a first electrode, a layer containing an organic compound, and a second electrode. The display device further includes a heat-resistant planarizing film over a substrate having an insulating surface, a first electrode over the heat-resistant, planarizing film, a wiring covering an end portion of the first electrode, a partition wall covering the end portion of first electrode and the wiring, a layer containing an organic compound, and a second electrode over the layer containing an organic compound.Type: ApplicationFiled: October 20, 2011Publication date: February 9, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Masaharu NAGAI, Yutaka MATSUDA, Kengo AKIMOTO, Gen FUJII, Tetsuji YAMAGUCHI
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Publication number: 20110315990Abstract: To provide a semiconductor device in which a channel formation region can be thinned without adversely affecting a source region and a drain region through a simple process and a method for manufacturing the semiconductor device. In the method for manufacturing a semiconductor device, a semiconductor film, having a thickness smaller than a height of a projection of a substrate, is formed over a surface of the substrate having the projections; the semiconductor film is etched to have an island shape with a resist used as a mask; the resist is etched to expose a portion of the semiconductor film which covers a top surface of the projection; and the exposed portion of the semiconductor film is etched to be thin, while the adjacent portions of the semiconductor film on both sides of the projection remain covered with the resist.Type: ApplicationFiled: September 6, 2011Publication date: December 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masaharu NAGAI, Takafumi MIZOGUCHI
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Patent number: 8044574Abstract: It is an object of the present invention to provide a reliable display device and a method for manufacturing the display device reducing the number of manufacturing steps, and with higher yield. A display device according to the invention includes a plurality of display elements each having a first electrode, a layer containing an organic compound, and a second electrode. The display device further includes a heat-resistant planarizing film over a substrate having an insulating surface, a first electrode over the heat-resistant planarizing film, a wiring covering an end portion of the first electrode, a partition wall covering the end portion of first electrode and the wiring, a layer containing an organic compound, and a second electrode over the layer containing an organic compound.Type: GrantFiled: March 18, 2009Date of Patent: October 25, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masayuki Sakakura, Masaharu Nagai, Yutaka Matsuda, Kengo Akimoto, Gen Fujii, Tetsuji Yamaguchi
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Publication number: 20110248313Abstract: An object of the present invention is to provide such a sealing structure that a material to be a deterioration factor such as water or oxygen is prevented from entering from external and sufficient reliability is obtained in a display using an organic or inorganic electroluminescent element. In view of the above object, focusing on permeability of an interlayer insulating film, deterioration of an electroluminescent element is suppressed and sufficient reliability is obtained by preventing water entry from an interlayer insulating film according to the present invention.Type: ApplicationFiled: April 18, 2011Publication date: October 13, 2011Inventors: Kaoru Tsuchiya, Aya Anzai, Masayuki Sakakura, Masaharu Nagai, Yutaka Matsuda
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Patent number: 8034674Abstract: To provide a semiconductor device in which a channel formation region can be thinned without adversely affecting a source region and a drain region through a simple process and a method for manufacturing the semiconductor device. In the method for manufacturing a semiconductor device, a semiconductor film, having a thickness smaller than a height of a projection of a substrate, is formed over a surface of the substrate having the projections; the semiconductor film is etched to have an island shape with a resist used as a mask; the resist is etched to expose a portion of the semiconductor film which covers a top surface of the projection; and the exposed portion of the semiconductor film is etched to be thin, while the adjacent portions of the semiconductor film on both sides of the projection remain covered with the resist.Type: GrantFiled: June 27, 2008Date of Patent: October 11, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masaharu Nagai, Takafumi Mizoguchi
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Publication number: 20110227126Abstract: It is an object of the present invention to provide a high reliable EL display device and a manufacturing method thereof by shielding intruding moisture or oxygen which is a factor of deteriorating the property of an EL element without enlarging the EL display device. In the invention, application is used as a method for forming a high thermostability planarizing film 16, typically, an interlayer insulating film (a film which serves as a base film of a light emitting element later) of a TFT in which a skeletal structure is configured by the combination of silicon (Si) and oxygen (O). After the formation, an edge portion or an opening portion is formed to have a tapered shape. Afterwards, distortion is given by adding an inert element with a comparatively large atomic radius to modify or highly densify a surface (including a side surface) for preventing the intrusion of moisture or oxygen.Type: ApplicationFiled: June 1, 2011Publication date: September 22, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Masaharu NAGAI, Osamu NAKAMURA
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Publication number: 20110170084Abstract: The present invention provides a light exposure mask which can form a photoresist layer in a semi-transmissive portion with uniform thickness, and a method for manufacturing a semiconductor device in which the number of photolithography steps (the number of masks) necessary for manufacturing a TFT substrate is reduced by using the light exposure mask. A light exposure mask is used, which includes a transmissive portion, a light shielding portion, and a semi-transmissive portion having a light intensity reduction function where lines and spaces are repeatedly formed, wherein the sum of a line width L of a light shielding material and a space width S between light shielding materials in the semi-transmissive portion satisfies a conditional expression (2n/3)×m?L+S?(6n/5)×m when a resolution of a light exposure apparatus is represented by n and a projection magnification is represented by 1/m (m?1).Type: ApplicationFiled: March 23, 2011Publication date: July 14, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideto Ohnuma, Masaharu Nagai
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Patent number: 7960733Abstract: It is an object of the present invention to provide a high reliable EL display device and a manufacturing method thereof by shielding intruding moisture or oxygen which is a factor of deteriorating the property of an EL element without enlarging the EL display device. In the invention, application is used as a method for forming a high thermostability planarizing film 16, typically, an interlayer insulating film (a film which serves as a base film of a light emitting element later) of a TFT in which a skeletal structure is configured by the combination of silicon (Si) and oxygen (O). After the formation, an edge portion or an opening portion is formed to have a tapered shape. Afterwards, distortion is given by adding an inert element with a comparatively large atomic radius to modify or highly densify a surface (including a side surface) for preventing the intrusion of moisture or oxygen.Type: GrantFiled: October 15, 2008Date of Patent: June 14, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masaharu Nagai, Osamu Nakamura
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Patent number: 7947538Abstract: It is an object of the present invention to form a plurality of elements in a limited area to reduce the area occupied by the elements for integration so that further higher resolution (increase in number of pixels), reduction of each display pixel pitch with miniaturization, and integration of a driver circuit that drives a pixel portion can be advanced in semiconductor devices such as liquid crystal display devices and light-emitting devices that has EL elements. A photomask or a reticle provided with an assist pattern that is composed of a diffraction grating pattern or a semi-transparent film and has a function of reducing a light intensity is applied to a photolithography process for forming a gate electrode to form a complicated gate electrode. In addition, a top-gate TFT that has the multi-gate structure described above and a top gate TFT that has a single-gate structure can be formed on the same substrate just by changing the mask without increasing the number of processes.Type: GrantFiled: August 3, 2009Date of Patent: May 24, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideto Ohnuma, Masaharu Nagai, Mitsuaki Osame, Masayuki Sakakura, Shigeki Komori, Shunpei Yamazaki
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Patent number: 7928654Abstract: An object of the present invention is to provide such a sealing structure that a material to be a deterioration factor such as water or oxygen is prevented from entering from external and sufficient reliability is obtained in a display using an organic or inorganic electroluminescent element. In view of the above object, focusing on permeability of an interlayer insulating film, deterioration of an electroluminescent element is suppressed and sufficient reliability is obtained by preventing water entry from an interlayer insulating film according to the present invention.Type: GrantFiled: August 17, 2004Date of Patent: April 19, 2011Assignee: Semiconductor Energy laboratory Co., Ltd.Inventors: Kaoru Tsuchiya, Aya Anzai, Masayuki Sakakura, Masaharu Nagai, Yutaka Matsuda
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Patent number: 7914971Abstract: The present invention provides a light exposure mask which can form a photoresist layer in a semi-transmissive portion with uniform thickness, and a method for manufacturing a semiconductor device in which the number of photolithography steps (the number of masks) necessary for manufacturing a TFT substrate is reduced by using the light exposure mask. A light exposure mask is used, which includes a transmissive portion, a light shielding portion, and a semi-transmissive portion having a light intensity reduction function where lines and spaces are repeatedly formed, wherein the sum of a line width L of a light shielding material and a space width S between light shielding materials in the semi-transmissive portion satisfies a conditional expression (2n/3)×m?L+S?(6n/5)×m when a resolution of a light exposure apparatus is represented by n and a projection magnification is represented by 1/m (m?1).Type: GrantFiled: August 8, 2006Date of Patent: March 29, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideto Ohnuma, Masaharu Nagai
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Publication number: 20110039395Abstract: To improve bonding strength and improve reliability of an SOI substrate in bonding a semiconductor substrate and a base substrate to each other even when an insulating film containing nitrogen is used as a bonding layer, an oxide film is provided on the semiconductor substrate side, a nitrogen-containing layer is provided on the base substrate side, and the oxide film formed on the semiconductor substrate and the nitrogen-containing layer formed over the base substrate are bonded to each other. Further, plasma treatment is performed on at least one of the oxide film and the nitrogen-containing layer before bonding the oxide film formed on the semiconductor substrate and the nitrogen-containing layer formed over the base substrate to each other. Plasma treatment can be performed in a state in which a bias voltage is applied.Type: ApplicationFiled: October 22, 2010Publication date: February 17, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideto OHNUMA, Kenichiro MAKINO, Yoichi IIKUBO, Masaharu NAGAI, Aiko SHIGA
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Publication number: 20110027920Abstract: An object of the present invention is to realize a light emitting device having low power consumption and high stability, in addition to improve extraction efficiency of light generated in a light emitting element. At least an interlayer insulating film (including a planarizing film), an anode, and a bank covering an edge portion of the anode contain chemically and physically stable silicon oxide, or are made of a material containing silicon oxide as its main component in order to accomplish a light emitting device having high stability. Generation of heat in a light emitting panel can be suppressed in addition to increase in efficiency (luminance/current) of a light emitting panel according to the structure of the present invention. Consequently, synergistic effect on reliability of a light emitting device is obtained.Type: ApplicationFiled: October 15, 2010Publication date: February 3, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Takashi HAMADA, Masaharu NAGAI, Yutaka MATSUDA
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Patent number: 7875419Abstract: It is an object to provide a technique for removing a resist favorably without leaving residue in the case of using a nonaqueous resist stripper. According to the present invention, in order to achieve the object, when a resist pattern is removed by using the nonaqueous resist stripper, it becomes easier to remove the resist pattern after dry etching or ion doping, by performing exposure treatment on the resist pattern. After a resist pattern is formed from a DNQ-novolac resin type of positive resist composition, the resist pattern is irradiated with light within the range of photosensitive wavelength of the DNQ photosensitizer, thereby removing the resist pattern with the nonaqueous resist stripper.Type: GrantFiled: October 29, 2003Date of Patent: January 25, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masaharu Nagai, Kiyofumi Ogino, Teruhisa Nakai, Eiji Shioda