Patents by Inventor Masahiko Higashi

Masahiko Higashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010022237
    Abstract: A ceramic wiring board provided with an insulating layer of a high dielectric constant formed of a ceramic sintered product having a high dielectric constants wherein the ceramic sintered product contains a crystal phase of lanthanum titanate and a glass phase present on the grain boundaries of the crystal phase, and has a coefficient of thermal expansion at 40 to 400° C. of not smaller than 8×10−6/° C. and a specific inductive capacity at 1 MHz of not smaller than 10. The wiring board contains a capacitor and is very useful in realizing various electric circuit devices in small sizes, and can be further reliably mounted on a printed board that uses an organic resin as an insulating material.
    Type: Application
    Filed: January 30, 2001
    Publication date: September 20, 2001
    Applicant: KYOCERA CORPORATION
    Inventors: Shinichi Suzuki, Kenichi Nagae, Yoshihiro Nakao, Masanari Kokubu, Masahiko Higashi
  • Patent number: 6027791
    Abstract: A structure for mounting a wiring board in which the wiring board including a ceramics insulating board, metallized wiring layers arranged on said insulating board, and a plurality of connection terminals mounted on said insulating board and electrically connected to said metallized wiring layer, is placed on a mother board having wiring conductors formed on the surface of an insulator which contains an organic resin, and the connection terminals of said wiring board are connected by brazing to the wiring conductors of said mother board, wherein a value F1 defined by the following formula (1):F1=L.times..DELTA..alpha./H.sup.2 (1)wherein L is a distance (mm) between the two connection terminals which are most separated away from each other among a plurality of connection terminals mounted on said insulating board, .DELTA..alpha. is a difference in the coefficient of thermal expansion (ppm/.degree. C.) between the insulating board of said wiring board and said mother board at 40 to 400.degree. C.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: February 22, 2000
    Assignee: Kyocera Corporation
    Inventors: Masahiko Higashi, Kouichi Yamaguchi, Masanari Kokubu, Hitoshi Kumatabara, Noriaki Hamada, Kenichi Nagae, Michio Shinozaki, Yasuhide Tami
  • Patent number: 5818295
    Abstract: An operational amplifier with improved operational speed, as well as low power consumption, arranges a current mirror made of the pMOS transistors PT.sub.17 and PT.sub.18 in the stage after the initial-stage differential amplifier, supplies the output of the initial-stage differential amplifier to the gate of the nMOS transistor NT.sub.14, supplies the current flowing through the current mirror to the output stage side by a current mirror made of the pMOS transistors PT.sub.15 and PT.sub.16, and lastly a pMOS transistor PT.sub.19 is connected as a constant-current source between the supply line for the power supply voltage V.sub.DD and the node ND.sub.12, and makes the idling current I.sub.19 flow in the node ND.sub.12. Due to this, stabilization of DC operations during normal states and when shifting its states can be designed without considering the characteristics in the vicinity of the threshold voltage of pMOS transistor PT.sub.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: October 6, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Tsuyoshi Chimura, Masahiko Higashi, Tatsumi Satoh
  • Patent number: 5763059
    Abstract: In a circuit board obtained by providing a metallized layer of wiring on the surface or interior of an insulation substrate, the insulation substrate is, for example, a multi-layer circuit board or a package for semiconductor element, the insutating substrate obtained from a sintered body having a linear expansion coefficient of 8 to 18 ppm/.degree. C. at 40.degree. to 400.degree. C. which is prepared by sintering a molded body containing 20 to 80% of a glass having a liner expansion coefficient of 6 to 18 ppm/.degree. C. at 40.degree. to 400.degree. C. and 80 to 20% of a filler having a linear expansion coefficient of at least 6 ppm/.degree. C.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: June 9, 1998
    Assignee: Kyocera Corporation
    Inventors: Kouichi Yamaguchi, Noriaki Hamada, Hideto Yonekura, Takeshi Kubota, Yasuyoshi Kunimatsu, Yasuhide Tami, Masahiko Higashi, Yohji Furukubo
  • Patent number: 5650801
    Abstract: A drive circuit in which the rise and fall characteristics with multiple voltages are made the same, while maintaining a high breakdown voltage. Drive circuit 70, which supplies power supply voltages VH and VL and voltage VM intermediate between them to output pad 32, is composed of p-channel MOS transistor P5 and n-channel MOS transistors N5, N6 and N7. When the output voltage changes from VH to VM, both transistors N6 and N7 conduct, and when the output voltage changes from VL to VM, only transistor N6 conducts. The transistors that supply intermediate voltage VM are constructed of transistors of the same conductivity type, so that the rise and fall characteristics to VM can be made the same while the breakdown voltage of the transistors in the circuit that supplies this intermediate voltage VM is kept high.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 22, 1997
    Assignee: Texas Instruments Japan, Ltd.
    Inventor: Masahiko Higashi