Patents by Inventor Masahiro Sunohara

Masahiro Sunohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9318351
    Abstract: A wiring substrate includes a substrate body, a through hole extending through the substrate body from an upper surface to a lower surface of the substrate body, and a through electrode formed in the through hole. The through electrode includes a conductive layer that forms a cavity in the through hole, and a resin layer that fills the cavity. The conductive layer includes first to third metal layers. The first metal layer is formed on an upper wall surface of the through hole. The second metal layer covers at least a portion of the first metal layer and an upper opening of the through hole. The third metal layer is formed on a lower wall surface of the through hole and connected to at least the first metal layer or the second metal layer.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: April 19, 2016
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Masahiro Sunohara
  • Publication number: 20160064011
    Abstract: A reverberation suppression apparatus includes: an instantaneous value calculation unit that calculates an instantaneous value/instantaneous values in an envelope of values correlating with the absolute value or the square of an input signal; a reverberation estimation unit that calculates an exponential moving average of the instantaneous value(s) as an estimated reverberation component; a gain derivation unit that derives a gain corresponding to the input signal according to the estimated reverberation component and the instantaneous value(s) when the each instantaneous value is larger than the estimated reverberation component, and derives a lower limit of the gain as the gain corresponding to the input signal when the each instantaneous value is smaller than the estimated reverberation component; a smoothing unit that performs a smoothing process on the gain; and a gain processing unit that applies the gain to amplitude adjustment of the input signal thereafter.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 3, 2016
    Applicant: RION CO., LTD.
    Inventors: Masahiro SUNOHARA, Mariko NAKAICHI
  • Publication number: 20160007126
    Abstract: A hearing aid according to an embodiment of the present disclosure includes: a microphone configured to convert sound into an electric signal and output a first signal; a receiver configured to convert the third signal that is generated by performing predetermined hearing aid processing on a second signal, into sound; a first feedback removal unit having an adaptive filter configured to adaptively estimate a first transfer function of a sound feedback path from the receiver to the microphone; and a second feedback removal unit having a fixed filter configured to receive the third signal and use a fixed filter coefficient based on a second transfer function of a vibration feedback path from the receiver to the microphone. The second signal is generated by removing from the first signal, output signals from the adaptive filter and the fixed filter.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 7, 2016
    Applicant: RION Co., Ltd.
    Inventor: Masahiro SUNOHARA
  • Publication number: 20150311154
    Abstract: A wiring substrate includes a substrate body, a through hole extending through the substrate body from an upper surface to a lower surface of the substrate body, and a through electrode formed in the through hole. The through electrode includes a conductive layer that forms a cavity in the through hole, and a resin layer that fills the cavity. The conductive layer includes first to third metal layers. The first metal layer is formed on an upper wall surface of the through hole. The second metal layer covers at least a portion of the first metal layer and an upper opening of the through hole. The third metal layer is formed on a lower wall surface of the through hole and connected to at least the first metal layer or the second metal layer.
    Type: Application
    Filed: April 15, 2015
    Publication date: October 29, 2015
    Inventor: Masahiro SUNOHARA
  • Publication number: 20150083469
    Abstract: A wiring board includes a substrate body provided with a through hole penetrating the substrate body from one surface to another surface; and a through wiring formed in the through hole and including a first metal layer formed on a part of an inner side surface of the through hole at the one surface side, a first wiring layer that covers the first metal layer to fill a part of the through hole at the one surface side, a second metal layer continuously formed on the rest part of the inner side surface of the through hole at the other surface side and on an end portion of the first wiring layer at the other surface side, and a second wiring layer that covers the second metal layer to fill a part of the through hole at the other surface side.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 26, 2015
    Inventors: Masahiro SUNOHARA, Yuichiro SHIMIZU
  • Publication number: 20150071454
    Abstract: A hearing aid includes: a microphone; a hearing aid processing unit configured to provide a gain to a first signal based on an output signal from the microphone to generate a second signal; a receiver configured to convert the second signal into sound; an adaptive filter configured to adaptively estimate a transfer function corresponding to a pathway from an input side of the receiver to an output side of the microphone; and a feedback removal unit configured to subtract a third signal generated based on the transfer function from the output signal of the microphone to obtain a signal and output the signal as the first signal; and a control unit configured to control the gain setting unit and an adaptive speed of the adaptive filter.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Applicant: RION Co., Ltd.
    Inventors: Masahiro SUNOHARA, Kazuteru NISHIYAMA
  • Patent number: 8895868
    Abstract: A wiring substrate includes a wiring layer made of copper, an electrode layer made of copper, and an insulating layer arranged adjacent to the electrode layer. The wiring layer is stacked on the electrode layer and the insulating layer. The insulating layer and the wiring layer are stacked with an adhesive layer interposed between the wiring insulating layer and the wiring layer. The electrode layer and the wiring layer are stacked without the adhesive layer interposed between the electrode layer and the wiring layer.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: November 25, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Masahiro Sunohara
  • Patent number: 8810007
    Abstract: A wiring board provided with a silicon substrate including a through hole that communicates a first surface and a second surface of the silicon substrate. A capacitor is formed on an insulating film, which is applied to the silicon substrate, on the first surface and a wall surface defining the through hole. A capacitor part of the capacitor includes a first electrode, a dielectric layer, and a second electrode that are sequentially deposited on the insulating film on the first surface and the wall surface of the through hole. A penetration electrode is formed in the through hole covered by the first electrode, the dielectric layer, and the second electrode of the capacitor part.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: August 19, 2014
    Assignees: Shinko Electric Industries Co., Ltd., Taiyo Yuden Co., Ltd.
    Inventors: Akihito Takano, Masahiro Sunohara, Hideaki Sakaguchi, Mitsutoshi Higashi, Kenichi Ota, Yuichi Sasajima
  • Patent number: 8669643
    Abstract: A wiring board includes a silicon substrate with a through hole communicating with first and second substrate surfaces. A capacitor includes a capacitor part mounted on an insulating film covering the substrate first surface and including a first electrode on the insulating film, a first dielectric layer on the first electrode, and a second electrode on the first dielectric layer. A multilayer structure arranged on a wall surface defining the through hole includes the insulating film on the through hole wall surface, a first metal layer on the insulating film formed from the same material as the first electrode, a second dielectric layer on the first metal layer formed from the same material as the first dielectric layer, and a second metal layer on the second dielectric layer formed from the same material as the second electrode. The multilayer structure covers a penetration electrode in the through hole.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: March 11, 2014
    Assignees: Shinko Electric Industries Co., Ltd., Taiyo Yuden Co., Ltd.
    Inventors: Akihito Takano, Masahiro Sunohara, Hideaki Sakaguchi, Mitsutoshi Higashi, Kenichi Ota, Yuichi Sasajima
  • Patent number: 8664536
    Abstract: A wiring substrate includes a wiring layer made of copper, an electrode layer made of copper, and an insulating layer arranged adjacent to the electrode layer. The wiring layer is stacked on the electrode layer and the insulating layer. The insulating layer and the wiring layer are stacked with an adhesive layer interposed between the insulating layer and the wiring layer. The electrode layer and the wiring layer are stacked with a copper alloy layer formed adjacent to the adhesive layer and interposed between the electrode layer and the wiring layer.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: March 4, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Shigeaki Suganuma
  • Patent number: 8564077
    Abstract: A package for electronic component comprises a rectangular package body having a flat cut surface to be abutted on a flat mounting surface of a mounting substrate, a first side surface intersecting with the flat cut surface, and a first notch part formed at a boundary between the flat cut surface and the first side surface, an electronic component installed in the package body, and a first pad electrically connected to the electronic component and formed on an inner wall surface of the first notch part.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: October 22, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Masahiro Sunohara, Hideaki Sakaguchi, Yuichi Taguchi, Mitsutoshi Higashi
  • Patent number: 8481863
    Abstract: A substrate includes a storage portion which is defined by a base for mounting a light emitting element and a wall portion standing up on and from the base. A package is structured such that the upper end of the wall portion so formed as to surround the periphery of the storage portion is connected to a cover to thereby seal a light emitting element. A seal structure is composed of an uneven portion formed on the lower surface side surface of the base, a close contact layer formed on the surface of the uneven portion, a power supply layer formed on the close contact layer, and an electrode layer formed on the surface of the power supply layer. The uneven portion includes a first recessed portion formed at a position spaced in the radial direction from the outer periphery of a through electrode or from the inner wall of a through hole, and a second recessed portion formed at a position spaced further outwardly from the first recessed portion.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: July 9, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Masahiro Sunohara, Naoyuki Koizumi, Mitsutoshi Higashi
  • Patent number: 8446013
    Abstract: A wiring substrate includes a substrate body including a first substrate surface and a second substrate surface, a trench being open toward the first substrate surface, the trench having an inner bottom surface and an inner side surface, a through-hole having a first end communicating with the inner bottom surface of the trench and a second end being open toward the second substrate surface, a first conductive layer having a first surface toward the trench and being filled inside at least a portion of the through-hole from the second end, a second conductive layer covering the first surface and at least a part of the inner bottom surface of the trench, and a third conductive layer covering the second conductive layer and being filled inside the trench.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: May 21, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Takayuki Tokunaga, Hedeaki Sakaguchi, Akihito Takano
  • Patent number: 8405953
    Abstract: A capacitor-embedded substrate includes a base material having a desired thickness, and a pair of conductors (feedthrough electrodes) each formed in a desired pattern to penetrate through the base material in the thickness direction thereof, and oppositely disposed with an insulating layer interposed therebetween. The pair of electrodes are formed in comb-shaped patterns, and are oppositely disposed in such a manner that respective comb-tooth portions are meshed with each other.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: March 26, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tomoharu Fujii, Masahiro Sunohara
  • Patent number: 8379400
    Abstract: An interposer mounted wiring board includes a wiring board including outermost wiring layers respectively on both surfaces thereof, the outermost wiring layers being electrically connected to each other through an inside of the board, and first and second interposers electrically connected to the outermost wiring layers on the both surfaces of the board, respectively. Each of the first and second interposers has a value of a coefficient of thermal expansion (CTE), the value being equal or close to a value of a CTE of a corresponding one of first and second electronic components to be mounted respectively on the first and second interposers. The base member of each of the interposers is preferably formed of silicon, and the base member of the wiring board is preferably formed of resin. Further, the electronic components are mounted respectively on surfaces of the interposers and thus form a semiconductor device, the surfaces being opposite to the surfaces of the interposers facing the wiring board.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: February 19, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Masahiro Sunohara
  • Patent number: 8368206
    Abstract: A heat radiation package of the present invention includes a substrate in an upper surface side of which recess portion is provided, embedded wiring portion which is filled in the recess portion of the substrate and on which semiconductor element which generates a heat is mounted, and a heat sink connected to a lower surface side of the substrate. The substrate is made of silicon, ceramics, or insulating resin.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: February 5, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 8350390
    Abstract: A wiring substrate includes a wiring layer, an insulating layer formed on the wiring layer, a connection pad formed on the insulating layer, and a via conductor formed to penetrate the insulating layer, and connecting the wiring layer and the connection pad, wherein the wiring layer located under the connection pad is formed to have via receiving electrode portion whose area is smaller than an area of the connection pad, and a wiring portion separated from the via receiving electrode portion, in an area corresponding to the connection pad, and the via receiving electrode portion is connected to the connection pad via the via conductor.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: January 8, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Masahiro Sunohara, Akinori Shiraishi, Hideaki Sakaguchi
  • Patent number: 8309860
    Abstract: A method of manufacturing an electronic component built-in substrate, includes the steps of mounting a chip-like electronic component having a connection pad and a metal protection layer formed on a whole of one surface to cover the connection pad, on a wiring substrate to direct the connection pad upward; embedding the electronic component with the insulating layer; processing the insulating layer in a thickness direction to leave the insulating layer in a side of the electronic component and to expose the metal protection layer of the electronic component; and forming an upper wiring layer having an in-chip wiring part which is connected to the connection pad and contacts an upper surface of the electronic component and is constructed by an underlying metal pattern layer formed by patterning the metal protection layer and a conductive pattern layer formed thereon, and an extended wiring part which is connected to the in-chip wiring part to extend onto the insulating layer and is formed by an identical layer
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: November 13, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Hideaki Sakaguchi, Hiroshi Shimizu
  • Patent number: 8304862
    Abstract: A semiconductor package includes: a wiring board; and a semiconductor device which is formed on the wiring board; wherein the semiconductor device includes: a semiconductor chip; and a penetration electrode, one end of which is fixed on one plane of the semiconductor chip, and the other end of which penetrates the semiconductor chip and is fixed on the other plane of the semiconductor chip, the penetration electrode penetrating the semiconductor chip in such a manner that the penetration electrode is not contacted to a wall plane of the semiconductor chip by a space portion formed in the semiconductor chip; and the wiring board and the semiconductor device are electrically connected via the penetration electrode.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 6, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Mitsutoshi Higashi, Akinori Shiraishi, Hideaki Sakaguchi, Masahiro Sunohara
  • Patent number: 8299623
    Abstract: A semiconductor package includes a wiring board and a semiconductor device mounted on the wiring board. The semiconductor device includes a semiconductor substrate and a penetration electrode penetrating the semiconductor substrate. A cavity part is formed in the semiconductor substrate to isolate the penetration electrode from the semiconductor substrate. A connection terminal is provided at a position where the connection terminal does not overlap the penetration electrode in a plan view. The connection terminal electrically connects the semiconductor device to the wiring board.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: October 30, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Yuichi Taguchi