Abstract: A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.

Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.

Abstract: A peeling off layer 18 is formed on an entire surface of one surface side of a support plate 10 including the inner wall surfaces respectively of a recessed part 12 for an electronic part and recessed parts 16 for posts in which the posts 20 are formed. Then, the recessed parts 16 are filled with metal to form the posts 20. Then, conductor patterns 28 are formed that electrically connect the electrode terminals 22a of the electronic part 22 inserted into the recessed part 12 to the posts 20. Then, an insulating layer covering the conductor patterns 28 is formed to form an electronic part package 30 on the one surface side of the support plate 10 through the peeling off layer 18. After that, the electronic part package 30 is separated from the support plate 10 by the peeling off layer 18.

Abstract: An electronic parts packaging structure of the present invention includes a core substrate having such a structure that a recess portion is provided by forming a prepreg insulating layer having an opening portion therein on a resin layer, and an electronic parts mounted on a bottom portion of the recess portion of the core substrate such that a connection pad of the electronic parts is directed upward, and also, such a structure may be employed that the electronic parts is embedded in a resin layer of a core substrate having a structure that the resin layer is formed on the prepreg insulating layer.

Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.

Abstract: The present disclosure relates to a method of manufacturing a substrate. The method includes: (a) forming through holes by applying an anisotropic etching to a silicon substrate from a first surface of the silicon substrate; (b) forming a first insulating film to cover the first surface of the silicon substrate, surfaces of the silicon substrate exposed from the through holes, and a second surface of the silicon substrate opposite to the first surface; (c) forming an opening in a portion of the first insulating film provided on the second surface, the portion of the first insulating film corresponding to an area in which the through holes are formed; (d) etching the silicon substrate using the first insulating film provided on the second surface as a mask, thereby forming a cavity in the silicon substrate; and (e) removing the first insulating film.

Abstract: A wiring substrate includes a wiring layer, an insulating layer formed on the wiring layer, a connection pad formed on the insulating layer, and a via conductor formed to penetrate the insulating layer, and connecting the wiring layer and the connection pad, wherein the wiring layer located under the connection pad is formed to have via receiving electrode portion whose area is smaller than an area of the connection pad, and a wiring portion separated from the via receiving electrode portion, in an area corresponding to the connection pad, and the via receiving electrode portion is connected to the connection pad via the via conductor.

Abstract: An electronic parts packaging structure of the present invention includes a wiring substrate having a wiring pattern, a first insulating film which is formed on the wiring substrate and which has an opening portion in a packaging area where an electronic parts is mounted, the electronic parts having a connection terminal flip-chip mounted on the wiring pattern exposed in the opening portion of the first insulating film, a second insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the first and second insulating films on the wiring pattern, and an upper wiring pattern formed on the second insulating film and connected to the wiring pattern through the via hole.

Abstract: A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of silicon substrates.

Abstract: A semiconductor device of the present invention includes a wiring substrate, a plurality of semiconductor chips mounted on the wiring substrate, and a radiation plate arranged over a plurality of semiconductor chips, and having a cooling passage to flow water in a horizontal direction to the wiring substrate. A plurality of semiconductor chips are arranged along the cooling passage, and out of the plurality of semiconductor chips, the semiconductor chip arranged on an inflow side of the cooling passage, has a smaller amount of heat generation than the semiconductor chip arranged on an outflow side of the cooling passage. For example, a memory chip is arranged on the inflow side of the cooling passage, and a logic chip is arranged on the outflow side of the cooling passage.

Abstract: A method of manufacturing an electronic component includes the steps of: a) forming via holes penetrating through a first semiconductor substrate and a second semiconductor substrate which are bonded together by way of a connection layer; b) pattern-etching the second semiconductor substrate using the connection layer as an etch-stop layer to form trenches communicated with the via holes; and c) integrally forming first via plugs buried in the via holes and pattern wirings buried in the trenches through plating.

Abstract: A peeling off layer 18 is formed on an entire surface of one surface side of a support plate 10 including the inner wall surfaces respectively of a recessed part 12 for an electronic part and recessed parts 16 for posts in which the posts 20 are formed. Then, the recessed parts 16 are filled with metal to form the posts 20. Then, conductor patterns 28 are formed that electrically connect the electrode terminals 22a of the electronic part 22 inserted into the recessed part 12 to the posts 20. Then, an insulating layer covering the conductor patterns 28 is formed to form an electronic part package 30 on the one surface side of the support plate 10 through the peeling off layer 18. After that, the electronic part package 30 is separated from the support plate 10 by the peeling off layer 18.

Abstract: An interposer mounted wiring board includes a wiring board including outermost wiring layers respectively on both surfaces thereof, the outermost wiring layers being electrically connected to each other through an inside of the board, and first and second interposers electrically connected to the outermost wiring layers on the both surfaces of the board, respectively. Each of the first and second interposers has a value of a coefficient of thermal expansion (CTE), the value being equal or close to a value of a CTE of a corresponding one of first and second electronic components to be mounted respectively on the first and second interposers. The base member of each of the interposers is preferably formed of silicon, and the base member of the wiring board is preferably formed of resin. Further, the electronic components are mounted respectively on surfaces of the interposers and thus form a semiconductor device, the surfaces being opposite to the surfaces of the interposers facing the wiring board.

Abstract: A printed wiring board is configured to be connected to an organic substrate in a state where a semiconductor chip is mounted thereon. A plurality of first layers are formed of a material having the same coefficient of thermal expansion as the semiconductor chip. A plurality of second layers are formed of a material having the same coefficient of thermal expansion as the organic substrate. The first layers have different thicknesses from each other and the second layers have different thicknesses from each other. The first layers and the second layers form a lamination by being laminated alternately one on another. The thicknesses of the first layers decrease from a side where the semiconductor chip is mounted toward a side where the organic substrate is connected. The thicknesses of the second layers decrease from the side where the organic substrate is connected toward the side where the semiconductor chip is mounted.

Abstract: A method for manufacturing a package which includes: an etching step of etching a silicon substrate, and forming a via hole penetrating through the silicon substrate; and a step of embedding an electrically conductive material in the via hole, and forming a via plug, characterized in that the etching step includes a first etching step of forming the via hole in a straight shape, and a second etching step of forming the via hole in a taper shape.

Abstract: A peeling off layer 18 is formed on an entire surface of one surface side of a support plate 10 including the inner wall surfaces respectively of a recessed part 12 for an electronic part and recessed parts 16 for posts in which the posts 20 are formed. Then, the recessed parts 16 are filled with metal to form the posts 20. Then, conductor patterns 28 are formed that electrically connect the electrode terminals 22a of the electronic part 22 inserted into the recessed part 12 to the posts 20. Then, an insulating layer covering the conductor patterns 28 is formed to form an electronic part package 30 on the one surface side of the support plate 10 through the peeling off layer 18. After that, the electronic part package 30 is separated from the support plate 10 by the peeling off layer 18.

Abstract: A method of manufacturing an electronic component includes the steps of a) forming a plurality of wiring boards that include first through holes penetrating through a semiconductor substrate and conductive material buried in the first through holes; b) providing conductive projections on the conductive material of any of the plurality of wiring boards; and c) bonding the plurality of wiring boards to each other and electrically connecting the conductive material of the respective wiring boards by the projections.

Abstract: In a wiring substrate of a semiconductor device, a hollow portion is provided under a pad wiring portion including a connection pad, and thus a wiring layer has a cantilever structure in which the pad wiring portion is formed as an aerial wiring, and a semiconductor chip is flip-chip connected to the connection pad. The pad wiring portion including the connection pad is formed on a sacrifice layer which is filled in a recess portion in an interlayer insulating layer of the wiring substrate, then the semiconductor chip is flip-chip connected to the connection pad, and then the hollow portion is provided by removing the sacrifice layer.

Abstract: A probe card is disclosed that includes a board having a first surface and a second surface facing away from each other and a through hole formed between the first and second surfaces; and a probe needle having a penetration part and a support part. The penetration part is placed in the through hole without contacting the board and projects from the first and second surfaces of the board. The support part is integrated with a first one of the end portions of the penetration part and connected to one of the first and second surfaces of the board. The support part has a spring characteristic. The penetration part is configured to have a second one of its end portions come into contact with an electrode pad of a semiconductor chip at the time of conducting an electrical test on the semiconductor chip.

Abstract: A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.