Abstract: The optical device 10 includes a light source 13, a mirror element 12 including a mirror 36 for reflecting light emitted from the light source 13 in a predetermined direction, and a mirror element housing body 11 that accommodates the mirror element 12 as well as seals a space D where the mirror element 12 is accommodated, characterized in that the light source 13 is provided inside the mirror element housing body 11.

Abstract: A manufacturing method of an electronic component, characterized by having a first step of forming a treated substrate with a reinforcing part having a treated substrate body and a reinforcing part of the treated substrate body standing on a first principal surface of the treated substrate body, a second step of forming a first conductive pattern on the side of the first principal surface of the treated substrate body and forming a second conductive pattern on the side of a second principal surface of the treated substrate body, respectively, and a third step of cutting the treated substrate body and eliminating the reinforcing part and also dividing the treated substrate body into individual pieces.

Abstract: A substrate includes a storage portion which is defined by a base for mounting a light emitting element and a wall portion standing up on and from the base. A package is structured such that the upper end of the wall portion so formed as to surround the periphery of the storage portion is connected to a cover to thereby seal a light emitting element. A seal structure is composed of an uneven portion formed on the lower surface side surface of the base, a close contact layer formed on the surface of the uneven portion, a power supply layer formed on the close contact layer, and an electrode layer formed on the surface of the power supply layer. The uneven portion includes a first recessed portion formed at a position spaced in the radial direction from the outer periphery of a through electrode or from the inner wall of a through hole, and a second recessed portion formed at a position spaced further outwardly from the first recessed portion.

Abstract: An interposer includes a substrate made of an inorganic material; a through wiring including conductors embedded in through holes; and an upper wiring and (or) a lower wiring. The through wiring, the upper wiring and the lower wiring are respectively formed on preliminary wiring patterns that are additionally simultaneously or sequentially formed on layers made of an insulating material applied to at least wiring forming parts of the substrate, and are formed with a metal mold itself used for forming the preliminary wiring patterns or layers made of a wiring material applied by a printing operation, a plating operation or a deposition on the preliminary wiring patterns formed on the layers of the insulating material by transferring a fine structure pattern of the metal mold.

Abstract: An electronic component embedded substrate and a method for manufacturing the substrate are disclosed. The electronic component embedded substrate includes a substrate main body and an electronic component embedded in the substrate main body. The center plane of the electronic component in the thickness direction thereof and the center plane of the substrate main body in the thickness direction thereof generally match each other.

Abstract: An electronic component has a substrate made of silicon in which a flow path for circulating a refrigerant is formed, a conductive pattern formed on a first principal surface of the substrate, a via plug penetrating the substrate and also connected to the conductive pattern, and an elastically deformable external connection terminal installed on a second principal surface of the substrate.

Abstract: A semiconductor chip includes a semiconductor substrate having a first principal surface, and having a device layer on the first principal surface in which a semiconductor device is formed, an electrode pad disposed on the first principal surface of the semiconductor substrate and electrically connected to the semiconductor device, a through via formed in a through hole penetrating through the semiconductor substrate and the electrode pad, and an Au bump deposited on the electrode pad and the through via such as to electrically connect between the electrode pad and the through via.

Abstract: A light emitting device housing having a concave part is provided therein for housing a light emitting device. Side surfaces of the concave part are each configured to be a perpendicular surface that is substantially perpendicular to a bottom surface of the concave part, and other side surfaces are each configured to be an inclined surface for reflecting light from the light emitting device toward above the light emitting device.

Abstract: It is a lighting apparatus 10 that has a light emitting element 16, a light emitting element housing 15 having a concave portion 28 that accommodates the light emitting element 16, and an optically transparent member 18 that airproofs a space B formed by the concave portion 28 and transmits light emitted from the light emitting element 16. The concave portion 28 is shaped to become wider toward the optically transparent member 18 from the bottom surface 28A of the concave portion 28. The lighting apparatus 10 is provided with a light shielding member 12 for shielding a part of light emitted from the light emitting element 16 is provided on the optically transparent member 18.

Abstract: A plurality of semiconductor packages is collectively fabricated on a wafer in a batch process and the wafer is then diced to obtain discrete semiconductor packages. The semiconductor package is a stacked body formed by bonding two or more semiconductor devices. Each semiconductor device comprises a substrate and a device pattern formed on a surface of the substrate. The semiconductor devices are stacked in such a fashion that a device pattern surface of the lower semiconductor device faces a non-device pattern surface of the semiconductor device stacked on the same.

Abstract: A probe device includes a stage for fixing a semiconductor device having an external connection pad; a heating unit provided in the stage, for heating the semiconductor device to a predetermined temperature; and a probe card having a probe pin and a support substrate for supporting the probe pin, in which a resistance heating element is provided to the support substrate so as to heat a portion of the support substrate corresponding to a disposition portion of the probe pin to a temperature substantially equal to the predetermined temperature.

Abstract: A method of manufacturing an electronic component includes the steps of a) forming a plurality of wiring boards that include first through holes penetrating through a semiconductor substrate and conductive material buried in the first through holes; b) providing conductive projections on the conductive material of any of the plurality of wiring boards; and c) bonding the plurality of wiring boards to each other and electrically connecting the conductive material of the respective wiring boards by the projections.

Abstract: A method of manufacturing an electronic component includes the steps of: a) forming via holes penetrating through a first semiconductor substrate and a second semiconductor substrate which are bonded together by way of a connection layer; b) pattern-etching the second semiconductor substrate using the connection layer as an etch-stop layer to form trenches communicated with the via holes; and c) integrally forming first via plugs buried in the via holes and pattern wirings buried in the trenches through plating.

Abstract: An electronic component device of the present invention includes: a silicon package unit having a structure in which a through electrode provided to a silicon substrate while an electrode post connected to the through electrode is provided upright on an upper side of the silicon substrate; an electronic component mounted on the electrode post and having a connection terminal connected to the top end of the electrode post; and a cap package unit joined onto a periphery of the silicon package unit, and constructing a housing portion in which the electronic component is housed to be hermetically sealed.

Abstract: A semiconductor apparatus comprising a silicon substrate; an device housing space including a concave portion formed in the silicon substrate and a hole perforating through the bottom surface of the concave portion; a plurality of laminated semiconductor devices provided in the device housing space; a first lid which lids the concave portion and a second lid which lids the hole, for sealing the semiconductor devices; and via plugs which are connected to the semiconductor devices, penetrating the bottom surface of the concave portion.

Abstract: A method for manufacturing a package which includes: an etching step of etching a silicon substrate, and forming a via hole penetrating through the silicon substrate; and a step of embedding an electrically conductive material in the via hole, and forming a via plug, characterized in that the etching step includes a first etching step of forming the via hole in a straight shape, and a second etching step of forming the via hole in a taper shape.

Abstract: A light-emitting device includes a light-emitting element 12 and a wiring substrate 11 having a substrate body 17 having a protruding portion 25 at a position where the light-emitting device 12 is disposed and wiring patterns 21 and 22 disposed on the substrate body 17 and electrically connected to the light-emitting element 12.

Abstract: A semiconductor device includes a laminated substrate formed by laminating a plurality of semiconductor substrates, a concave part formed in the laminated substrate, and a semiconductor element mounted in the concave part. A method of manufacturing a semiconductor device includes a first step of forming a laminated substrate by laminating a plurality of semiconductor substrates, a second step of forming a concave part by etching the laminated substrate, and a third step of mounting a semiconductor element in the concave part.

Abstract: A multilayer wiring substrate has a plurality of wiring layers and interlayer insulating films, as well as a via of a type which connects between adjacent wiring layers and a via of a type which connects upper and lower wiring layers through two or more interlayer insulating films, wherein at least some of the interlayer insulating films are formed of inorganic insulating films, and the via of the type, which connects upper and lower wiring layers through two or more interlayer insulating films, is formed as a single via which penetrates through the interlayer insulating films all of which are formed of the inorganic insulating films. Preferably, all of the insulating films are formed of the inorganic insulating films, and the inorganic insulating films are formed by a low-temperature CVD method. The thickness of the inorganic insulating films is preferably between 0.5 and 2.0 ?m.

Abstract: An electronic parts packaging structure of the present invention includes a core substrate having such a structure that a recess portion is provided by forming a prepreg insulating layer having an opening portion therein on a resin layer, and an electronic parts mounted on a bottom portion of the recess portion of the core substrate such that a connection pad of the electronic parts is directed upward, and also, such a structure may be employed that the electronic parts is embedded in a resin layer of a core substrate having a structure that the resin layer is formed on the prepreg insulating layer.