Patents by Inventor Masahiro Sunohara

Masahiro Sunohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electronic parts packaging structure and method of manufacturing the same
    Publication number: 20090250257
    Abstract: An electronic parts packaging structure of the present invention includes a core substrate having such a structure that a recess portion is provided by forming a prepreg insulating layer having an opening portion therein on a resin layer, and an electronic parts mounted on a bottom portion of the recess portion of the core substrate such that a connection pad of the electronic parts is directed upward, and also, such a structure may be employed that the electronic parts is embedded in a resin layer of a core substrate having a structure that the resin layer is formed on the prepreg insulating layer.
    Type: Application
    Filed: June 8, 2009
    Publication date: October 8, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro Sunohara, Kei Murayama, Hiroyuki Kato, Syoji Watanabe
  • METHOD OF MANUFACTURING WIRING SUBSTRATE
    Publication number: 20090242107
    Abstract: A method includes the steps of providing a first tape base material on a single side of a stiffener substrate, forming, on the stiffener substrate, a cavity for accommodating a semiconductor chip therein, inserting the stiffener substrate in the cavity and providing the stiffener substrate on the first tape base material, sealing the semiconductor chip and the stiffener substrate with a sealing resin, and removing the first tape base material and forming a build-up layer on a tape removing surface.
    Type: Application
    Filed: March 24, 2009
    Publication date: October 1, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Hideaki Sakaguchi
  • WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20090236727
    Abstract: A wiring substrate is provided. The wiring substrate includes a multilayer wiring structure and a stiffener. The multilayer wiring structure includes: a plurality of insulating layers; a plurality of wiring patterns; and a plurality of chip mounting pads which are electrically connected to the wiring patterns and on which a semiconductor chip is flip-chip mounted. The stiffener is provided on a portion of the multilayer wiring structure, which is outside of a mounting area on which the semiconductor chip is flip-chip mounted. A thermal expansion coefficient of the stiffener is substantially equal to that of the semiconductor chip.
    Type: Application
    Filed: March 23, 2009
    Publication date: September 24, 2009
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Kei MURAYAMA, Masahiro Sunohara, Hideaki Sakaguchi, Mitsutoshi Higashi
  • METHOD OF MANUFACTURING WIRING SUBSTRATE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20090236024
    Abstract: A method of manufacturing a wiring substrate is disclosed. The method includes: (a) preparing a supporting substrate including a main body and a through electrode penetrating the main body, wherein the supporting substrate includes a first surface and a second surface opposite to the first surface, and a trace is formed on the second surface of the supporting substrate; (b) forming a build-up wiring structure by alternately forming a wiring layer and an insulating layer on the first surface of the supporting substrate; and (c) obtaining a wiring substrate by separating the build-up wiring structure from the supporting substrate. Step (b) includes: forming the wiring layer using the through electrode as a power feeding wiring, and step (c) includes: peeling the build-up wiring structure from the supporting substrate to obtain the wiring substrate.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 24, 2009
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Mitsutoshi HIGASHI, Kei Murayama, Masahiro Sunohara, Hideaki Sakaguchi
  • METHOD OF MANUFACTURING WIRING SUBSTRATE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20090236031
    Abstract: There are provided a step of preparing a dummy chip, a step of forming a cavity in a stiffener substrate, a step of providing a second tape base member on one surface of the stiffener substrate, a step of inserting the dummy chip into the cavity to provide the dummy chip on the second tape base member, a step of sealing the stiffener substrate and the dummy chip with a sealing resin, a step of removing the second tape base member and forming a build-up wiring layer on a surface from which the second tape base member is removed, a step of removing the sealing resin; and a step of peeling the dummy chip from the build-up wiring layer.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 24, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Hideaki Sakaguchi
  • Semiconductor chip and method of manufacturing semiconductor chip
    Patent number: 7592700
    Abstract: A semiconductor chip includes a semiconductor substrate having a first principal surface, and having a device layer on the first principal surface in which a semiconductor device is formed, an electrode pad disposed on the first principal surface of the semiconductor substrate and electrically connected to the semiconductor device, a through via formed in a through hole penetrating through the semiconductor substrate and the electrode pad, and an Au bump deposited on the electrode pad and the through via such as to electrically connect between the electrode pad and the through via.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: September 22, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Mitsutoshi Higashi
  • METHOD OF MANUFACTURING WIRING BOARD AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
    Publication number: 20090223046
    Abstract: A method of manufacturing a wiring board having a semiconductor chip mounting surface for mounting a semiconductor chip thereon which is manufactured by a process including a step of forming a wiring layer and an insulating layer on a support board and a step of removing the support board, including a peeling layer forming step of forming a peeling layer on the support board formed by a material having a coefficient of thermal expansion which is equal to that of a semiconductor substrate constituting the semiconductor chip, and a support board removing step of removing the support board by carrying out a predetermined treatment over the peeling layer.
    Type: Application
    Filed: February 26, 2009
    Publication date: September 10, 2009
    Applicant: Shinko Electric Industries, Co., Ltd.
    Inventors: Kei Murayama, Mitsutoshi Higashi, Masahiro Sunohara
  • Electronic parts packaging structure and method of manufacturing the same
    Publication number: 20090206471
    Abstract: An electronic parts packaging structure of the present invention includes a wiring substrate having a wiring pattern, a first insulating film which is formed on the wiring substrate and which has an opening portion in a packaging area where an electronic parts is mounted, the electronic parts having a connection terminal flip-chip mounted on the wiring pattern exposed in the opening portion of the first insulating film, a second insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the first and second insulating films on the wiring pattern, and an upper wiring pattern formed on the second insulating film and connected to the wiring pattern through the via hole.
    Type: Application
    Filed: April 21, 2009
    Publication date: August 20, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro Sunohara, Kei Murayama, Toshinori Koyama, Kazutaka Kobayashi, Mitsutoshi Higashi
  • Semiconductor chip and method of manufacturing semiconductor chip
    Patent number: 7576004
    Abstract: A semiconductor chip includes a semiconductor substrate having a first principal surface, and having a device layer on the first principal surface in which a semiconductor device is formed, an electrode pad disposed on the first principal surface of the semiconductor substrate and electrically connected to the semiconductor device, a through via formed in a through hole penetrating through the semiconductor substrate and the electrode pad, and an Au bump deposited on the electrode pad and the through via such as to electrically connect between the electrode pad and the through via.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: August 18, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Mitsutoshi Higashi
  • Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film
    Patent number: 7573135
    Abstract: The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where the connection terminal is directed upward, forming a second resin film for covering the electronic parts, obtaining an insulation film by curing the first and second resin films by heat treatment, forming a via hole in a predetermined portion of the insulation film on the wiring pattern and the connection terminal, and forming an upper wiring pattern connected to the wiring pattern and the connection terminal through the via hole, on the insulation film.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: August 11, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Toshinori Koyama
  • WIRING BOARD WITH SWITCHING FUNCTION AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20090196001
    Abstract: A wiring board for use in mounting an electronic component includes a switch element portion interposed in a signal transmission line including a wiring layer linked to an electrode terminal of the electronic component. The switch element portion has such a structure as to change the shape thereof depending on a temperature, and to disconnect the signal transmission line when the temperature exceeds a predetermined temperature. A conductor layer which constitutes a portion of the signal transmission line is formed at the bottom of a cavity formed in an electronic component mounting surface side of the wiring board. One end of the switch element portion is fixedly connected to the wiring layer, and another end thereof is in contact with the conductor layer when the temperature is equal to or lower than the predetermined temperature.
    Type: Application
    Filed: January 27, 2009
    Publication date: August 6, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro SUNOHARA, Kei Murayama
  • WIRING BOARD AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20090183911
    Abstract: A wiring board includes an external connection terminal of a cylindrical shape, in which an electrode terminal of the electronic component to be mounted is fitted. In one configuration, a portion of the external connection terminal is electrically connected to a pad portion formed on an electronic component mounting surface side of the wiring board, and the external connection terminal is curvedly formed in such a shape that the outer periphery of the electrode terminal comes into close contact with the inner periphery of the middle portion of the external connection terminal when the electrode terminal is inserted into the external connection terminal.
    Type: Application
    Filed: January 5, 2009
    Publication date: July 23, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro SUNOHARA, Kei Murayama, Takaharu Yamano
  • WIRING BOARD AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20090183910
    Abstract: First, a structure is fabricated by directly bonding a first base material and a second base material. The first base material has a recessed portion formed in a desired patterning layout on one surface thereof, and the bonding is performed in such a manner that the surface having the recessed portion of the first base material faces inward. Then, through holes are formed at desired positions in the structure in such a manner that the through holes pierce the structure in a direction of thickness thereof and communicate with the corresponding recessed portions. Further, an insulating layer is formed on the surface of the structure, and thereafter, a conductive material is filled into the through holes and the recessed portions.
    Type: Application
    Filed: January 7, 2009
    Publication date: July 23, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Masahiro SUNOHARA
  • Electronic parts packaging structure and method of manufacturing the same
    Patent number: 7563987
    Abstract: An electronic parts packaging structure of the present invention includes a core substrate having such a structure that a recess portion is provided by forming a prepreg insulating layer having an opening portion therein on a resin layer, and an electronic parts mounted on a bottom portion of the recess portion of the core substrate such that a connection pad of the electronic parts is directed upward, and also, such a structure may be employed that the electronic parts is embedded in a resin layer of a core substrate having a structure that the resin layer is formed on the prepreg insulating layer.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: July 21, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Hiroyuki Kato, Syoji Watanabe
  • WIRING BOARD AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC COMPONENT DEVICE USING THE WIRING BOARD AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20090174083
    Abstract: A wiring board is provided with an external connection terminal to which an electrode terminal of an electronic component is to be connected. The external connection terminal is formed so that a portion thereof is electrically connected to a pad portion exposed from an outermost insulating layer on an electronic component mounting surface of a wiring board body and so that an air gap is kept between a portion of the external connection terminal, to which the electrode terminal of the electronic component is to be connected, and the insulating layer.
    Type: Application
    Filed: December 11, 2008
    Publication date: July 9, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro SUNOHARA, Kiyoshi Ol
  • Wiring substrate and electronic parts packaging structure
    Patent number: 7557450
    Abstract: In a wiring substrate of the present invention in which a bump of an electronic parts is bonded to a connection pad of a wiring pattern provided on an insulating film by an ultrasonic flip-chip packaging, a via hole into which a via post acting as a strut to support the connection pad upon the ultrasonic flip-chip packaging is filled is arranged in the insulating film under the connection pad.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: July 7, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Masahiro Sunohara
  • Method of manufacturing semiconductor chip
    Patent number: 7557037
    Abstract: A insulation film removing tape 38 is pasted on a metal film 34 so as to cover an opening portion 32, then an insulation film 17 is formed so as to cover the side wall of a through hole 21 from the second major surface 11B side of the semiconductor substrate 11, and thereafter the insulation film removing tape 38 is removed.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: July 7, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Masahiro Sunohara
  • Electronic parts packaging structure
    Patent number: 7545049
    Abstract: An electronic parts packaging structure of the present invention includes a wiring substrate having a wiring pattern, a first insulating film which is formed on the wiring substrate and which has an opening portion in a packaging area where an electronic parts is mounted, the electronic parts having a connection terminal flip-chip mounted on the wiring pattern exposed in the opening portion of the first insulating film, a second insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the first and second insulating films on the wiring pattern, and an upper wiring pattern formed on the second insulating film and connected to the wiring pattern through the via hole.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: June 9, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Toshinori Koyama, Kazutaka Kobayashi, Mitsutoshi Higashi
  • WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF
    Publication number: 20090139751
    Abstract: In a wiring substrate having a wiring member 30B made by layering insulating layers 20, 20a, 20b, 20c and wiring layers 18, 18a, 18b, 18c, 18d, and a reinforcing body 50A disposed between the insulating layers of this wiring member 30B, this reinforcing body 50A is configured to cross plural linear members 51A.
    Type: Application
    Filed: November 26, 2008
    Publication date: June 4, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Masahiro SUNOHARA
  • SILICON INTERPOSER AND SEMICONDUCTOR DEVICE PACKAGE AND SEMICONDUCTOR DEVICE INCORPORATING THE SAME
    Publication number: 20090121344
    Abstract: A silicon interposer 30 being held between a wiring board 40 and a semiconductor element 60 to electrically connect the wiring board 40 to the semiconductor element 60, wherein through-hole electrodes 17 for electrically connecting the wiring board 40 to the semiconductor element 60 are each formed of a base section and a buffer section, and the buffer section is formed of a conductive material having an elastic coefficient lower than that of the conductive material of the base section, and a semiconductor device package 50 and a semiconductor device 70 incorporating the silicon interposer 30.
    Type: Application
    Filed: October 24, 2008
    Publication date: May 14, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Masahiro SUNOHARA