Patents by Inventor Masahiro Sunohara

Masahiro Sunohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090121345
    Abstract: A silicon interposer producing method comprising the steps of forming through holes 12 in a silicon wafer 11, forming an oxide coating 13 on the silicon wafer 11, providing a power feeding layer 14 for plating on one of the surfaces of the through holes 12, supplying a low thermal expansion filler 15 having a thermal expansion coefficient lower than the thermal expansion coefficient of the conductive material 16 of through-hole electrodes 17 to the through holes 12, filling the conductive material 16 into the through holes 12 by plating to form the through-hole electrodes 17, and removing the power feeding layer 14 for plating.
    Type: Application
    Filed: October 28, 2008
    Publication date: May 14, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Masahiro SUNOHARA
  • Publication number: 20090121334
    Abstract: A required number of wiring layers 32 are formed on a temporary substrate 31 of which thermal expansion coefficient differs from that of a semiconductor chip 38 by 2×10?6/° C. or less and a part of the wiring layer of the uppermost layer is exposed to an opening part of an insulating layer 36 of the uppermost layer as a pad 34 and a wiring substrate is fabricated and a solder bonding member of the semiconductor chip 38 is brought into contact with the pad 34 of the wiring substrate and reflow is performed and the semiconductor chip 38 is attached to the wiring substrate 36. Thereafter, an outer peripheral part of the attached semiconductor chip 38 is sealed while exposing an upper surface of the semiconductor chip and removing the temporary substrate 31 and then a terminal for external connection is formed on the wiring substrate.
    Type: Application
    Filed: November 6, 2008
    Publication date: May 14, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kiyoshi Oi, Masahiro Sunohara, Tomoharu Fujii
  • Patent number: 7530163
    Abstract: There is provided a electronic parts packaging structure that includes a mounted body on which an electronic parts is mounted, the electronic parts having a connection pad, which has an etching stopper film (a copper film, a gold film, a silver film, or a conductive past film) as an uppermost film, and mounted on the mounted body to direct the connection pad upward, an interlayer insulating film for covering the electronic parts, a via hole formed in the insulating film on the connection pad of the electronic parts, and a wiring pattern connected to the connection pad via the via hole.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: May 12, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Naohiro Mashino, Mitsutoshi Higashi
  • Publication number: 20090115073
    Abstract: In a wiring substrate of a semiconductor device, a hollow portion is provided under a pad wiring portion including a connection pad, and thus a wiring layer has a cantilever structure in which the pad wiring portion is formed as an aerial wiring, and a semiconductor chip is flip-chip connected to the connection pad. The pad wiring portion including the connection pad is formed on a sacrifice layer which is filled in a recess portion in an interlayer insulating layer of the wiring substrate, then the semiconductor chip is flip-chip connected to the connection pad, and then the hollow portion is provided by removing the sacrifice layer.
    Type: Application
    Filed: November 3, 2008
    Publication date: May 7, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro SUNOHARA, Yoshihiro Machida
  • Publication number: 20090115049
    Abstract: A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of silicon substrates.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 7, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Publication number: 20090108411
    Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.
    Type: Application
    Filed: October 24, 2008
    Publication date: April 30, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7524753
    Abstract: A method of manufacturing a semiconductor device having a through electrode, includes forming through holes 36 in a substrate 31, forming a first metal layer 39 from one surface side of the substrate and pasting a protection film 40 on one surface of the substrate, forming through electrodes by filling the through holes with a second metal by means of an electroplating of the second metal 42 applied from other surface of the substrate while using the first metal layer as a power feeding layer, removing the protection film 40, and removing the first metal layer 39 located in areas other than peripheral portions of the through electrodes.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: April 28, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Mitsutoshi Higashi, Akinori Shiraishi, Hideaki Sakaguchi
  • Publication number: 20090095974
    Abstract: A semiconductor package including a base body having a recessed portion for installing an electronic component on one surface, the recessed portion including an inner bottom surface, inclined surface and a shoulder part and a wiring pattern having one end positioned in the inner bottom surface of the recessed portion and the other end extending to an outside region of the recessed portion beyond the shoulder part of the recessed portion. The shoulder part of the recessed portion is a smoothly curved surface.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 16, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20090098712
    Abstract: A method of dividing a substrate 10 into individual pieces by setting dividing lines A used to dividing the substrate 10 into individual pieces at a predetermined interval in a vertical direction and a horizontal direction and then dividing the substrate 10 along the dividing lines A, includes a step of forming chamfering patterns 14 to form through holes, which are used to chamfer corner portions of individual pieces of the substrate, in respective intersection points between the dividing lines on the substrate, a step of forming chamfering through holes by etching the substrate 10, and a step of obtaining the individual pieces of the substrate by separating the substrate in the vertical direction and the horizontal direction along the dividing lines A respectively.
    Type: Application
    Filed: October 15, 2008
    Publication date: April 16, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20090093117
    Abstract: A method of manufacturing a substrate, includes: (a) forming the through hole by etching the silicon substrate from a first surface of the silicon substrate by a Bosch process; (b) forming a thermal oxide film such that the thermal oxide film covers the first surface of the silicon substrate, a second surface of the silicon substrate opposite to the first surface, and a surface of the silicon substrate corresponding to a side surface of the through hole, by thermally oxidizing the silicon substrate where the through hole is formed; (c) removing the thermal oxide film; (d) forming an insulating film such that the insulating film covers the first and second surfaces of the silicon substrate and the surface of the silicon substrate corresponding to the side surface of the through hole; and (e) forming the through electrode in the through hole on which the insulating film is formed.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 9, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20090081867
    Abstract: The present disclosure relates to a method of manufacturing a substrate. The method includes: (a) forming through holes by applying an anisotropic etching to a silicon substrate from a first surface of the silicon substrate; (b) forming a first insulating film to cover the first surface of the silicon substrate, surfaces of the silicon substrate exposed from the through holes, and a second surface of the silicon substrate opposite to the first surface; (c) forming an opening in a portion of the first insulating film provided on the second surface, the portion of the first insulating film corresponding to an area in which the through holes are formed; (d) etching the silicon substrate using the first insulating film provided on the second surface as a mask, thereby forming a cavity in the silicon substrate; and (e) removing the first insulating film.
    Type: Application
    Filed: September 19, 2008
    Publication date: March 26, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuichi TAGUCHI, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Patent number: 7508057
    Abstract: An electronic component device of the present invention includes: a silicon package unit having a structure in which a through electrode provided to a silicon substrate while an electrode post connected to the through electrode is provided upright on an upper side of the silicon substrate; an electronic component mounted on the electrode post and having a connection terminal connected to the top end of the electrode post; and a cap package unit joined onto a periphery of the silicon package unit, and constructing a housing portion in which the electronic component is housed to be hermetically sealed.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: March 24, 2009
    Assignee: Shinko Electric Industries, Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7507602
    Abstract: There are included the steps of preparing a wiring substrate having a wiring pattern on a surface, bonding a connection terminal of electronic chip, which has a predetermined element and the connection terminal on one surface, to the wiring pattern of the wiring substrate by a flip-chip bonding, forming an insulating film on the wiring substrate to have a film thickness that covers the electronic chip, or a film thickness that exposes at least another surface of the electronic chip, and reducing a thickness of the electronic chip by grinding another surface of the electronic chip and the insulating film.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: March 24, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Masahiro Sunohara
  • Publication number: 20090067116
    Abstract: A capacitor-embedded substrate includes a base material having a desired thickness, and a pair of conductors (feedthrough electrodes) each formed in a desired pattern to penetrate through the base material in the thickness direction thereof, and oppositely disposed with an insulating layer interposed therebetween. The pair of electrodes are formed in comb-shaped patterns, and are oppositely disposed in such a manner that respective comb-tooth portions are meshed with each other.
    Type: Application
    Filed: August 14, 2008
    Publication date: March 12, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tomoharu FUJII, Masahiro Sunohara
  • Patent number: 7498200
    Abstract: The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where the connection terminal is directed upward, forming a second resin film for covering the electronic parts, obtaining an insulation film by curing the first and second resin films by heat treatment, forming a via hole in a predetermined portion of the insulation film on the wiring pattern and the connection terminal, and forming an upper wiring pattern connected to the wiring pattern and the connection terminal through the via hole, on the insulation film.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: March 3, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Toshinori Koyama
  • Patent number: 7494898
    Abstract: A disclosed method for manufacturing a semiconductor device having a structure where a semiconductor element is mounted on a first substrate includes the steps of: bonding the first substrate on which the semiconductor element is mounted and a second substrate made of a material different from a material of the first substrate so as to encapsulate the semiconductor element; forming a first groove in the first substrate and a second groove in the second substrate; and cleaving a portion between the first groove and the second groove so as to individualize the semiconductor device.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: February 24, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Yuichi Taguchi, Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20090039379
    Abstract: A heat radiation package of the present invention includes a substrate in an upper surface side of which recess portion is provided, embedded wiring portion which is filled in the recess portion of the substrate and on which semiconductor element which generates a heat is mounted, and a heat sink connected to a lower surface side of the substrate. The substrate is made of silicon, ceramics, or insulating resin.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 12, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Publication number: 20090039999
    Abstract: An inductor device formed on a semiconductor substrate includes an inductor body penetrating the semiconductor substrate, taking a spiral shape and having a conductivity, and an insulating film provided between a side surface of the inductor body and the semiconductor substrate.
    Type: Application
    Filed: August 5, 2008
    Publication date: February 12, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tomoharu Fujii, Masahiro Sunohara, Manabu Nakamura
  • Publication number: 20090040715
    Abstract: A semiconductor device of the present invention includes a wiring substrate, a plurality of semiconductor chips mounted on the wiring substrate, and a radiation plate arranged over a plurality of semiconductor chips, and having a cooling passage to flow water in a horizontal direction to the wiring substrate. A plurality of semiconductor chips are arranged along the cooling passage, and out of the plurality of semiconductor chips, the semiconductor chip arranged on an inflow side of the cooling passage, has a smaller amount of heat generation than the semiconductor chip arranged on an outflow side of the cooling passage. For example, a memory chip is arranged on the inflow side of the cooling passage, and a logic chip is arranged on the outflow side of the cooling passage.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 12, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7488094
    Abstract: A semiconductor device made by mounting a light emitting element on a substrate, where an optically-transparent cover with a flat plate shape is installed on the light emitting element and a groove part for suppressing reflection of light emission of the light emitting element is formed in the cover.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: February 10, 2009
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Naoyuki Koizumi, Hideaki Sakaguchi, Mitsutoshi Higashi, Yuichi Taguchi