Patents by Inventor Masakatsu Maeda

Masakatsu Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090096114
    Abstract: An epoxy resin composition for encapsulating a semiconductor chip according to this invention comprises (A) a crystalline epoxy resin, (B) a phenol resin represented by general formula (1): wherein R1 and R2 are independently hydrogen or alkyl having 1 to 4 carbon atoms and two or more R1s or two or more R2s are the same or different; a is integer of 0 to 4; b is integer of 0 to 4; c is integer of 0 to 3; and n is average and is number of 0 to 10, (C) a (co)polymer containing butadiene-derived structural unit or its derivative, and (D) an inorganic filler in the amount of 80 wt % to 95 wt % both inclusive in the total epoxy resin composition.
    Type: Application
    Filed: November 13, 2008
    Publication date: April 16, 2009
    Inventors: Takahiro Kotani, Hidetoshi Seki, Masakatsu Maeda, Kazuya Shigeno, Yoshinori Nishitani
  • Publication number: 20090010372
    Abstract: A modulation apparatus 24 comprises a monitoring section 207 operable to monitor information about a control voltage applied to a VCO 201 as control voltage information, during any period, when a low-frequency signal having a frequency within a loop band of a PLL circuit is input at least before an LPF 209, a correction table storing section 206 operable to associate the control voltage information monitored by the monitoring section 207 as information about a control voltage after correction with information about a control voltage before correction, and store the associated information as a correction table, and a correction section 204 operable to correct a control voltage applied to the VCO 201 based on the correction table stored in the correction table storing section.
    Type: Application
    Filed: July 5, 2007
    Publication date: January 8, 2009
    Inventor: Masakatsu Maeda
  • Publication number: 20080284309
    Abstract: An insulating material high both in thermal conductivity and light reflectance, and a submount high in heat radiatability for mounting an LED element thereon, capable of raising a light utilization factor and quickly radiating heat generated from the element. For example, used as a substrate material of a submount is a nitride sintered body having a reflectance of light in the wavelength region of from 350 nm to 800 nm of 50% or more and a reflectance of light with a wavelength of 700 nm of 60% or more, obtained by sintering a preform consisting of a composition containing 100 parts by mass of aluminum nitride powder and 0.5 to 10 parts by mass of a compound containing an alkaline earth metal such as 3CaOƗAl2O3 in an inert atmosphere containing a specific quantity of carbon vapor, or by burning a coat of a nitride paste applied on a base substrate having a heat resistance at a predetermined temperature.
    Type: Application
    Filed: June 20, 2005
    Publication date: November 20, 2008
    Applicant: TOKUYAMA CORPORATION
    Inventors: Yasuyuki Yamamoto, Yukihiro Kanechika, Masakatsu Maeda
  • Publication number: 20080150648
    Abstract: Transistors M11 and M12 are cross-coupled to each other so as to form a negative resistance circuit. First and second variable capacitor sections 10 and 20 are connected in parallel with an inductor circuit so as to form a parallel resonant circuit. A first reference voltage Vref1 and a control voltage VT1 corresponding to a carrier wave component are fed to both terminals, respectively, of each of variable capacitors VC11 and VC12 included in the first variable capacitor section 10. A second reference voltage Vref2 and a control voltage VT2 corresponding to a modulated wave component are fed to both terminals, respectively, of each of variable capacitors VC21 and VC22 included in the second variable capacitor section 20.
    Type: Application
    Filed: December 10, 2007
    Publication date: June 26, 2008
    Inventor: Masakatsu MAEDA
  • Publication number: 20080145518
    Abstract: An element-mounting substrate includes a ceramic substrate, an electrode layer formed on the substrate and a ceramic coating layer which is formed on a part of the electrode layer and has a thickness of 5 to 50 ?m. A process for producing the element-mounting substrate includes the steps of forming an electrode precursor layer in the shape of a pattern of an electrode layer on a ceramic plate or a green sheet of a large diameter, forming a ceramic coating precursor layer on a part of the electrode precursor layer and then firing the resulting precursor. In this process, it is preferable to form the ceramic coating layer so as to cover the electrode layer on a predetermined cutting line of the firing product. According to the element-mounting substrate in which a part of the electrode layer is covered with a ceramic, a failure in mounting an element attributable to the thickness of the ceramic coating layer can be prevented when the element is mounted.
    Type: Application
    Filed: November 18, 2005
    Publication date: June 19, 2008
    Applicant: Tokuyama Corporation
    Inventors: Masakatsu Maeda, Yasuyuki Yamamoto, Kunihiro Gotoh
  • Publication number: 20080131673
    Abstract: The process for producing a metallized ceramic substrate of the present invention comprises a step (A) of preparing a raw material substrate comprising a ceramic substrate which may have on its surface a conductive layer or a conductor paste layer, a step (B) of preparing a metallized ceramic substrate precursor, said step (B) comprising a step of forming a ceramic paste layer on the raw material substrate and a step of forming a conductive paste layer on the ceramic paste layer, and a step (C) of firing the metallized ceramic substrate precursor obtained in the previous step. In the step (B), formation of a ceramic paste layer and formation of a conductive paste layer may be alternately repeated plural times. According to the present invention, running or spreading of the conductive paste is prevented, and a metallized ceramic substrate which has a high degree of freedom of wiring design and high reliability and has a fine metallization pattern can be produced.
    Type: Application
    Filed: December 13, 2005
    Publication date: June 5, 2008
    Inventors: Yasuyuki Yamamoto, Masakatsu Maeda, Kunihiro Gotoh
  • Patent number: 7339420
    Abstract: A loop filter which is a component of a PLL circuit includes a switching element for switching a capacitance value which connects and disconnects a second capacitive element to a first capacitive element according to a natural angular frequency switching signal, and a switching element for switching a resistance value which short-circuits and opens between both ends of a resistance element according to a natural angular frequency switching signal in order to keep a damping factor at a constant value. It further includes an operational amplifier for charging the second capacitive element at the same potential as the first capacitive element when the second capacitive element is isolated from the first capacitive element.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: March 4, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masakatsu Maeda
  • Publication number: 20080023713
    Abstract: A package for housing a light-emitting element wherein a via hole for wiring provided so as to pass through an insulating substrate is arranged in such a manner that it is positioned under a reflector frame; a method for manufacturing the above package for housing a light-emitting element which comprises the steps of separately providing a green sheet for the substrate and a green sheet for the frame, causing a paste containing a ceramic powder to be present between the two green sheets to bind them, and subjecting them to degreasing and sintering, to thereby integrate them.
    Type: Application
    Filed: September 29, 2005
    Publication date: January 31, 2008
    Applicant: Tokuyama Corporation
    Inventors: Masakatsu Maeda, Yasuyuki Yamamoto
  • Publication number: 20080020224
    Abstract: A metallized aluminum substrate for mounting a semiconductor device such as LD or LED is provided and a metallized aluminum nitride substrate having excellent dimensional accuracy and high bonding strength of a wiring pattern. An intermediate material substrate is provided, comprising a sintered aluminum nitride substrate having on its surface a wiring pattern constituted of a conductor layer composed of a composition containing at least high-melting point metal powder, aluminum nitride powder and a sintering auxiliary agent for aluminum nitride is prepared. Then, the intermediate material substrate is fired while the sintered aluminum nitride obtained by sintering using a sintering auxiliary agent of the same kind as that of the sintering auxiliary agent contained in the composition is placed so as to be brought into contact with the conductor layer on the surface of the intermediate material substrate or so as to be present in the vicinity of the conductor layer.
    Type: Application
    Filed: November 10, 2005
    Publication date: January 24, 2008
    Inventors: Yasuyuki Yamamoto, Masakatsu Maeda
  • Publication number: 20070297530
    Abstract: Provided is a transmission circuit operating with high efficiency and low distortion. An amplitude and phase extraction section 11 extracts amplitude data and phase data from input data. A phase modulation section 12 phase-modulates the phase data to output a resultant signal as a phase-modulated signal. An amplifier section 13 amplifies the phase-modulated signal to output a resultant signal as a transmission signal. An amplitude control section 15 supplies, to the amplifier section 13, a voltage controlled in accordance with an AC component represented by a fluctuation component of the amplitude data and a DC component represented by an average value level of the fluctuation component of the amplitude data.
    Type: Application
    Filed: June 21, 2007
    Publication date: December 27, 2007
    Inventors: Masakatsu Maeda, Taichi Ikedo
  • Publication number: 20070272938
    Abstract: A light-emitting element storing package which ensures the efficient reflection of light emitted by a light-emitting element by a reflector frame and thereby improves the brightness of the emitted light, and a method of manufacturing the same are provided. The light-emitting element storing package includes: an insulating substrate consisting of a ceramic board, a reflector frame composed of a ceramic material, joined to the upper surface of the substrate along its outer edge and having an inner wall surface defining a light-reflecting surface, and a wiring pattern layer formed on the upper surface of the substrate for connection with a light-emitting element, a light-emitting element storing concave portion, which is defined by the substrate and the reflector frame, and in which the light-emitting element is mounted on the wiring pattern layer, the reflector frame is mainly composed of nitride ceramics and its light-reflecting surface is composed of white ceramics.
    Type: Application
    Filed: August 3, 2005
    Publication date: November 29, 2007
    Applicant: Tokuyama Corporation
    Inventors: Masakatsu Maeda, Yasuyuki Yamamoto, Yukihiro Kanechika
  • Publication number: 20070252523
    Abstract: A ceramic substrate for mounting a light emitting element. The ceramic substrate has a placement surface for placing a light emitting element having an electrode; and an electrode electrically-connected with the electrode of the light emitting element, wherein the ceramic substrate comprises a substrate body consisting of a nitride ceramics; and a coat layer coating at least a part of a surface of the substrate body and consisting of a ceramics different from the nitride ceramics forming the substrate body; and the coat layer has an optical reflectance of 50% or more for any light having a wavelength of from 300 to 800 nm, which can increase a luminance of the light emitting element by reflecting the light emitted from the element efficiently with certainty, and which has a high heat radiation property; and a manufacturing method therefor.
    Type: Application
    Filed: August 16, 2005
    Publication date: November 1, 2007
    Inventors: Masakatsu Maeda, Yasuyuki Yamamoto
  • Publication number: 20070165746
    Abstract: A transmission circuit for alleviating the frequency characteristics of the group delay and the attenuation amount in a transmission signal band and expanding the dynamic range to a high frequency band is provided. A ladder-type resistance-type attenuator includes switching elements (12-19), 2R resistor elements (20-28) and R resistor elements (29-35). The 2R and R resistor elements (20-28) and (29-35) are respectively connected to variable capacitor elements (CS1-CS8, CP1-CP8) in parallel. The variable attenuator having such a connection structure is connected to an amplitude modulation loop of the transmission circuit.
    Type: Application
    Filed: January 3, 2007
    Publication date: July 19, 2007
    Inventor: Masakatsu Maeda
  • Publication number: 20070103239
    Abstract: An object is to achieve reduction of a spurious in a delta-sigma type fraction division PLL synthesizer. In its configuration, first and second L-value accumulators 31 and 30 are provided. The difference between overflow signals 16 and 17 of the first and the second L-value accumulators 31 and 30 is acquired by an adder 29, so that in response to an output signal of the adder 29, a division ratio of a variable divider 2 having a division ratio switchable between M, M+1, and M?1 is switched. By virtue of this, the frequency of a spurious generated by operation noise of the first and the second L-value accumulators 31 and 30 is shifted to a frequency component higher than the prior art so that the spurious is removed by a loop filter (low pass filter) 5.
    Type: Application
    Filed: December 9, 2004
    Publication date: May 10, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takaharu Saeki, Masakatsu Maeda
  • Publication number: 20070093217
    Abstract: Provided is an FM modulator capable of measuring an f-V characteristic of a voltage controlled oscillator in a reduced time period. Therefore, a characteristic measurement time control section 110 notifies a correction section 108 of a time at which a measurement of the f-V characteristic of a voltage controlled oscillator 103 is to be started and a time at which the measurement of the f-V characteristic of the voltage controlled oscillator 103 is to be ended while a carrier wave frequency is being changed to a predetermined frequency. Thus, the correction section 108 is capable of measuring the f-V characteristic of the voltage controlled oscillator 103 in a reduced time period.
    Type: Application
    Filed: October 19, 2006
    Publication date: April 26, 2007
    Inventors: Masakatsu Maeda, Kaoru Ishida
  • Patent number: 7193484
    Abstract: A voltage controlled oscillator apparatus includes at least two voltage controlled oscillators, each of the voltage controlled oscillators being formed on a semiconductor substrate and having an LC-resonant circuit including a three-terminal inductor or a two-terminal inductor, and a continuously variable capacitor, and an amplifier including n-channel transistors or n-channel transistors and p-channel transistors. Two of the three-terminal or two-terminal inductors constructing the first and second voltage controlled oscillators have a coil shape formed with a wiring layer of an integrated circuit formed on the semiconductor substrate, and one of the three-terminal or two-terminal inductors has such a shape that its inductance value differs from that of the other of the three-terminal or two-terminal inductors, and is disposed in a region inside of the other of the three-terminal or two-terminal inductors with respect to its planar shape.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: March 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masakatsu Maeda
  • Patent number: 7110486
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: September 19, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Publication number: 20060157872
    Abstract: An epoxy resin composition for encapsulating a semiconductor chip containing (A) a crystalline epoxy resin, (B) a phenol resin represented by general formula (1): wherein R1 and R2 are independently hydrogen or alkyl having 1 to 4 carbon atoms and two or more R1s or two or more R2s are the same or different; a is integer of 0 to 4; b is integer of 0 to 4; c is integer of 0 to 3; and n is average and is number of 0 to 10, (C) a (co)polymer containing butadiene-derived structural unit or its derivative, and (D) an inorganic filler in the amount of 80 wt % to 95 wt % both inclusive in the total epoxy resin composition.
    Type: Application
    Filed: November 29, 2005
    Publication date: July 20, 2006
    Inventors: Takahiro Kotani, Hidetoshi Seki, Masakatsu Maeda, Kazuya Shigeno, Yoshinori Nishitani
  • Publication number: 20060115036
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Application
    Filed: January 18, 2006
    Publication date: June 1, 2006
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Patent number: 7050525
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: May 23, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano