Patents by Inventor Masakazu Sugiura

Masakazu Sugiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8604821
    Abstract: Provided is a power supply voltage monitoring circuit (50) including: a signal output circuit (1) for outputting a signal voltage (Vsignal) which exhibits a saturation characteristic with respect to an increase in a power supply voltage (VDD); and a signal voltage monitoring circuit (4) for comparing the power supply voltage (VDD) with the signal voltage (Vsignal), and outputting a signal (Vout) indicating that the signal voltage (Vsignal) is normal when there is a predetermined voltage difference. With this configuration, a minimum operating power supply voltage may be reduced in an electronic circuit, and the power supply voltage may be used with efficiency.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: December 10, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Masakazu Sugiura, Atsushi Igarashi
  • Patent number: 8547163
    Abstract: Provided is a temperature sensor device operable at a lower voltage. The temperature sensor device detects temperature based on an output voltage of a forward voltage generator for generating a forward voltage of a PN junction. The forward voltage generator includes a level shift voltage generation circuit, and an output voltage of the temperature sensor device is given based on the forward voltage of the PN junction and a voltage of the level shift voltage generation circuit.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: October 1, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Masakazu Sugiura, Atsushi Igarashi, Masahiro Mitani
  • Patent number: 8542060
    Abstract: A constant current circuit includes a depletion type MOS transistor, a first current mirror circuit, and a second current mirror circuit. The first and second current mirror circuits each include first and second MOS transistors where a gate of the first and second MOS transistors is connected to a drain of the first MOS transistor. A third MOS transistor has a gate connected to one terminal of a resistor and to the drain of the first MOS transistor of the first current mirror circuit, a source connected to a ground terminal, and a drain connected to an output terminal of the second current mirror circuit.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: September 24, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Tsutomu Tomioka, Masakazu Sugiura
  • Patent number: 8531234
    Abstract: Provided is a temperature detection device capable of attaining low current consumption at no expense of detection speed at around a temperature to be detected. The temperature detection device includes a control circuit for outputting a control signal for controlling ON/OFF of such internal circuits as a reference voltage circuit and a comparator. In the control circuit, in order to increase the detection speed at around the temperature to be detected, an oscillation frequency of an oscillation circuit has positive temperature characteristics. Further, the control circuit includes a waveform shaping circuit so as to optimize the waveform of the control signal for controlling ON of the internal circuits, to thereby attain low current consumption.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: September 10, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Masakazu Sugiura, Atsushi Igarashi
  • Patent number: 8476967
    Abstract: Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: July 2, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Yuji Kobayashi, Takashi Imura, Masakazu Sugiura, Atsushi Igarashi
  • Patent number: 8451571
    Abstract: Provided is a power supply integrated circuit including an overheat protection circuit with high detection accuracy. The overheat protection circuit includes: a current generation circuit including: a first metal oxide semiconductor (MOS) transistor including a gate terminal and a drain terminal that are connected to each other, the first MOS transistor operating in a weak inversion region; a second MOS transistor including a gate terminal connected to the gate terminal of the first MOS transistor, the second MOS transistor having the same conductivity type as the first MOS transistor and operating in a weak inversion region; and a first resistive element connected to a source terminal of the second MOS transistor; and a comparator for comparing a reference voltage having positive temperature characteristics and a temperature voltage having negative temperature characteristics, which are obtained based on a current generated by the current generation circuit.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: May 28, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Takashi Imura, Takao Nakashimo, Masakazu Sugiura, Atsushi Igarashi, Masahiro Mitani
  • Publication number: 20130063201
    Abstract: Provided is a reference voltage circuit for generating a low constant voltage (1.25 V or lower) having less temperature dependence. The reference voltage circuit includes: a bandgap voltage generation circuit including two PN junctions, for outputting a voltage (Vk) which is based on any one of the two PN junctions and a current (Ik) which is based on a voltage difference between the two PN junctions; and a voltage divider circuit for dividing the voltage (Vk). The voltage divider circuit corrects a divided voltage based on the current (Ik) input thereto, and outputs the corrected divided voltage as a reference voltage.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 14, 2013
    Applicant: SEIKO INSTRUMENTS INC.
    Inventor: Masakazu SUGIURA
  • Patent number: 8384470
    Abstract: Provided is an internal power supply voltage generation circuit with which a through current of a logic circuit supplied with an internal power supply voltage does not depend on a power supply voltage. A reference voltage (VREF) is generated based on a constant current of a current source (1) independently of a power supply voltage (VDD). Based on the reference voltage (VREF), an internal power supply voltage (DVDD) is generated independently of the power supply voltage (VDD) because of a source follower. A through current of a logic circuit (9) flows based on the internal power supply voltage (DVDD). The through current of the logic circuit (9) is therefore independent of the power supply voltage (VDD). The internal power supply voltage (DVDD) is a minimum power supply voltage for the logic circuit (9) to operate based on the specification. The through current of the logic circuit (9) is therefore small.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 26, 2013
    Assignee: Seiko Instruments Inc.
    Inventor: Masakazu Sugiura
  • Patent number: 8274281
    Abstract: A magnetic sensor circuit includes a Hall element, first and second switching circuits, an amplifier, a threshold voltage source, a comparator that can function as a voltage follower circuit, and a reference voltage source. The circuit elements are arranged such that an offset of the magnetic sensor circuit can be eliminated to detect a weak magnetic field with high precision. In operation, the reference voltage source charges an input capacitor of the comparator to a predetermined voltage.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: September 25, 2012
    Assignee: Seiko Instruments Inc.
    Inventor: Masakazu Sugiura
  • Publication number: 20120206193
    Abstract: Provided is an internal power supply voltage generation circuit, with which a through current can be prevented from being excessive due to manufacturing fluctuations during the operation of a logic circuit, to thereby suppress current consumption. Provided is an internal power supply voltage generation circuit for generating an internal power supply voltage at an internal power supply terminal and supplying the internal power supply voltage to a logic circuit, the internal power supply voltage generation circuit including: a transistor having a source follower configuration for outputting a voltage applied to a gate thereof; and a current limiting circuit for limiting a maximum current of the transistor having the source follower configuration for outputting the voltage applied to the gate thereof, to thereby suppress a maximum current supplied to the logic circuit and suppress current consumption.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 16, 2012
    Inventor: Masakazu SUGIURA
  • Publication number: 20120206172
    Abstract: Provided is an internal power supply voltage generation circuit, with which a through current that flows during the operation of a logic circuit can be prevented from being excessive due to fluctuations in threshold voltage of a P-type transistor and an N-type transistor forming the logic circuit, and current consumption can be suppressed. Provided is an internal power supply voltage generation circuit for generating an internal power supply voltage at an internal power supply terminal and supplying the internal power supply voltage to a logic circuit, the internal power supply voltage generation circuit including a transistor having a source follower configuration for outputting a voltage applied to a gate thereof. A value of the internal power supply voltage is given based on the sum of an absolute value of a threshold voltage of an N-type transistor and an absolute value of a threshold voltage of a P-type transistor.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 16, 2012
    Inventor: Masakazu Sugiura
  • Publication number: 20120206119
    Abstract: Provided is a voltage regulator having improved overshoot characteristics. In the voltage regulator, a current limiting circuit formed of, for example, a constant current source is provided in series to an output transistor, to thereby limit an output overcurrent. Further, a voltage limiting circuit formed of, for example, a diode is provided to an output terminal, to thereby limit an output voltage.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 16, 2012
    Inventor: Masakazu Sugiura
  • Publication number: 20120187911
    Abstract: An output circuit has a smaller area and restrains outputs from becoming unstable even if a power supply voltage is lower than an operating voltage. A supply terminal of an inverter circuit is provided with switch circuit, and the switch circuit stops the operation of the inverter circuit when the power supply voltage is lower than the operating voltage of the circuit. Further, the output terminal of the inverter circuit is provided with a current source to fix the output to the power supply voltage when the operation of the inverter circuit is stopped.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 26, 2012
    Inventors: Masahiro Mitani, Naohiro Hiraoka, Masakazu Sugiura, Atsushi Igarashi
  • Publication number: 20120182062
    Abstract: Provided is a temperature sensor device operable at a lower voltage. The temperature sensor device detects temperature based on an output voltage of a forward voltage generator for generating a forward voltage of a PN junction. The forward voltage generator includes a level shift voltage generation circuit, and an output voltage of the temperature sensor device is given based on the forward voltage of the PN junction and a voltage of the level shift voltage generation circuit.
    Type: Application
    Filed: January 6, 2012
    Publication date: July 19, 2012
    Inventors: Masakazu Sugiura, Atsushi Igarashi, Masahiro Mitani
  • Patent number: 8212555
    Abstract: A magnetic sensor circuit includes: a Hall element; a comparator circuit for comparing a Hall voltage corresponding to a magnetic flux passing through the Hall element with a threshold voltage; an output logic determination circuit for determining output logic of the magnetic sensor circuit based on an output signal from the comparator circuit; a threshold voltage control circuit for determining the threshold voltage based on a data signal output from the output logic determination circuit; and a threshold voltage output circuit for outputting the threshold voltage for the comparator circuit based on a data signal output from the threshold voltage control circuit. Therefore, the magnetic sensor circuit in which a circuit scale is small, and increase in current consumption and cost is suppressed can be provided.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: July 3, 2012
    Assignee: Seiko Instruments Inc.
    Inventor: Masakazu Sugiura
  • Publication number: 20120131402
    Abstract: Provided is a test mode setting circuit with a smaller number of terminals. A detector having a low threshold voltage and a detector having a high threshold voltage are provided to a test terminal for controlling a test mode of a semiconductor device, and the detector having the low threshold voltage releases a reset of a logic circuit while the detector having the high threshold voltage controls switching of the test mode. This configuration uses the test terminal, a reset terminal, and test mode control terminals in common between a normal state and a test state, thus reducing a large number of the terminals.
    Type: Application
    Filed: November 4, 2011
    Publication date: May 24, 2012
    Inventors: Masakazu SUGIURA, Atsushi IGARASHI
  • Publication number: 20120126873
    Abstract: Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.
    Type: Application
    Filed: November 9, 2011
    Publication date: May 24, 2012
    Inventors: Yuji Kobayashi, Takashi Imura, Masakazu Sugiura, Atsushi Igarashi
  • Patent number: 8183907
    Abstract: Provided is a detection circuit for monitoring a power supply voltage with a circuit configuration in which power consumption is reduced, and a sensor device including the detection circuit. A detection circuit (100) detects an input signal input thereto to output an output signal. An interrupt condition generating circuit (10a) directly detects a power supply voltage (VDD) supplied thereto from a power supply, and outputs an interrupt signal until the power supply voltage makes a transition to a predetermined voltage range. An interrupt condition reception circuit outputs, as an output signal, a given voltage without allowing an input signal (Vtemp) to be output until an interrupt caused by the interrupt signal is released, and outputs, as an output signal, the input signal by allowing the input signal to be output when the interrupt caused by the interrupt signal is released.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: May 22, 2012
    Assignee: Seiko Instruments Inc.
    Inventors: Masakazu Sugiura, Atsushi Igarashi
  • Publication number: 20120105132
    Abstract: Provided is a temperature detection device capable of attaining low current consumption at no expense of detection speed at around a temperature to be detected. The temperature detection device includes a control circuit for outputting a control signal for controlling ON/OFF of such internal circuits as a reference voltage circuit and a comparator. In the control circuit, in order to increase the detection speed at around the temperature to be detected, an oscillation frequency of an oscillation circuit has positive temperature characteristics. Further, the control circuit includes a waveform shaping circuit so as to optimize the waveform of the control signal for controlling ON of the internal circuits, to thereby attain low current consumption.
    Type: Application
    Filed: September 19, 2011
    Publication date: May 3, 2012
    Inventors: Masakazu Sugiura, Atsushi Igarashi
  • Publication number: 20120062312
    Abstract: This package manufacturing method is a method for manufacturing a package using a rivet having a flat plate-shaped head portion and a core portion protruding from a rear surface of the head portion. The package includes: a plurality of substrates that are bonded to each other: a cavity that houses an object to be housed in an airtightly sealed state; the core portion which is disposed in a through hole that penetrates a base substrate and which electrically connects the object to be housed with the outside; and a glass frit that is filled between the through hole and the core portion and is fired to form a seal between the though hole and the core portion.
    Type: Application
    Filed: August 16, 2011
    Publication date: March 15, 2012
    Inventors: Tsutomu Tomioka, Masakazu Sugiura