Abstract: Provided is a delay circuit that has a delay time period independent of a power supply voltage and has the equal delay time period between a case of a change in input signal from Low to High and a case of a change in input signal from High to Low. The delay time period is determined as a time period necessary for a voltage of a capacitor (17) (internal voltage (Va)) to increase from a ground voltage (VSS) to a voltage equal to or higher than an inverting threshold voltage of a constant current inverter (19) (threshold voltage (Vtn) of an NMOS transistor (16)). Therefore, the delay time period is determined with reference to the ground voltage (VSS). Note that the same holds true for an internal delay circuit (20). If the input signal (Vin) becomes High, the delay circuit utilizes the delay time period caused by an internal delay circuit (10). On the other hand, if the input signal (Vin) becomes Low, the delay circuit utilizes the delay time period caused by the internal delay circuit (20).

Abstract: Provided is an internal power supply voltage generation circuit with which a through current of a logic circuit supplied with an internal power supply voltage does not depend on a power supply voltage. A reference voltage (VREF) is generated based on a constant current of a current source (1) independently of a power supply voltage (VDD). Based on the reference voltage (VREF), an internal power supply voltage (DVDD) is generated independently of the power supply voltage (VDD) because of a source follower. A through current of a logic circuit (9) flows based on the internal power supply voltage (DVDD). The through current of the logic circuit (9) is therefore independent of the power supply voltage (VDD). The internal power supply voltage (DVDD) is a minimum power supply voltage for the logic circuit (9) to operate based on the specification. The through current of the logic circuit (9) is therefore small.

Abstract: Provided is a battery pack capable of reducing the number of terminals of a battery protection IC. When a battery (15) enters an overdischarge state, a temperature switch IC (12) included in a battery pack (10) monitors a voltage of a voltage monitoring terminal (VM2) provided to an external connection terminal (EB?), rather than a voltage of a terminal of the battery protection IC (11) for use in communication with the temperature switch IC (12), and then shuts down. Therefore, the battery protection IC (11) included in the battery pack (10) does not require an additional terminal for use in communication with the temperature switch IC (12).

Abstract: Provided is a temperature detection circuit capable of preventing malfunction, which may occur when power is turned on. A switch circuit for giving such a potential that a comparator detects a low temperature is provided at an output terminal of a temperature sensor circuit. A switch circuit for giving such a potential that the comparator detects a low temperature is provided at an output terminal of a reference voltage circuit. When the power is turned on, each of the switch circuits is set by a switch control circuit such that the comparator detects a low temperature.

Abstract: Provided is a power supply integrated circuit including an overheat protection circuit with high detection accuracy. The overheat protection circuit includes: a current generation circuit including: a first metal oxide semiconductor (MOS) transistor including a gate terminal and a drain terminal that are connected to each other, the first MOS transistor operating in a weak inversion region; a second MOS transistor including a gate terminal connected to the gate terminal of the first MOS transistor, the second MOS transistor having the same conductivity type as the first MOS transistor and operating in a weak inversion region; and a first resistive element connected to a source terminal of the second MOS transistor; and a comparator for comparing a reference voltage having positive temperature characteristics and a temperature voltage having negative temperature characteristics, which are obtained based on a current generated by the current generation circuit.

Abstract: Provided is a voltage detection circuit that outputs a detection result when a voltage to be measured exceeds a predetermined voltage or falls below the predetermined voltage at a speed higher than that of a conventional case. The voltage detection circuit according to the present invention includes an input buffer that outputs a detection voltage to be input as an input voltage, and a voltage detection section that accelerates a rising of the input voltage in a transient state where the input voltage exceeds a predetermined threshold value, and accelerates a dropping of the input voltage in a transient state where the input voltage falls below the predetermined threshold value. The voltage detection circuit accelerates a change in the input voltage to output the detection result from an output buffer at high speed.

Abstract: Provided is a power supply voltage monitoring circuit (50) including: a signal output circuit (1) for outputting a signal voltage (Vsignal) which exhibits a saturation characteristic with respect to an increase in a power supply voltage (VDD); and a signal voltage monitoring circuit (4) for comparing the power supply voltage (VDD) with the signal voltage (Vsignal), and outputting a signal (Vout) indicating that the signal voltage (Vsignal) is normal when there is a predetermined voltage difference. With this configuration, a minimum operating power supply voltage may be reduced in an electronic circuit, and the power supply voltage may be used with efficiency.

Abstract: Provided is a delay circuit that has a delay time period independent of a power supply voltage and has the equal delay time period between a case of a change in input signal from Low to High and a case of a change in input signal from High to Low. The delay time period is determined as a time period necessary for a voltage of a capacitor (17) (internal voltage (Va)) to increase from a ground voltage (VSS) to a voltage equal to or higher than an inverting threshold voltage of a constant current inverter (19) (threshold voltage (Vtn) of an NMOS transistor (16)). Therefore, the delay time period is determined with reference to the ground voltage (VSS). Note that the same holds true for an internal delay circuit (20). If the input signal (Vin) becomes High, the delay circuit utilizes the delay time period caused by an internal delay circuit (10). On the other hand, if the input signal (Vin) becomes Low, the delay circuit utilizes the delay time period caused by the internal delay circuit (20).

Abstract: Provided is a voltage detection circuit having a small circuit scale. A P-type metal oxide semiconductor (PMOS) transistor (11) has an absolute value (Vtp) of its threshold voltage, which is equal to a minimum operating voltage. If a power supply voltage (VDD) becomes higher than the minimum operating voltage, the PMOS transistor (11) is turned ON to allow a current to flow therethrough. As a result, based on the current, an output voltage (Vout) is generated across a capacitor (15).

Abstract: Provided is a detection circuit for monitoring a power supply voltage with a circuit configuration in which power consumption is reduced, and a sensor device including the detection circuit. A detection circuit (100) detects an input signal input thereto to output an output signal. An interrupt condition generating circuit (10a) directly detects a power supply voltage (VDD) supplied thereto from a power supply, and outputs an interrupt signal until the power supply voltage makes a transition to a predetermined voltage range. An interrupt condition reception circuit outputs, as an output signal, a given voltage without allowing an input signal (Vtemp) to be output until an interrupt caused by the interrupt signal is released, and outputs, as an output signal, the input signal by allowing the input signal to be output when the interrupt caused by the interrupt signal is released.

Abstract: Provided is a temperature detection circuit capable of preventing malfunction, which may occur when power is turned on. A switch circuit for giving such a potential that a comparator detects a low temperature is provided at an output terminal of a temperature sensor circuit. A switch circuit for giving such a potential that the comparator detects a low temperature is provided at an output terminal of a reference voltage circuit. When the power is turned on, each of the switch circuits is set by a switch control circuit such that the comparator detects a low temperature.

Abstract: A magnetic sensor circuit includes: a Hall element; a comparator circuit for comparing a Hall voltage corresponding to a magnetic flux passing through the Hall element with a threshold voltage; an output logic determination circuit for determining output logic of the magnetic sensor circuit based on an output signal from the comparator circuit; a threshold voltage control circuit for determining the threshold voltage based on a data signal output from the output logic determination circuit; and a threshold voltage output circuit for outputting the threshold voltage for the comparator circuit based on a data signal output from the threshold voltage control circuit. Therefore, the magnetic sensor circuit in which a circuit scale is small, and increase in current consumption and cost is suppressed can be provided.

Abstract: A magnetic sensor circuit is provided in which an offset of the magnetic sensor circuit can be eliminated to detect a weak magnetic field with high precision. A reference voltage source is provided to charge an input capacitor of a comparator included in the magnetic sensor circuit to a predetermined voltage.

Abstract: Provided is a voltage detection circuit that outputs a detection result when a voltage to be measured exceeds a predetermined voltage or falls below the predetermined voltage at a speed higher than that of a conventional case. The voltage detection circuit according to the present invention includes an input buffer that outputs a detection voltage to be input as an input voltage, and a voltage detection section that accelerates a rising of the input voltage in a transient state where the input voltage exceeds a predetermined threshold value, and accelerates a dropping of the input voltage in a transient state where the input voltage falls below the predetermined threshold value. The voltage detection circuit accelerates a change in the input voltage to output the detection result from an output buffer at high speed.

Abstract: A voltage regulator has an output MOS transistor connected between a voltage source and an output terminal. A voltage dividing circuit is disposed between the output terminal and GND. An error amplifier receives a reference voltage from a reference voltage circuit and a division voltage from the voltage dividing circuit. A current limiting circuit is disposed between the voltage source and the output terminal. The current limiting circuit has a first MOS transistor connected to the voltage source. A current source circuit is disposed between the first MOS transistor and the output terminal. A resistor is connected to the voltage source. A second MOS transistor is controlled based on a current caused to flow through the first MOS transistor. A third MOS transistor is connected between the voltage source and an output terminal of the error amplifier and is controlled based on a current caused to flow through the resistor.

Abstract: A switching regulator has a soft start circuit having a current source, a capacitor, and a MOS transistor connected between the current source and the capacitor for undergoing controlled operations between ON/OFF states to control a time period required for soft start of the switching regulator.

Abstract: In a high-performance semiconductor integrated circuit, the standby current is reduced by preventing current leakage in a semiconductor integrated circuit device, for example, the memory cell of an SRAM. A gate electrode G is formed on semiconductor substrate 1 and n+-type semiconductor regions 17 (source/drain regions) are formed in the semiconductor substrate on both sides of this gate electrode. Within the same apparatus and under near-vacuum conditions, a depth of 2.5 nm or less is etched away from the surfaces of the source/drain regions and gate electrode, a film of Co is then formed on the source/drain regions, and thermal processing is applied to form CoSi2 layer 19a. As a result, current leakage in the memory cell can be prevented and this method can be applied to semiconductor integrated circuit devices that have low current consumption or are battery-driven.

Abstract: A voltage regulator has a reference voltage circuit, a voltage source, an output terminal from which an output voltage is outputted in accordance with a voltage of the voltage source, and a voltage dividing circuit for dividing the output voltage of the output terminal. An error amplified outputs a signal in accordance with an output of the voltage dividing circuit and an output of the reference voltage circuit. An output transistor is connected between the voltage source and the voltage dividing circuit and is ON/OFF-controlled in accordance with the signal outputted from the error amplifier. A current adding circuit controls an operating current of the error amplifier in accordance with the output voltage of the output terminal and the voltage of the voltage source by increasing the operating current of the error amplifier when the output voltage of the output terminal is higher than a predetermined value.

Abstract: The present invention provides a voltage regulator, with an output short circuit current limiting function, which is capable of controlling a value of an output short circuit current to a set value in order to suppress dispersion. A constant current source is used instead of an output short circuit current detecting resistor of an output short circuit current limiting circuit, whereby an output short circuit current can be controlled to a set value, and dispersion in the output short circuit current can be suppressed.

Abstract: To arbitrarily control a time period required for soft start of a switching regulator. A MOS transistor is provided between a current source and a capacitor for determination of a time period required for soft start, and thus the time period required for soft start can be controlled by controlling turn-ON/OFF of the MOS transistor as may be necessary.