Patents by Inventor Masakazu Yamaguchi

Masakazu Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6670658
    Abstract: In a p-type base layer of a trench IGBT comprising a p-type collector layer, an n-type base layer formed on the p-type collector layer, the p-type base layer formed on the n-type base layer, and an n-type emitter layer formed on the surface of the p-type base layer, the point of the highest impurity concentration is located closer to the n-type base layer than the junction with the emitter layer. In other words, the pinch-off of the channel is generated in the position closer to the n-type base layer than to the junction between the p-type base layer and the n-type emitter layer.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: December 30, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetaka Hattori, Masakazu Yamaguchi
  • Publication number: 20030222327
    Abstract: A semiconductor device includes a first-first conductivity type semiconductor layer which includes a cell region portion and a junction terminating region portion, the junction terminating region portion being a region portion which is positioned in an outer periphery of the cell region portion to maintain a breakdown voltage by extending a depletion layer to attenuate an electric field; a second first conductivity type semiconductor layer which is formed on one surface of the first-first conductivity type semiconductor layer; a first main electrode which is electrically connected to the second-first conductivity type semiconductor layer; first-second conductivity type semiconductor layers which are formed in the cell region portion of the first-first conductivity type semiconductor layer in substantially vertical directions to the one surface of the first-first conductivity type semiconductor layer, respectively, and which are periodically disposed in a first direction which is an arbitrary direction paralle
    Type: Application
    Filed: March 17, 2003
    Publication date: December 4, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masakazu Yamaguchi, Wataru Saito, Ichiro Omura, Masaru Izumisawa
  • Publication number: 20030122222
    Abstract: A semiconductor device includes a diffusion area formed in a semiconductor layer of a first conductive type. The diffusion area comprises first and second impurity diffusion areas of the first and second conductive types, respectively. The diffusion area has a first and second areas which are defined by an impurity concentration of the first and second impurity diffusion areas. A junction between the first and second area is formed in a portion in which the first and second impurity diffusion areas overlap each other. A period of the impurity concentration, in a planar direction of the semiconductor layer, of the first or second area is smaller than the maximum width, in the planar direction of the semiconductor layer, of the first and second impurity diffusion areas constituting the first or second area.
    Type: Application
    Filed: December 26, 2002
    Publication date: July 3, 2003
    Inventors: Hideki Okumura, Hitoshi Kobayashi, Masanobu Tsuchitani, Akihiko Osawa, Wataru Saito, Masakazu Yamaguchi, Ichiro Omura
  • Patent number: 6569412
    Abstract: The present invention provides a treatment composition for dyed hair which effectively prevents color fading of the dyed hair, to thereby maintain the color of the dyed hair for prolonged periods. The composition contains the following components (A), (B), and (C): (A) an organic solvent selected from among aromatic alcohols, lower alkylene carbonates, N-alkylpyrrolidones, and formamides; (B) an organic carboxylic acid or a salt thereof; and (C) a lower alcohol, a polyhydric alcohol, or a lower alkyl ether of a polyhydric alcohol; wherein the pH of the composition falls within the range of 1-6 inclusive, and the composition does not contain any dye. In use, the composition is applied to hair dyed with an acid-dye-type hair dye composition; and then the hair is left to stand for 5-30 minutes at 20-60° C., followed by washing.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: May 27, 2003
    Assignee: Kao Corporation
    Inventors: Masakazu Yamaguchi, Shintaro Totoki, Makoto Iijima, Hajime Miyabe
  • Publication number: 20030089966
    Abstract: In a p-type base layer of a trench IGBT comprising a p-type collector layer, an n-type base layer formed on the p-type collector layer, the p-type base layer formed on the n-type base layer, and an n-type emitter layer formed on the surface of the p-type base layer, the point of the highest impurity concentration is located closer to the n-type base layer than the junction with the emitter layer. In other words, the pinch-off of the channel is generated in the position closer to the n-type base layer than to the junction between the p-type base layer and the n-type emitter layer.
    Type: Application
    Filed: November 15, 2002
    Publication date: May 15, 2003
    Inventors: Hidetaka Hattori, Masakazu Yamaguchi
  • Patent number: 6545341
    Abstract: The present invention relates to a constitution of a bipolar type power transistor, which comprises: a base layer of a first conductivity type; a collector layer of the first conductivity type formed on one surface of the base layer of the first conductivity type; a first base layer of a second conductivity type formed selectively on the other surface of the base layer of the first conductivity type; and a second base layer of the second conductivity type selectively formed on the other surface of the first conductivity type base layer. The second conductivity type base layer is formed in a divided manner, and each of the second conductivity type base layers are separated by the first conductivity type base layer.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: April 8, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masakazu Yamaguchi
  • Patent number: 6495871
    Abstract: In a p-type base layer of a trench IGBT comprising a p-type collector layer, an n-type base layer formed on the p-type collector layer, the p-type base layer formed on the n-type base layer, and an n-type emitter layer formed on the surface of the p-type base layer, the point of the highest impurity concentration is located closer to the n-type base layer than the junction with the emitter layer. In other words, the pinch-off of the channel is generated in the position closer to the n-type base layer than to the junction between the p-type base layer and the n-type emitter layer.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: December 17, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetaka Hattori, Masakazu Yamaguchi
  • Publication number: 20020185705
    Abstract: A semiconductor device includes a drain layer, first and second drift layers, a RESURF layer, a drain electrode, a base layer, a source layer, a source electrode, and a gate electrode. The first drift layer is formed on the drain layer. The second drift layers and RESURF layers are formed on the first drift layer and periodically arranged in a direction perpendicular to the direction of depth. The RESURF layer forms a depletion layer in the second drift layer by a p-n junction including the second drift layer and RESURF layer. The impurity concentration in the first drift layer is different from that in the second drift layer. The drain electrode is electrically connected to the drain layer.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 12, 2002
    Inventors: Wataru Saitoh, Ichiro Omura, Masakazu Yamaguchi, Satoshi Aida, Syotaro Ono
  • Publication number: 20020038887
    Abstract: This invention forms an N-type source layer by self-alignment in a vertical trench IGBT, vertical trench MOSFET, lateral trench IGBT, and lateral trench MOSFET. This decreases the diffused resistance in a P-type base layer to increase the latch-up breakdown voltage, and also lowers the ON voltage by micropatterning of the device.
    Type: Application
    Filed: September 19, 2001
    Publication date: April 4, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideaki Ninomiya, Tomoki Inoue, Ichiro Omura, Masakazu Yamaguchi
  • Publication number: 20010035565
    Abstract: The present invention relates to a constitution of a bipolar type power transistor, which comprises: a base layer of a first conductivity type; a collector layer of the first conductivity type formed on one surface of the base layer of the first conductivity type; a first base layer of a second conductivity type formed selectively on the other surface of the base layer of the first conductivity type; and a second base layer of the second conductivity type selectively formed on the other surface of the first conductivity type base layer. The second conductivity type base layer is formed in a divided manner, and each of the second conductivity type base layers are separated by the first conductivity type base layer.
    Type: Application
    Filed: March 27, 2001
    Publication date: November 1, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masakazu Yamaguchi
  • Publication number: 20010026977
    Abstract: In a p-type base layer of a trench IGBT comprising a p-type collector layer, an n-type base layer formed on the p-type collector layer, the p-type base layer formed on the n-type base layer, and an n-type emitter layer formed on the surface of the p-type base layer, the point of the highest impurity concentration is located closer to the n-type base layer than the junction with the emitter layer. In other words, the pinch-off of the channel is generated in the position closer to the n-type base layer than to the junction between the p-type base layer and the n-type emitter layer.
    Type: Application
    Filed: March 6, 2001
    Publication date: October 4, 2001
    Inventors: Hidetaka Hattori, Masakazu Yamaguchi
  • Publication number: 20010007160
    Abstract: The present invention provides a treatment composition for dyed hair which effectively prevents color fading of the dyed hair, to thereby maintain the color of the dyed hair for prolonged periods.
    Type: Application
    Filed: January 4, 2001
    Publication date: July 12, 2001
    Applicant: KAO CORPORATION
    Inventors: Masakazu Yamaguchi, Shintaro Totoki, Makoto Iijima, Hajime Miyabe
  • Patent number: 6236069
    Abstract: Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: May 22, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Kazuya Nakayama, Minami Takeuchi, Masakazu Yamaguchi, Mitsuhiko Kitagawa, Ichiro Omura, Akio Nakagawa
  • Patent number: 6114727
    Abstract: A semiconductor device comprises a high-resistance n type base layer, an n type drain layer formed on one surface of the n type base layer, p type base layers selectively formed at the other surface of the n type base layer, n type source layers selectively formed at surfaces of the p type base layers, p type injection layers selectively formed at the other surface of the n type base layer in regions different from regions where the n type source layers and p type base layers are formed, a trench selectively formed to extend from a surface of each n type source layer through the p type base layer into the n type base layer, a first gate electrode buried in the trench with an insulating film interposed, a drain electrode formed on the n type drain layer, a source electrode formed on the n type source layer, and a second gate electrode formed on the p type injection layer.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: September 5, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Masakazu Yamaguchi
  • Patent number: 6111454
    Abstract: A semiconductor device comprises a voltage-driven switching element having a cathode and an anode, in which a voltage is to be applied between the cathode and anode, a power-supply circuit connected between the cathode and anode of the voltage-driven switching element and comprising capacitors, resistors and a reverse current-low preventing diode, for generating an intermediate voltage, a charging switching element for charging a gate of the voltage-driven switching element, using the intermediate voltage generated by the power-supply circuit, a discharging switching element for discharging the gate of the voltage-driven switching element, and a photovoltaic element for generating a photovoltaic power to control to drive the charging switching element and the discharging switching element.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: August 29, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Masakazu Yamaguchi, Kimihiro Hoshi
  • Patent number: 6054748
    Abstract: A semiconductor power device includes a high-resistance semiconductor substrate of the first conductivity type having first and second major surfaces and a recess in either one of the first and second major surfaces, and a semiconductor power element with a field relaxation structure, at least part of which is formed in a region of the semiconductor substrate where the recess is formed.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: April 25, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masanori Tsukuda, Takashi Shinohe, Masakazu Yamaguchi
  • Patent number: 5910738
    Abstract: A semiconductor device includes a voltage-driven switching element having a cathode and an anode, in which a voltage is to be applied between the cathode and anode, a power-supply circuit connected between the cathode and anode of the voltage-driven switching element and comprising capacitors, resistors and a reverse current-low preventing diode, for generating an intermediate voltage, a charging switching element for charging a gate of the voltage-driven switching element, using the intermediate voltage generated by the power-supply circuit, a discharging switching element for discharging the gate of the voltage-driven switching element, and a photovoltaic element for generating a photovoltaic power to control to drive the charging switching element and the discharging switching element.
    Type: Grant
    Filed: April 5, 1996
    Date of Patent: June 8, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Masakazu Yamaguchi, Kimihiro Hoshi
  • Patent number: 5793065
    Abstract: Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 11, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Kazuya Nakayama, Minami Takeuchi, Masakazu Yamaguchi, Mitsuhiko Kitagawa, Ichiro Omura, Akio Nakagawa
  • Patent number: 5709816
    Abstract: Singlet oxygen quenchers containing as an active component a compound represented by the following formula or (2): ##STR1## wherein each of R.sup.1, R.sup.2, R.sup.3, R.sup.4, R.sup.5, R.sup.10 and n are as described herein, and external compositions containing these compounds are provided for the prevention and treatment of various forms of damage to living bodies caused by singlet oxygen, and are thus quite useful as antiinflammation agents, anti-aging agents, agents preventing darkening of the skin, agents preventing protein denaturation, inhibitors against formation of sunburn cells, agents preventing lipid peroxidation, agents preventing DNA damage, and particularly in the fields of medicines and cosmetics as external compositions for the skin.
    Type: Grant
    Filed: July 22, 1996
    Date of Patent: January 20, 1998
    Assignee: Kao Corporation
    Inventors: Masakazu Yamaguchi, Hiroyuki Ohsu, Eiichi Nishizawa, Mitsuru Sugiyama, Koichi Nakamura, Yoshinori Takema
  • Patent number: 5554862
    Abstract: In a power semiconductor device, an n-base is formed on a p-emitter layer. On the n-base layer, a p-base layer, an n-emitter layer, and a high-concentration p-layer are formed laterally. In the p-base layer, an n-source layer is formed a specified distance apart from the n-emitter layer. In the n-emitter layer, a p-source layer is formed a specified distance apart from the high-concentration p-layer. A first gate electrode is formed via a first gate insulating film on the region sandwiched by the n-source layer and the n-emitter layer. A second gate electrode is formed via a second gate insulating film on the region sandwiched by the high-concentration p-layer and the p-source layer. On the p-emitter layer, a first main electrode is formed. A second main electrode is formed so as to be in contact with the p-base layer, the n-source layer, and the p-source layer.
    Type: Grant
    Filed: January 19, 1994
    Date of Patent: September 10, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ichiro Omura, Mitsuhiko Kitagawa, Kazuya Nakayama, Masakazu Yamaguchi