Patents by Inventor Masaki Sakakibara

Masaki Sakakibara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210092313
    Abstract: The present disclosure relates to a sensor element and an electronic device that can further reduce noise. In a solid-state imaging apparatus that performs AD conversion in a pixel, a comparator circuit included in the pixel at least has: a comparing unit that compares a pixel signal output from a pixel circuit with a reference signal which is a slope signal whose level monotonously decreases with time; a band limiting unit that performs band limiting by narrowing a band of a signal that changes according to a result of comparison by the comparing unit; and an amplification unit that amplifies the signal whose band has been limited through the band limiting unit. The present technology can be applied to a solid-state imaging apparatus that performs AD conversion in a pixel, for example.
    Type: Application
    Filed: February 13, 2019
    Publication date: March 25, 2021
    Inventor: Masaki Sakakibara
  • Publication number: 20210084288
    Abstract: In a solid-state image sensor in which an arbiter arbitrates a request, a failure point is identified. A plurality of pixels generates a request for requesting transmission of a predetermined detection signal, in a case where a predetermined event is detected. A test circuit outputs the request of each of the plurality of pixels as an output request in a case where a test is not instructed, and generates a plurality of new requests and outputs each as the output request in a case where the test is instructed. The arbiter arbitrates the output request. A communication circuit transmits the detection signal on the basis of an arbitration result of the arbiter. A failure determination unit determines whether or not the arbiter has a failure on the basis of the detection signal in a case where the test is instructed.
    Type: Application
    Filed: April 15, 2019
    Publication date: March 18, 2021
    Inventor: MASAKI SAKAKIBARA
  • Patent number: 10944932
    Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: March 9, 2021
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Kenichi Aoyagi, Seiji Yamada
  • Publication number: 20210067168
    Abstract: The present technology relates to a DAC circuit, a solid-state imaging element, and electronic equipment that can be achieved with a small-scale circuit configuration. The DAC circuit includes: a ramp DAC that generates a ramp signal that changes in voltage with a constant time gradient; an injection DAC that outputs a predetermined voltage during a reset period for resetting a comparison target voltage to be compared with the ramp signal; and an adding circuit that adds an output of the ramp DAC and an output of the injection DAC and outputs the outputs to a comparison circuit as a comparison reference voltage. The present technology can be applied to, for example, a DAC circuit of a solid-state imaging element, and the like.
    Type: Application
    Filed: January 15, 2019
    Publication date: March 4, 2021
    Inventors: SHIN KITANO, MASAKI SAKAKIBARA, HIDEKAZU KIKUCHI, MITSUAKI OSAME
  • Patent number: 10917591
    Abstract: The present disclosure relates to a solid-state imaging device and a method of controlling a solid-state imaging device, and an electronic device for enabling appropriate expansion of a dynamic range with respect to an object moving at a high speed or an object having a large luminance difference between bright and dark to reduce motion distortion (motion artifact). Exposure of a plurality of pixels is individually controlled in units of pixels. The present disclosure can be applied to a solid-state imaging device.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: February 9, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoko Iida, Masaki Sakakibara, Yorito Sakano, Naosuke Asari, Masaaki Takizawa, Tomohiko Asatsuma, Shogo Furuya
  • Publication number: 20200389615
    Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.
    Type: Application
    Filed: August 21, 2020
    Publication date: December 10, 2020
    Applicant: SONY CORPORATION
    Inventors: Masaki SAKAKIBARA, Kenichi AOYAGI, Seiji YAMADA
  • Publication number: 20200344432
    Abstract: In a solid-state imaging element that detects a change in an amount of light on the basis of a photocurrent, erroneous detection due to a dark current or dark current shot noise is reduced. The solid-state imaging element includes a limiting circuit, a differentiating circuit, and a comparison circuit. The limiting circuit limits an electric signal generated by photoelectric conversion by a predetermined limit value and outputs the electric signal limited as an output signal. The differentiating circuit obtains an amount of change of the output signal output from the limiting circuit. The comparison circuit performs comparison between the amount of change obtained by the differentiating circuit and a predetermined threshold value to output a result of the comparison as a result of detection of an address event.
    Type: Application
    Filed: September 18, 2018
    Publication date: October 29, 2020
    Inventor: Masaki Sakakibara
  • Patent number: 10805561
    Abstract: While realizing a broad dynamic range, the present technology relates to a solid-state image pickup device and control method therefor, and electronic apparatus aiming at enabling an influence of PLS to be suppressed. The solid-state image pickup device includes a pixel array unit in which a plurality of pixels are arrayed. A portion of pixels in the pixel array unit are a unit pixel at least having one photoelectric conversion element and over flow integration capacitor. Further, the solid-state image pickup device includes one AD converter for one or more unit pixels in the pixel array unit. The present technology is applicable to, for example, the solid-state image pickup.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 13, 2020
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Yasuhisa Tochigi
  • Publication number: 20200322555
    Abstract: Decrease of the frame rate is suppressed in a solid-state image pickup device that generates a frame having an increased dynamic range. A measurement section measures a reception light amount in each of a plurality of regions to generate a measurement result. A selection section selects one of a plurality of exposure periods different from each other based on the measurement result in each of the plurality of regions. An image data generation section performs exposure for each of the plurality of regions over the selected exposure period to generate image data. An image processing section adjusts a value of the image data generated for each of the plurality of regions based on the measurement result.
    Type: Application
    Filed: April 12, 2017
    Publication date: October 8, 2020
    Applicant: SONY CORPORATION
    Inventors: Koji OGAWA, Masaki SAKAKIBARA
  • Publication number: 20200260030
    Abstract: The present technology relates to an imaging apparatus and electronic equipment that can reduce noise. A photoelectric conversion element, a conversion unit that converts a signal from the photoelectric conversion element into a digital signal, a bias circuit that supplies a bias current for controlling a current flowing through an analog circuit in the conversion unit, and a control unit that controls the bias circuit on the basis of an output signal from the conversion unit are provided, and at the start of transfer of a charge from the photoelectric conversion element, the control unit boosts a voltage at a predetermined position of the analog circuit. The conversion unit converts the signal from the photoelectric conversion element into a digital signal using a slope signal whose level monotonously decreases with time. The present technology is applicable to, for example, an imaging apparatus.
    Type: Application
    Filed: October 9, 2018
    Publication date: August 13, 2020
    Inventor: MASAKI SAKAKIBARA
  • Patent number: 10742919
    Abstract: The present technology relates to an image sensor capable of suppressing the power consumption, and an electronic device. A reference signal output unit outputs a reference signal of which a level is changed and includes a plurality of DACs and a load resistance for outputting the reference signal. The plurality of DACs includes a plurality of current sources and a plurality of switches controlling a current flowing from the current source. The reference signal output unit is connected to three or more power sources, and in combinations of two power sources in the three or more power sources, each of two or more types of combinations of the power sources includes a first path through which the current controlled by the switch flows, and a second path through which a current in the same direction flows to the load resistance.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: August 11, 2020
    Assignee: SONY CORPORATION
    Inventors: Terukazu Tanaka, Masaki Sakakibara
  • Patent number: 10707852
    Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging apparatus, an electronic apparatus, and a method of controlling a comparator each of which enables power consumption to be reduced while a decision speed of the comparator is enhanced. A comparator, including: a differential input circuit operating at a first power source voltage, and outputting a signal when a voltage of an input signal is higher than a voltage of a reference signal; a positive feedback circuit operating at a second power source voltage lower than the first power source voltage, and speeding up a transition speed when a comparison result signal representing a result of comparison in voltage between the input signal and the reference signal is inverted; and a voltage converting circuit. The present disclosure can be applied to an ADC or the like arranged for each pixel of a solid-state imaging apparatus.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: July 7, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Masaki Sakakibara
  • Patent number: 10659022
    Abstract: In a comparator of an analog-to-digital converter, an input signal is input to a control terminal of each of a plurality of signal input transistors. A signal input transistor selection section selects any one of the plurality of signal input transistors, and generates a current in response to a difference between the input signal and a reference signal to flow in the differential pair configured with the selected signal input transistor and a reference input transistor. A load section converts, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the reference input transistor in response to the difference, the change of the current into a change of a voltage, and outputs the change of the voltage as a result of comparison between the input signal and the reference signal.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: May 19, 2020
    Assignee: Sony Corporation
    Inventor: Masaki Sakakibara
  • Publication number: 20200128205
    Abstract: A solid-state imaging element that detects address events captures high-quality images. The solid-state imaging element includes a pixel array section that has a plurality of pixels including a specific pixel arranged in a two-dimensional lattice pattern. The specific pixel includes a pixel circuit and two analog-digital converters. The pixel circuit outputs two analog signals proportional to an amount of charge produced by photoelectric conversion. The analog-digital converters convert the respective two analog signals into digital signals with different resolutions.
    Type: Application
    Filed: April 3, 2018
    Publication date: April 23, 2020
    Inventors: MASAKI SAKAKIBARA, RYOHEI KAWASAKI
  • Patent number: 10609318
    Abstract: The present technology relates to an imaging device, a driving method, and an electronic apparatus capable of more quickly acquiring a high-quality image. In a pixel of a solid-state imaging device, a photoelectric conversion unit that performs a photoelectric conversion of incident light is disposed. An electric charge/voltage converting unit converts electric charge acquired by the photoelectric conversion unit into a voltage signal. A signal comparator compares a supplied reference signal with the voltage signal acquired by the electric charge/voltage converting unit and outputs a result of the comparison. A storage unit adaptively changes the conversion efficiency of the electric charge/voltage converting unit on the basis of a control signal acquired on the basis of a result of the comparison output from the signal comparator. The present technology can be applied to a solid-state imaging device.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: March 31, 2020
    Assignee: SONY CORPORATION
    Inventors: Masaki Sakakibara, Yorito Sakano
  • Patent number: 10582139
    Abstract: A signal processing device includes a comparison unit to compare a signal level of an analog signal with a signal level of a reference signal; a selection unit configured to select the reference signal to be supplied to the comparison unit; and a switching unit capable of switching a signal line connected to an input terminal of the comparison unit such that a signal line via which the selected reference signal is transmitted is connected to the input terminal of the comparison unit, wherein the comparison unit includes a floating node as the input terminal, the selection unit includes a signal line in which a parasitic capacitance is caused between the signal line and the floating node as the input terminal of the comparison unit, and the signal line of the selection unit is configured to transmit an identical level of signal in multiple comparison processes of the comparison unit.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: March 3, 2020
    Assignee: SONY CORPORATION
    Inventors: Takafumi Takatsuka, Yusuke Oike, Masaki Sakakibara
  • Publication number: 20200067498
    Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state image pickup device, an electronic device, a method of controlling the comparator, a data writing circuit, a data reading circuit, and a data transferring circuit, capable of improving the determining speed of the comparator and reducing power consumption.
    Type: Application
    Filed: October 30, 2019
    Publication date: February 27, 2020
    Inventors: HIDEKAZU KIKUCHI, TADAYUKI TAURA, MASAKI SAKAKIBARA
  • Patent number: 10547802
    Abstract: While realizing a broad dynamic range, the present technology relates to a solid-state image pickup device and control method therefor, and electronic apparatus aiming at enabling an influence of PLS to be suppressed. The solid-state image pickup device includes a pixel array unit in which a plurality of pixels are arrayed. A portion of pixels in the pixel array unit are a unit pixel at least having one photoelectric conversion element and over flow integration capacitor. Further, the solid-state image pickup device includes one AD converter for one or more unit pixels in the pixel array unit. The present technology is applicable to, for example, the solid-state image pickup.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: January 28, 2020
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Yasuhisa Tochigi
  • Publication number: 20200029036
    Abstract: The present disclosure relates to a solid-state imaging device and a method of controlling a solid-state imaging device, and an electronic device for enabling appropriate expansion of a dynamic range with respect to an object moving at a high speed or an object having a large luminance difference between bright and dark to reduce motion distortion (motion artifact). Exposure of a plurality of pixels is individually controlled in units of pixels. The present disclosure can be applied to a solid-state imaging device.
    Type: Application
    Filed: March 30, 2018
    Publication date: January 23, 2020
    Inventors: SATOKO IIDA, MASAKI SAKAKIBARA, YORITO SAKANO, NAOSUKE ASARI, MASAAKI TAKIZAWA, TOMOHIKO ASATSUMA, SHOGO FURUYA
  • Patent number: 10498321
    Abstract: An imaging device for improving the determining speed of the comparator and reducing power consumption. The comparator includes a differential input circuit that operates with a first power supply voltage, the differential input circuit that outputs a signal when an input signal is higher than a reference signal in voltage, a positive feedback circuit that operates with a second power supply voltage lower than the first power supply voltage and accelerates transition speed when a compared result signal indicating a compared result between the input signal and the reference signal in voltage, is inverted, based on the output signal of the differential input circuit, and a voltage conversion circuit that converts the output signal of the differential input circuit into a signal corresponding to the second power supply voltage.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: December 3, 2019
    Assignee: SONY CORPORATION
    Inventors: Hidekazu Kikuchi, Tadayuki Taura, Masaki Sakakibara