Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.

Abstract: The present technology relates to an image capturing apparatus and an electronic device that are capable of reducing noise. A photoelectric conversion element, a conversion unit configured to convert a signal from the photoelectric conversion element into a digital signal, and a control unit configured to control current flowing to an analog circuit on the basis of an output signal from the conversion unit are provided. The conversion unit converts the signal from the photoelectric conversion element into a digital signal by using a slope signal having a level that monotonically decreases as time elapses. The control unit performs control to increase or reduce current flowing to the analog circuit in a case where the output signal has a large level. The present technology is applicable to, for example, an image capturing apparatus.

Abstract: An increase in memory capacity is suppressed in a solid-state imaging element that performs correlated double sampling processing. A pixel circuit sequentially generates each of a predetermined reset level and a plurality of signal levels corresponding to the exposure amount. An analog-to-digital converter converts a predetermined reset level into digital data and outputs the data as reset data, converts each of the plurality of pieces of signal data into digital data, and outputs the data as signal data. An arithmetic circuit holds a difference between the reset data and the signal data output first, as held data in a memory, and then adds the held data and the signal data output second and subsequent times together and causes the memory to hold the added data as new held data.

Abstract: The present disclosure relates to a solid-state imaging element and an electronic apparatus, in which the number of wires controlling readout can be reduced in a case where a pixel signal of each pixel is read out in a predetermined order for each unit pixel region. The unit pixel region is configured by a plurality of pixels arranged in an array. A readout circuit is provided for each unit pixel region and reads out, in a predetermined order, pixel signals of the plurality of pixels configuring the unit pixel regions. Pixel drive wires, which control readout of the pixels configuring the unit pixel regions adjacent in the vertical direction and having the same readout order, are shared. The present disclosure can be applied to, for example, a CMOS image sensor and the like.

Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.

Abstract: The present technology relates to an image sensor capable of suppressing the power consumption, and an electronic device. A reference signal output unit configured to output a reference signal of which a level is changed, includes a plurality of DACs including a plurality of current sources, and a plurality of switches controlling a current flowing from the current source, and a load resistance for outputting the reference signal. Further, the reference signal output unit is connected to three or more power sources, and in combinations of two power sources in the three or more power sources, each of two or more types of combinations of the power sources includes a first path through which the current controlled by the switch, flows, and a second path through which a current in the same direction, flows to the load resistance. The present technology, for example, can be applied to an image sensor or the like, performing reference signal comparison type AD conversion.

Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging apparatus, an electronic apparatus, and a method of controlling a comparator each of which enables power consumption to be reduced while a decision speed of the comparator is enhanced. A comparator, including: a differential input circuit operating at a first power source voltage, and outputting a signal when a voltage of an input signal is higher than a voltage of a reference signal; a positive feedback circuit operating at a second power source voltage lower than the first power source voltage, and speeding up a transition speed when a comparison result signal representing a result of comparison in voltage between the input signal and the reference signal is inverted; and a voltage converting circuit. The present disclosure can be applied to an ADC or the like arranged for each pixel of a solid-state imaging apparatus.

Abstract: The present technology relates to a solid-state imaging device, a method of driving the solid-state imaging device, and an electronic apparatus by which pixels can be read effectively. The solid-state imaging device includes a readout unit that performs a common-source operation or a source follower operation with respect to pixels to read a signal for each column. According to a level of illumination, the readout unit performs a common-source readout operation to reset a floating diffusion region and read an electric charge transferred from a photoelectric transducer and held in the floating diffusion region, and performs a source follower readout operation to reset the floating diffusion region and read the electric charge transferred from the photoelectric transducer and held in the floating diffusion region. The present technology is applicable to a solid-state imaging device such as a CMOS image sensor.

Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.

Abstract: A signal processing device includes a comparison unit to compare a signal level of an analog signal with a signal level of a reference signal; a selection unit configured to select the reference signal to be supplied to the comparison unit; and a switching unit capable of switching a signal line connected to an input terminal of the comparison unit such that a signal line via which the selected reference signal is transmitted is connected to the input terminal of the comparison unit, wherein the comparison unit includes a floating node as the input terminal, the selection unit includes a signal line in which a parasitic capacitance is caused between the signal line and the floating node as the input terminal of the comparison unit, and the signal line of the selection unit is configured to transmit an identical level of signal in multiple comparison processes of the comparison unit.

Abstract: In a comparator of an analog-to-digital converter, an input signal is input to a control terminal of each of a plurality of signal input transistors. A signal input transistor selection section selects any one of the plurality of signal input transistors, and generates a current in response to a difference between the input signal and a reference signal to flow in the differential pair configured with the selected signal input transistor and a reference input transistor. A load section converts, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the reference input transistor in response to the difference, the change of the current into a change of a voltage, and outputs the change of the voltage as a result of comparison between the input signal and the reference signal.

Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state image pickup device, an electronic device, a method of controlling the comparator, a data writing circuit, a data reading circuit, and a data transferring circuit, capable of improving the determining speed of the comparator and reducing power consumption.

Abstract: The present technology relates to a signal processing device, an imaging element, and an electronic apparatus configured so that a cost increase can be suppressed.

Abstract: An electronic device is provided for improving the determining speed of the comparator and reducing power consumption. The comparator includes a differential input circuit configured to operate with a first power supply voltage and output a signal when an input signal is higher than a reference signal in voltage; a positive feedback circuit configured to operate with a second power supply voltage lower than the first power supply voltage and to accelerate transition speed when a compared result signal indicating a compared result between the input signal and the reference signal in voltage, is inverted, based on the output signal of the differential input circuit; and a voltage conversion circuit configured to convert the output signal of the differential input circuit into a signal corresponding to the second power supply voltage.

Abstract: The present technology relates to a signal processing device, an imaging element, and an electronic apparatus configured so that a cost increase can be suppressed.

Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.

Abstract: The present disclosure relates to a solid-state imaging element and an electronic apparatus, in which the number of wires controlling readout can be reduced in a case where a pixel signal of each pixel is read out in a predetermined order for each unit pixel region. The unit pixel region is configured by a plurality of pixels arranged in an array. A readout circuit is provided for each unit pixel region and reads out, in a predetermined order, pixel signals of the plurality of pixels configuring the unit pixel regions. Pixel drive wires, which control readout of the pixels configuring the unit pixel regions adjacent in the vertical direction and having the same readout order, are shared. The present disclosure can be applied to, for example, a CMOS image sensor and the like.

Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.

Abstract: The present disclosure relates to a solid-state imaging device and an electronic apparatus that are capable of suppressing reduction in sensitivity. A current comparison unit receives light incident on a pixel, performs photoelectric conversion to generate a voltage, compares a current generated from the voltage with reference to a first potential line and a reference current generated with reference to a second potential line, the first potential line being one of a power supply line and a grounding line, the second potential line being another one of the power supply line and the grounding line, and outputs a comparison. A feedback unit returns a signal to a source side in the current comparison unit when the current is generated, the signal using the comparison result by the current comparison unit. The feedback unit can perform standby control in the current comparison unit.

Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.