Patents by Inventor Masashi Miyazaki

Masashi Miyazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7275197
    Abstract: A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes an operation order holding unit for holding information indicating that a test operation by a first testing module should be performed before a test operation by a second testing module, a trigger return signal receiving unit for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and a trigger signal supplying unit for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving unit receives the trigger return signal.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: September 25, 2007
    Assignee: Advantest Corporation
    Inventors: Kenji Inaba, Masashi Miyazaki
  • Patent number: 7237167
    Abstract: A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes a first and a second testing modules, and a synchronization controlling unit. The synchronization controlling unit includes an operation order holding unit for holding information indicating that a test operation by a first testing module should be performed before a test operation by a second testing module, a trigger return signal receiving unit for receiving a trigger return signal from the first testing module, and a trigger signal supplying unit for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving unit receives the trigger return signal.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: June 26, 2007
    Assignee: Advantest Corporation
    Inventors: Kenji Inaba, Masashi Miyazaki
  • Publication number: 20070029109
    Abstract: A multilayer printed wiring board (PWB) including via holes with satisfactory quality without defective shapes like swelling or recession on the end faces is provided. The multilayer PWB includes a build-up board of plural insulation layers as the main structure. In each of the insulation layers, via holes (columnar conductors) for electrically connecting between conductor circuits on the base layer or adjacent layers are formed. The via holes are formed by patterning metal foil with conductivity. The height “H” of the via holes (dimension in the thickness direction of the via hole forming layer) depends on the thickness “D” of the original metal foil only. Accordingly, the via holes can be formed without carrying out filling with conductive paste or electrolytic plating. Thus, multilayer PWB having via holes with satisfactory quality without defective shapes like swelling or recession on the end faces can be manufactured.
    Type: Application
    Filed: October 13, 2006
    Publication date: February 8, 2007
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari, Takatoshi Murota
  • Publication number: 20060255440
    Abstract: A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.
    Type: Application
    Filed: May 27, 2003
    Publication date: November 16, 2006
    Applicant: TAIYO YUDEN CO., LTD
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari
  • Patent number: 7096139
    Abstract: A testing apparatus having testing module slots onto which different types of testing modules are selectively mounted includes controlling modules for supplying control signals to the testing modules mounted on the testing module slots. The control signals are used for controlling the testing module. The apparatus also includes a setting information supplying unit for supplying hardware setting information to a specific testing module, an enable signal controlling unit for instructing the specific testing module to generate and supply an enable signal to the controlling module corresponding to the specific testing module, and a setting unit for setting the controlling module received said enable signal from the specific testing module so as to supply the control signal corresponding to the specific testing module based on the hardware setting information.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: August 22, 2006
    Assignee: Advantest Corporation
    Inventors: Masashi Miyazaki, Kenji Inaba, Toshiyuki Miura
  • Publication number: 20060016620
    Abstract: A multilayer printed wiring board (PWB) including via holes with satisfactory quality without defective shapes like swelling or recession on the end faces is provided. The multilayer PWB includes a build-up board of plural insulation layers as the main structure. In each of the insulation layers, via holes (columnar conductors) for electrically connecting between conductor circuits on the base layer or adjacent layers are formed. The via holes are formed by patterning metal foil with conductivity. The height “H” of the via holes (dimension in the thickness direction of the via hole forming layer) depends on the thickness “D” of the original metal foil only. Accordingly, the via holes can be formed without carrying out filling with conductive paste or electrolytic plating. Thus, multilayer PWB having via holes with satisfactory quality without defective shapes like swelling or recession on the end faces can be manufactured.
    Type: Application
    Filed: August 7, 2003
    Publication date: January 26, 2006
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari, Takashi Murota
  • Publication number: 20050255303
    Abstract: Components having different heights are installed in a multilayer substrate using a metal core layer formed by bonding a plurality of metal layers. The metal core layer includes through-holes and a spot-faced portion. Passive components and an active component are disposed in the through-holes and the spot-faced portion, respectively. These components are connected to conductive patterns formed on wiring layers, with connecting vias therebetween. Contact faces of each component with the connecting vias are controlled so as to be disposed at the same level with the metal layers.
    Type: Application
    Filed: April 25, 2005
    Publication date: November 17, 2005
    Inventors: Tatsuro Sawatari, Masashi Miyazaki
  • Publication number: 20050240852
    Abstract: A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes operation order holding means for holding information indicating that a test operation by a first testing module among the plurality of testing modules should be performed before a test operation by a second testing module among the plurality of testing modules, trigger return signal receiving means for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and trigger signal supplying means for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving means receives the trigger return signal.
    Type: Application
    Filed: February 1, 2005
    Publication date: October 27, 2005
    Applicant: Advantest Corporation
    Inventors: Kenji Inaba, Masashi Miyazaki
  • Publication number: 20050193298
    Abstract: A testing apparatus including a plurality of testing module slots to which different types of testing modules for testing a device under test are optionally mounted, includes operation order holding means for holding information indicating that a test operation by a first testing module among the plurality of testing modules should be performed before a test operation by a second testing module among the plurality of testing modules, trigger return signal receiving means for receiving a trigger return signal from the first testing module, the trigger return signal indicating that the first testing module has completed the test operation thereof, when the test operation of the first testing module has been completed, and trigger signal supplying means for supplying a trigger signal to the second testing module, the trigger signal indicating that the second testing module should start the test operation thereof, when the trigger return signal receiving means receives the trigger return signal.
    Type: Application
    Filed: February 6, 2004
    Publication date: September 1, 2005
    Applicant: Advantest Corporation
    Inventors: Kenji Inaba, Masashi Miyazaki
  • Publication number: 20050182583
    Abstract: A testing apparatus having a plurality of testing module slots onto which different types of testing modules are optionally mounted includes a plurality of controlling modules for supplying a control signal to each of the testing modules, the testing modules being mounted on the testing module slots respectively, the control signal being used for controlling the testing module, setting information supplying means for supplying hardware setting information to a specific testing module among the testing modules, the hardware setting information being set in advance in the controlling module in order to send the control signal in response to the specific testing module, enable signal controlling means for instructing the testing module to generate and supply an enable signal to the controlling module supplying the control signal to the testing module, and setting means for setting a specific controlling module of the controlling modules to supply the control signal in response to the specific testing module to t
    Type: Application
    Filed: February 17, 2004
    Publication date: August 18, 2005
    Inventors: Masashi Miyazaki, Kenji Inaba, Toshiyuki Miura
  • Patent number: 6306481
    Abstract: A multilayer circuit board having a resolution in the range of 25-80 &mgr;m, and blind via-holes between layers, the blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer having the blind via-holes between the layers has a glass transition temperature in the range of 150-220° C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process are reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes are suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: October 23, 2001
    Assignees: Hitachi, Ltd., Hitachi Chemical Company, Ltd.
    Inventors: Satoru Amou, Masao Suzuki, Tokihito Suwa, Mineo Kawamoto, Akio Takahashi, Masanori Nemoto, Hiroyuki Fukai, Mitsuo Yokota, Shiro Kobayashi, Masashi Miyazaki
  • Patent number: 6190834
    Abstract: The present invention provides a photosensitive resin composition capable of forming an insulating film, which is superior in both a roughening property and an adhesiveness, and a via-hole, which is highly reliable in connection, and a multilayer printed circuit board. The present invention provides a photosensitive resin composition containing a first resin, which is an epoxy resin, and a second resin having a N-substituted carbamic acid ester atomic group and a radical polymeric unsaturated bond in its side chain. The second resin is desirably an oligomer having a repeating unit expressed by the following general formula (chem. 1) or (chem. 3) by 3-10 units. Where, X is H or CH3, Y and Z is H or an alkyl group of carbon number 1-4, n is 0 or 1, a part of R1 is an atomic group expressed by the following general formula (chem. 2), the residual R1 is a hydroxyl group, and R2 is an alkylene group of carbon number 1-4.
    Type: Grant
    Filed: May 6, 1998
    Date of Patent: February 20, 2001
    Assignees: Hitachi, Ltd., Hitachi Chemical Company, Ltd.
    Inventors: Masatoshi Narahara, Mineo Kawamoto, Tokihito Suwa, Masao Suzuki, Satoru Amou, Akio Takahashi, Hiroyuki Fukai, Mitsuo Yokota, Shiro Kobayashi, Masashi Miyazaki
  • Patent number: 5919603
    Abstract: In an additive process for producing printed wiring boards, by using a developer comprising a chlorine-free organic solvent and an alkaline aqueous solution and as a resist material a copolymer of methacrylic acid and methyl methacrylate or the like, the production steps are simplified even if a substrate having a large area is used, and abolishment of chlorine-containing organic solvent as a developer becomes possible.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: July 6, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Masashi Miyazaki, Haruo Akahoshi, Shozo Nohara, Kenzi Kikuta, Toshiaki Ishimaru
  • Patent number: 5914216
    Abstract: A multilayer circuit board having a resolution in the range of 25-80 .mu.m, and blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer between said layers having the blind via-holes has a glass transition temperature in the range of 150-220.degree. C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process was reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes were suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: June 22, 1999
    Assignees: Hitachi, Ltd., Hitachi Chemical Company, Ltd.
    Inventors: Satoru Amou, Masao Suzuki, Tokihito Suwa, Mineo Kawamoto, Akio Takahashi, Masanori Nemoto, Hiroyuki Fukai, Mitsuo Yokota, Shiro Kobayashi, Masashi Miyazaki
  • Patent number: 5712080
    Abstract: A method for manufacturing printed circuit board by forming wiring pattern by chemical metal plating using a negative pattern made of a photosensitive resin composition layer as the plating resist, wherein the photosensitive resin comprises at least a linear high polymer composed of repeating units expressed by the following general formula (1); ##STR1## where, R.sub.1 is H, an alkyl group having 1-9 carbon atoms, an alkoxy group having 1-9 carbon atoms, and a carboxyalkyl group having 1-9 carbon atoms, R.sub.2 is an alkylene group having 1-9 carbon atoms, and n is the polymerized number of the repeating unit, and an organic compound expressed by the following general formula (2); ##STR2## where, R.sub.3 is H or an alkyl group having 1-6 carbon atoms, X is NH or S, and Z is N or C--Y, where Y is H, NH.sub.2, or SH.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: January 27, 1998
    Assignees: Hitachi, Ltd., Hitachi Chemical Company, Ltd.
    Inventors: Yuichi Satsu, Haruo Akahoshi, Mineo Kawamoto, Akio Takahashi, Masashi Miyazaki, Toshiaki Ishimaru
  • Patent number: 5438751
    Abstract: In an additive process for producing printed wiring boards, by using a developer comprising a chlorine-free organic solvent and an alkaline aqueous solution and as a resist material a copolymer of methacrylic acid and methyl methacrylate or the like, the production steps are simplified even if a substrate having a large area is used, and abolishment of chlorine-containing organic solvent as a developer becomes possible.
    Type: Grant
    Filed: August 27, 1993
    Date of Patent: August 8, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masashi Miyazaki, Haruo Akahoshi, Shozo Nohara, Kenzi Kikuta, Toshiaki Ishimaru
  • Patent number: 5294291
    Abstract: A process is provided for the formation of a conductive circuit pattern on a base metal formed on a substrate. On the base metal, a plating resist is first provided in a pattern corresponding to the circuit to be formed and a circuit pattern is then formed by plating. The plating resist is treated with a stripper and then with a stripping residue remover to cut off chemical bonds in the resist by a dehydrating decomposition reaction. The base metal is treated with an etchant for the base metal, whereby any resist residue still remaining after the treatment with the stripping residue remover is removed and the base metal are etched at areas which were covered by the plating resist.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: March 15, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Haruo Akahoshi, Toshinari Takada, Fujiko Yutani, Takeyuki Itabashi, Shin Nishimura, Satoru Amo, Akio Takahashi, Rituji Toba, Masashi Miyazaki
  • Patent number: 4885873
    Abstract: In this invention, the jig board fixing axis inserted in the eccentricity hole of the rotation axis rocks at rotation radius r without the rotation of the axis, the jig board set on the rocking jig board fixing axis is co-moved on through the spherical axis bearing, and then tip of the stick-like material is connected to the wheel spherical surface R by the self-weight of the jig board fixing axis and the jig board, ready to be ground and polished. And when the tip of the stick-like material connects orthogonally to the tangent direction of the spherical surface R, it is spherically processed by the rotation of the wheel and the rocking movement of the jig board.
    Type: Grant
    Filed: August 17, 1987
    Date of Patent: December 12, 1989
    Assignee: Seiko Electronic Components Ltd.
    Inventor: Masashi Miyazaki