Patents by Inventor Masashi Miyazaki

Masashi Miyazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8959400
    Abstract: A method, computer program product, and computer system for collecting errors which occur while a user uses a computer includes collecting log information on an operating environment including an operating procedure from a computing device associated with a user; accumulating the collected log information; identifying, from the log information, a second operating procedure similar to the operating procedure, wherein the second operating procedure had an error occur and no longer includes the error, in response to receiving the log information corresponding to the operating procedure in which the error occurs; and providing the user with the second operating procedure included in the searched log information.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: February 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Masashi Miyazaki, Tomohiro Shimizu, Tomonori Sugiura
  • Publication number: 20150010694
    Abstract: The method of manufacturing a substrate includes: forming a penetrating hole in a base layer; inserting a metal dummy part in the penetrating hole; forming an insulating portion made of synthetic resin to fill a ring-shaped gap between the penetrating hole and the dummy part; forming lower insulating layers, covering the bottom surface of the dummy part, that are made of synthetic resin on the bottom surface of the base layer to be continuous with the insulating portion; forming upper insulating layers, covering the top surface of the dummy part, that are made of synthetic resin on the top surface of the base layer to be continuous with the insulating portion; forming an exposing hole by routing in the upper insulating layers to expose the top surface of the dummy part; and forming a cavity by removing the dummy part exposed through the exposing hole by etching.
    Type: Application
    Filed: June 26, 2014
    Publication date: January 8, 2015
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masashi MIYAZAKI, Yuichi SUGIYAMA, Tatsuro SAWATARI, Hideki YOKOTA, Yutaka HATA
  • Publication number: 20140307402
    Abstract: Provided is a substrate with built-in electronic component including a component storage layer and two buildup layers. The component storage layer includes an electronic component and a cover portion having an insulating property. The electronic component includes a terminal surface and a main body. The cover portion includes a first surface formed to be flush with the terminal surface, covers the main body of the electronic component, and has a first linear expansion coefficient. The two buildup layers each include an insulating layer and a via portion. The insulating layer is adjacent to the cover portion and has a second linear expansion coefficient larger than the first linear expansion coefficient. The via portion is provided in the insulating layer and connected to the terminal surface. The insulating layer of one of the two buildup layers is formed to be in contact with the terminal surface and the first surface.
    Type: Application
    Filed: December 18, 2013
    Publication date: October 16, 2014
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Yuichi SUGIYAMA, Tatsuro SAWATARI, Yusuke INOUE, Masashi MIYAZAKI
  • Publication number: 20140253794
    Abstract: A camera module, in which a recessed portion that has a greater depth than the thickness of an imaging device is disposed on the surface (top surface) of an embedded-component substrate. An imaging device is bonded to a bottom of the recessed portion such that an opening is present between the surface (top surface) of the imaging device and the surface (top surface) of the embedded-component substrate. Connection pads on the imaging device are connected to conductor pads disposed on the surface (top surface) of the embedded-component substrate by bonding wires that go through the opening.
    Type: Application
    Filed: January 14, 2014
    Publication date: September 11, 2014
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masashi MIYAZAKI, Yuichi SUGIYAMA, Tatsuro SAWATARI, Hideki YOKOTA, Yutaka HATA
  • Publication number: 20140252522
    Abstract: In a camera module, a planar part, which is for mitigating deformation of the surface of a second insulating portion on which an imaging device is mounted, is embedded in the second insulating portion of a substrate so as to face the imaging device mounted on the surface (top surface) of the second insulating portion.
    Type: Application
    Filed: January 14, 2014
    Publication date: September 11, 2014
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masashi MIYAZAKI, Yuichi SUGIYAMA, Tatsuro SAWATARI, Hideki YOKOTA, Yutaka HATA
  • Patent number: 8811021
    Abstract: There is provided an electronic circuit module that prevents a bonding force between ground wiring and a shield from decreasing and maintains successfully a desirable shield effect. The electronic circuit module includes a core layer also functioning as the ground wiring, each face OS of each first protrusion of the core layer facing to an end face of a shield is adjacent to faces OS of an outer cover made of an insulating synthetic resin facing to the end face of the shield, and the end face of the shield is bonded to both of the each face OS of each first protrusion facing to the end face of the shield and the faces OS of the outer cover facing to the end face of the shield.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: August 19, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yuichi Sugiyama, Tatsuro Sawatari, Masashi Miyazaki
  • Publication number: 20140225829
    Abstract: A control apparatus includes: an operation reception unit receiving a reference setting operation, and a position designation operation after the reference setting operation, that are input by a user touching an input unit provided on a display surface of a display unit; a reference position setting unit setting a reference position at a position shifted toward a periphery of the input unit from the position of the reference setting operation on the input unit; and a display control unit setting, depending on the reference position and the position of the position designation operation, a display position of a pointer for selecting a position on the display unit.
    Type: Application
    Filed: February 5, 2014
    Publication date: August 14, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: MASASHI MIYAZAKI, TOMOKA MOCHIZUKI, TOMOHIRO SHIMIZU, TOMONORI SUGIURA
  • Patent number: 8791783
    Abstract: An electronic component to be embedded in a substrate is configured so that planar coils protected by insulators are sandwiched be a pair of magnetic layers. Ports, or openings or absent parts are provided at predetermined positions of one or both of the magnetic layers, and the predetermined positions correspond to the positions opposite to terminal electrodes of the planar coils. Accordingly, a contribution to reduction of the size and weight of electronic equipment can be made.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: July 29, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Masashi Miyazaki, Yuichi Sugiyama, Yoshiki Hamada, Yutaka Hata, Hideki Yokota
  • Patent number: 8774205
    Abstract: A network device 200 for relaying packets includes a network interface 220, a forwarding engine 240, a state change controller 274, a device state controller 276 and a device information table 278. The state change controller 274 and the device state controller 276 cooperatively determine whether a packet receiver port that has received a sleep notification packet among a plurality of ports included in the network interface 220 has setting of link aggregation. When link aggregation is set for the packet receiver port, the state change controller 274 and the device state controller 276 keep the packet receiver port in a power ON state, while all other ports, which belong to an identical link aggregation group are to a power OFF state.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: July 8, 2014
    Assignee: Alaxala Networks Corporation
    Inventors: Masashi Miyazaki, Hideo Kodaka, Shinji Nozaki
  • Publication number: 20140126160
    Abstract: There is provided an electronic circuit module that prevents a bonding force between ground wiring and a shield from decreasing and maintains successfully a desirable shield effect. The electronic circuit module includes a core layer also functioning as the ground wiring, each face OS of each first protrusion of the core layer facing to an end face of a shield is adjacent to faces OS of an outer cover made of an insulating synthetic resin facing to the end face of the shield, and the end face of the shield is bonded to both of the each face OS of each first protrusion facing to the end face of the shield and the faces OS of the outer cover facing to the end face of the shield.
    Type: Application
    Filed: November 6, 2013
    Publication date: May 8, 2014
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Yuichi SUGIYAMA, Tatsuro SAWATARI, Masashi MIYAZAKI
  • Publication number: 20140126157
    Abstract: An electronic circuit module includes a substrate with built-in component, a mount component mounted on the substrate with built-in component, a sealing portion covering the mount component, and a shield made of a conductive synthetic resin covering the sealing portion. The substrate with built-in component has a core layer made of a metal, an outer cover made of an insulating synthetic resin, and a first protrusion. The core layer has corners and side faces. The outer cover covers the corners and the side faces, and has a first surface. The first protrusion has a first end face exposed at the outer cover and a second surface adjacent to the first surface, and is formed away from the corners of the side faces to protrude outwardly. The sealing portion covers the mount component. The shield covers the sealing portion, and has a third surface bonded to the first surface and the second surface.
    Type: Application
    Filed: November 6, 2013
    Publication date: May 8, 2014
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Tatsuro SAWATARI, Masashi MIYAZAKI, Yoshiki HAMADA, Yuichi SUGIYAMA, Kazuaki IDA
  • Publication number: 20140048321
    Abstract: Provided is a substrate with a built-in electronic component that can minimize an occurrence of a deformation such as warping or distortion of the substrate with a built-in electronic component, which is caused by a difference in rigidity between a region of low rigidity and a region of high rigidity that are formed in a core layer thereof. In the substrate with a built-in electronic component, electronic components 12 are respectively housed in a plurality of housing portions 11a1 that are formed in a core layer 11a, and in the core layer 11a, a plurality of openings 11a2 filled with an insulator 11k are formed.
    Type: Application
    Filed: August 20, 2012
    Publication date: February 20, 2014
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Yuichi Sugiyama, Tatsuro Sawatari, Yusuke Inoue, Masashi Miyazaki, Yoshiki Hamada, Toshiyuki Kagawa
  • Publication number: 20130200977
    Abstract: An electronic component to be embedded in a substrate is configured so that planar coils protected by insulators are sandwiched be a pair of magnetic layers. Ports, or openings or absent parts are provided at predetermined positions of one or both of the magnetic layers, and the predetermined positions correspond to the positions opposite to terminal electrodes of the planar coils. Accordingly, a contribution to reduction of the size and weight of electronic equipment can be made.
    Type: Application
    Filed: May 11, 2011
    Publication date: August 8, 2013
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masashi Miyazaki, Yuichi Sugiyama, Yoshiki Hamada, Yutaka Hata, Hideki Yokota
  • Patent number: 8320447
    Abstract: An encoding apparatus includes a receiving section receiving syntax information defined by an encoding standard, a first encoding section encoding the received syntax information to generate encoded information, a transferring section transferring transmission encoded information based on the encoded information generated by the first encoding section, a second encoding section encoding reproduced encoded information reproduced from the transferred transmission encoded information, a conversion section converting the encoded information encoded by the first encoding section into redefined encoded information, to generate the transmission encoded information in accordance with the transfer capacity of the transferring section and the processing speed of encoding in each of the first encoding section and the second encoding section so as not to cause delay in encoding in the first encoding section or the second encoding section, and an inverse conversion section inversely converting the converted redefined enco
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: November 27, 2012
    Assignee: Sony Corporation
    Inventor: Masashi Miyazaki
  • Patent number: 8314343
    Abstract: In a multi-layer substrate including a core formed with a plurality of holes capable of containing an electronic part, a bottom insulating resin layer formed on a bottom surface of the core, a top insulating resin layer formed on a top surface of the core, a wiring layer selectively formed on an outer layer of the bottom insulating resin layer or top insulating resin layer, and an electronic part contained in the holes, both of the bottom and top insulating resin layers have a structure that is a combination of a resin which is changed to cohesiveness when heated and which undergoes smaller plastic deformation when heated to a higher temperature and an insulating resin layer which has a thickness sufficient to maintain insulation between the electronic part or a conductor of the core and the wiring layer and which inherently undergoes small plastic deformation, so that the electronic part can be securely and sealed in the holes without using a particular adhesive.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: November 20, 2012
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yusuke Inoue, Eiji Mugiya, Masashi Miyazaki, Tatsuro Sawatari, Yuichi Sugiyama
  • Publication number: 20120201254
    Abstract: A network device 200 for relaying packets includes a network interface 220, a forwarding engine 240, a state change controller 274, a device state controller 276 and a device information table 278. The state change controller 274 and the device state controller 276 cooperatively determine whether a packet receiver port that has received a sleep notification packet among a plurality of ports included in the network interface 220 has setting of link aggregation. When link aggregation is set for the packet receiver port, the state change controller 274 and the device state controller 276 keep the packet receiver port in a power ON state, while all other ports, which belong to an identical link aggregation group are to a power OFF state.
    Type: Application
    Filed: January 11, 2012
    Publication date: August 9, 2012
    Inventors: MASASHI MIYAZAKI, Hideo Kodaka, Shinji Nozaki
  • Publication number: 20120166883
    Abstract: A method, computer program product, and computer system for collecting errors which occur while a user uses a computer includes collecting log information on an operating environment including an operating procedure from a computing device associated with a user; accumulating the collected log information; identifying, from the log information, a second operating procedure similar to the operating procedure, wherein the second operating procedure had an error occur and no longer includes the error, in response to receiving the log information corresponding to the operating procedure in which the error occurs; and providing the user with the second operating procedure included in the searched log information.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 28, 2012
    Applicant: International Business Machines Corporation
    Inventors: MASASHI MIYAZAKI, Tomohiro Shimizu, Tomonori Sugiura
  • Publication number: 20120147972
    Abstract: An image decoding apparatus includes a first decoding unit configured to decode a bit stream that is generated by using a first variable length encoding system, so as to generate an intermediate stream, a second decoding unit configured to decode a bit stream that is generated by using a second variable length encoding system, so as to generate a syntax element, a syntax conversion unit configured to convert the syntax element that is generated, from syntax of the second variable length encoding system into syntax of the first variable length encoding system, and a first encoding unit configured to encode the syntax element that is syntax-converted, so as to generate the intermediate stream.
    Type: Application
    Filed: October 5, 2011
    Publication date: June 14, 2012
    Applicant: Sony Corporation
    Inventor: Masashi MIYAZAKI
  • Patent number: 8189674
    Abstract: A decoding method and device for decoding a coefficient data row subjected to orthogonal transform processing in a predetermined coding processing unit from an input bit stream in which using a table selected corresponding to the number of unprocessed coefficient data of a specific value in the coefficient data row, at least a specific syntax element indicating the number of continuous coefficient data of the specific value in the coefficient data row is assigned for every coefficient data which is not the specific value.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: May 29, 2012
    Assignee: Sony Corporation
    Inventors: Daijou Shigemoto, Masashi Miyazaki
  • Patent number: RE45146
    Abstract: A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: September 23, 2014
    Assignee: Taiyo Yuden Co., Ltd
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari