Abstract: A filter capable of separating or filtering micro foreign particles in a flow passage is provided. A first mask and a second mask are formed on a silicon substrate by dry etching. Before performing the dry etching, a resist of the first mask is subjected to a heat treatment performed at a temperature equal to or higher than a glass transition point. A resist of the second mask is not subjected to such a heat treatment. This processing simultaneously forms in the substrate a groove portion and a wall having a hole that is located in the groove portion. A silicon material located beneath a wide portion of the first mask remains as a wall portion separating the holes.

Abstract: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

Abstract: To raise the degree of flexibility in design, simplify the control of lubricating oil and give a low sliding resistance to the rolling elements, the rolling guide unit provided with a cylindrical member through which a rail passes for it to slide on, raceway paths constituted of a combination of the cylindrical member and the rail, circuit paths formed in the cylindrical member and each making interconnection between the two ends of the raceway path by way of direction-changing recesses, and rolling elements circulating in the circuit and raceway paths in accordance with the relative movement between the rail and the cylindrical member, is characterized by mounting holes formed in the cylindrical member; oiled members respectively installed in the mounting holes; and oil-supply members each provided along the contact faces of the rolling elements in the raceway or circuit path and in contact with the oiled member.

Abstract: A leakage current flowing between data lines of a nonvolatile semiconductor memory is reduced. In a memory array of a nonvolatile semiconductor memory device having an AND type flash memory, a concave portion is formed in a junction isolation area between adjacent word limes and between adjacent assist gate wirings AGL, and the height of a main surface (first main surface) of a semiconductor substrate in the region where the concave portion is formed is made lower than that of the main surface (second main surface) of the semiconductor substrate to which an assist gate wiring is facing. As a result, it is possible to control the leakage current that flows between the drain line and source line in the aforementioned junction isolation region during operation of a flash memory.

Abstract: A reduction in size nonvolatile semiconductors for use in a memory device and an increase in the capacity thereof are promoted. Each memory cell of a flash memory is provided with a field effect transistor having a first gate insulator film formed on a p-type well, a selector gate which is formed on the first insulator film and has side faces and a top face covered with a silicon oxide film (first insular film), floating gates which are formed in a side-wall form on both sides of the selector gate and which are electrically isolated from the selector gate through the silicon oxide film, a second gate insulator film formed to cover the silicon oxide film and the surface of each of the floating gates, and a control gate formed over the second gate insulator film.

Abstract: A sliding device is extensively acceptable for a variety of machines, made reduced in the overall length, thereby compact in construction. The sliding device, since having a drive train enclosure made airtight, is acceptable for the operation in the clean environment. The sliding device is comprised of an elongated sliding unit enclosure of airtight construction, a sliding table and a driving motor that is coupled to the drive train enclosure in parallel with the sliding unit enclosure. The drive train enclosure receives therein a drive train to carry power from the driving motor to the sliding table. The drive train enclosure is mounted with the driving motor with keeping airtightness.

Abstract: In order to form a more homogenous heat generating resistive layer, the present invention provides a method of manufacturing a substrate for an ink jet recording head having a support which has an insulative layer on its surface, a pair of electrode layers disposed on the surface of the support, and a heat generating resistive layer which continuously covers the pair of electrode layers and a section between the pair of electrode layers. The method includes the step of forming an electrode layer on the support and the step of forming the pair of electrode layers by etching the electrode layer. In the step of forming the pair of electrode layers by etching the electrode layer, by etching a surface portion of the insulative layer positioned between the pair of insulative layers, a recess is formed in the surface portion of the insulative layer.

Abstract: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Abstract: Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

Abstract: A non-volatile semiconductor memory device provides for higher integration by reducing the area of occupation of direct peripheral circuits, in which the memory cell of an AND type flash memory includes a selection gate, a float gate, a control gate that functions as a word line, and an n-type semiconductor region (source, drain) that functions as a local bit line. A pair of local bit lines adjacent to each other in a memory mat are connected with one global bit line at one end in the direction of the column of the memory mat, and a selection MOS transistor, formed by one enhancement type MOS transistor and one depletion type MOS transistors is connected in series with each of the pair of local bit lines. One of the local bit lines is selected by turning the selection MOS transistor on/off.

Abstract: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

Abstract: To suppress oxidation of the inner walls of element isolation grooves otherwise occurring during thermal oxidation processes, a nitrogen introducing layer, that has a lower diffusion coefficient relative to an oxidizing agent, is formed at the surface portion of a silicon oxide film buried within an element isolation groove. This nitrogen introduced layer functions as a barrier layer for precluding the oxidizer (such as oxygen, water or the like) in vapor phase from diffusing into the silicon oxide film during thermal processing steps. The nitrogen introduced layer is formed by performing nitrogen ion implantation into the entire surface of a substrate and subsequently applying thermal processing to the substrate to thereby activate the nitrogen that has been doped.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistor can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

Abstract: Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

Abstract: A cage, rollers and solid lubricant are all formed integrally into a complete unitary molding with using difference in thermal expansion in a mold. Assembling the complete unitary molding into the race in the rolling-contact bearing is made easier. The complete unitary molding is made such that the rollers remain exposed partially at their rolling surfaces above the inside circular surface of the complete unitary molding while the solid lubricant on the outside circular surface of the complete unitary molding is squeezed out from between the rolling surfaces of the rollers and the inside circular surface of the outside mold upon molding operation, thereby getting the rolling surfaces of the rollers exposed partially. The mold is composed of an outside mold, an inside mold and an intermediate mold, which is made of a substance larger in thermal expansion than other substance for the outside and inside molds.

Abstract: With a sealing structure for the sliding unit disclosed here, a sealing member of foam rubber is disposed in a way closing a clearance left open between widthwise opposing covering shells installed on a track rail. A covering shell is composed of a covering side secured to a side wall of a track rail, and seal supporters integral with the covering side. A slider is provided with a projection extending through between inside fronts of the sealing members, which come into abutment against one another. Upon the back-and-forward linear movement of the slider relatively to the track rail, the projection moves in a way deforming the sealing members in expansion/collapse fashion, with keeping the close sliding engagement with the confronting fronts of the sealing members so that the sealing members keep constantly closing the clearance left open between the covering shells.

Abstract: Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.