Abstract: A table system with angular position control in which a table is moved accurately over a tiny angle in circular direction to any desired position. The table is supported on a bed for rotation through a crossed-roller bearing. Position control apparatus turns the table over a tiny angle through an arm plate fastened to the table. A nut and screw set cause a linear motion that is in line with a tangent of the table, and the linear motion is translated into a circular motion to turn the table by a first linear motion guide unit to control the linear motion in the tangential direction, and a second linear motion guide unit to control a linear motion in the direction facing the center of the table.

Abstract: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Abstract: A transmission line is monitored while the communication is held in a steady state and moving a tone set if there are no tones securing a predetermined value of an S/N ratio. The tone set is not moving if there are at least two tones securing the S/N ratio. The tone set is moved by the predetermined method if there is one tone securing the S/N ratio and it is judged that communication quality can be maintained by moving the tone set in a same tone group. The tone group moved if it is judged that the communication quality cannot be maintained even by executing movement of the tone set in the same tone group.

Abstract: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Abstract: There was a problem that sharpening of a substrate and localized increase in the thickness of a gate oxide film become more remarkable as the thickness of the gate oxide film is increased to degrade the gate withstand voltage at the surface edge of shallow groove isolation structure. In the present invention, a bird's beak is disposed at the surface edge of a shallow isolation structure GROX11 just below gate electrode POLY11 and in contact with the gate insulation film HOX1 to form the gate insulation film HOX1 previously. This can ensure normal gate withstand voltage of the MOS transistor and favorable device isolation withstand voltage and increased integration degree simultaneously.

Abstract: In sealing means for a slider unit in which sealing members of foam rubber are arranged to close sidewise clearances left open between a dustproof cover and side walls of a track rail, the improved sealing means is directed to making sure of effective sealing performance, prolonging a durable service life of the sealing member, and also making mounting of the sealing member to the clearances easier. Sealing members of flexible foam rubber rich in restoring force are arranged in the clearance between the dustproof cover and the side walls of the track rail. The sealing members, while fastened to the dustproof cover, are allowed to experience any deformation of expansion/collapse when sideward wings of the slider moves back and forward between the confronting sealing members and the side walls, with keeping close sliding engagement with the associated surfaces of the wings.

Abstract: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is formed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

Abstract: Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

Abstract: With a sealing structure for the sliding unit disclosed here, a sealing member of foam rubber is disposed in a way closing a clearance left open between widthwise opposing covering shells installed on a track rail. A covering shell is composed of a covering side secured to a side wall of a track rail, and seal supporters integral with the covering side. A slider is provided with a projection extending through between inside fronts of the sealing members, which come into abutment against one another. Upon the back-and-forward linear movement of the slider relatively to the track rail, the projection moves in a way deforming the sealing members in expansion/collapse fashion, with keeping the close sliding engagement with the confronting fronts of the sealing members so that the sealing members keep constantly closing the clearance left open between the covering shells.

Abstract: Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

Abstract: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Abstract: The communication system conducts communication among nodes N1 to N4 that form a communication network of bus type by using set communication parameters. The communication system includes one master node N1 selected from among the nodes N1 to N4; and one or more slave nodes N2 to N4 that are nodes N2 to N4 other than the master node N1, the one or more slave nodes logically star-connected to the master node N1, each of the one or more slave nodes conducting communication with another node N2 to N4 via the master node N1 by using communication parameters negotiated with the master node N1.

Abstract: Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to store the data in the nonvolatile memory, and the nonvolatile memory is capable of performing at least a program operation and an erase operation. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the erase operation. Also, the buffer memory is capable of receiving a unit of data, in the program operation, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

Abstract: To suppress oxidation of inner walls of element isolation grooves otherwise occurring during thermal oxidation processes. A nitrogen introducing layer less in diffusion coefficient relative to an oxidizing agent is formed at the surface portion of a silicon oxide film as buried within an element isolation groove. This nitrogen introduce layer functions as a barrier layer for precluding the oxidizer (such as oxygen, water or else) in vapor phase from diffusing into the silicon oxide film at thermal processing steps. The nitrogen introduce layer is formed by performing nitrogen ion implantation into an entire surface of a substrate and subsequently applying thermal processing to the substrate to thereby activate the nitrogen doped.

Abstract: Nodes (N1 to N3) include MTU length calculation sections (31 to 33) which multiply baud rates (D21 to D23) of communication parameters (D11 to D13) set based on results of negotiation with other nodes (N1 to N3) by a communication regulated time used in timer control for transmission/reception, and which calculate MTU lengths as maximum packet lengths of the packets based on the multiplication results so that transmission times of the packets for the destination nodes are equal to each other, and also include communication control sections (21 to 23) which divide data to be transmitted to destination nodes into packets having the calculated MTU length to transmit the packets.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

Abstract: A table system with angular position control means is disclosed in which an object supported on a table can be moved accurately over a tiny angle in circular direction to any desired position. The table is supported on a bed for rotation through a crossed-roller bearing. Position control means gets the table to turn over a tiny angle through an arm plate fastened to the table. A nut and screw set, when driven by a motor, causes a linear motion that is in line with a tangent of the table, and the linear motion is translated into a circular motion to turn the table in any circular direction by virtue of a combination of a first linear motion guide unit interposed between the bed and a carriage to control the linear motion in the tangential direction, a second bearing means interposed between the carriage and a turret means, and a second linear motion guide unit to control a linear motion in the direction that looks towards the center of the table.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

Abstract: A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.