Patents by Inventor Masato Hiramatsu

Masato Hiramatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240090050
    Abstract: A communication control method used in a mobile communication system including a gNB 200 and a UE performing wireless communication with the gNB 200, the communication control method including: establishing, by an RIS-UE 100B, a wireless connection with the gNB 200, the RIS-UE 100B controlling an RIS device 500 that changes a propagation direction of a radio wave incident from the gNB 200; and transmitting, by the RIS-UE 100B to the gNB 200 through wireless communication, RIS device information indicating at least one of a capability of the RIS device 500 and a control state of the RIS device 500.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: KYOCERA CORPORATION
    Inventors: Masato FUJISHIRO, Hiromichi YOSHIKAWA, Chiharu YAMAZAKI, Nobuki HIRAMATSU
  • Publication number: 20240089744
    Abstract: A communication control method used in a mobile communication system including a gNB and a UE performing wireless communication with the gNB, the communication control method including: establishing, by an RIS-UE, a wireless connection with the gNB, the RIS-UE controlling an RIS device that changes a propagation direction of a radio wave incident from the gNB; and transmitting, by the gNB to the RIS-UE through the wireless communication, one or more pieces of RIS control information used to control the RIS device.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: KYOCERA Corporation
    Inventors: Masato FUJISHIRO, Hiromichi YOSHIKAWA, Chiharu YAMAZAKI, Nobuki HIRAMATSU
  • Publication number: 20220077266
    Abstract: A display device includes a substrate having flexibility, a transistor having agate insulating film and further having a semiconductor layer and a gate electrode that sandwich the gate insulating film, the transistor formed in an area where the substrate is bent, and a gate wiring line so formed on the substrate as to be connected to the gate electrode, and the gate electrode has an area that is present in an area where the gate electrode overlaps with the semiconductor layer and is thinner than at least part of the gate wiring line.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Applicant: Japan Display Inc.
    Inventors: Yasukazu KIMURA, Masato HIRAMATSU, Takuma NISHINOHARA, Toshihiko ITOGA
  • Patent number: 11217646
    Abstract: A display device includes a substrate having flexibility, a transistor having a gate insulating film and further having a semiconductor layer and a gate electrode that sandwich the gate insulating film, the transistor formed in an area where the substrate is bent, and a gate wiring line so formed on the substrate as to be connected to the gate electrode, and the gate electrode has an area that is present in an area where the gate electrode overlaps with the semiconductor layer and is thinner than at least part of the gate wiring line.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: January 4, 2022
    Assignee: Japan Display Inc.
    Inventors: Yasukazu Kimura, Masato Hiramatsu, Takuma Nishinohara, Toshihiko Itoga
  • Patent number: 10672856
    Abstract: A display device including a substrate, a display region, a periphery region outside of the display region, a terminal part arranged with a plurality of terminal electrodes in the periphery region, a wiring arranged between the display region and the terminal part, a plurality of inorganic insulation layers, and an organic insulation film arranged between the display region and the terminal part. At least one of the plurality of inorganic insulation layer extends between the display region and the terminal part and includes an opening part between the display region and the terminal part, the organic insulation film is arranged overlapping the opening part, the organic insulation film has a larger film thickness at a center part than an end part of the opening part, and the wiring is arranged along an upper surface of the organic insulation film.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: June 2, 2020
    Assignee: Japan Display Inc.
    Inventor: Masato Hiramatsu
  • Patent number: 10658400
    Abstract: According to one embodiment, a display device includes an underlying insulation layer formed on a surface of a resin layer, and a thin-film transistor formed above the surface of the resin layer via the underlying insulation layer. The underlying insulation layer includes a three-layer multilayer structure of a first silicon oxide film, a silicon nitride film formed above the first silicon oxide film, and a second silicon oxide film formed above the silicon nitride film.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: May 19, 2020
    Assignee: Japan Display Inc.
    Inventors: Masato Hiramatsu, Yasushi Kawata, Arichika Ishida
  • Publication number: 20200135828
    Abstract: A display device includes a substrate having flexibility, a transistor having a gate insulating film and further having a semiconductor layer and a gate electrode that sandwich the gate insulating film, the transistor formed in an area where the substrate is bent, and a gate wiring line so formed on the substrate as to be connected to the gate electrode, and the gate electrode has an area that is present in an area where the gate electrode overlaps with the semiconductor layer and is thinner than at least part of the gate wiring line.
    Type: Application
    Filed: December 31, 2019
    Publication date: April 30, 2020
    Applicant: Japan Display Inc.
    Inventors: Yasukazu KIMURA, Masato HIRAMATSU, Takuma NISHINOHARA, Toshihiko ITOGA
  • Patent number: 10566400
    Abstract: A display device includes a substrate having flexibility, a transistor having a gate insulating film and further having a semiconductor layer and a gate electrode that sandwich the gate insulating film, the transistor formed in an area where the substrate is bent, and a gate wiring line so formed on the substrate as to be connected to the gate electrode, and the gate electrode has an area that is present in an area where the gate electrode overlaps with the semiconductor layer and is thinner than at least part of the gate wiring line.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: February 18, 2020
    Assignee: Japan Display Inc.
    Inventors: Yasukazu Kimura, Masato Hiramatsu, Takuma Nishinohara, Toshihiko Itoga
  • Patent number: 10559780
    Abstract: According to one embodiment, a display device includes a first base, a second base, a middle layer including a metal layer located between the first base and the second base, and a circuit unit and a display element unit located above the second base.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: February 11, 2020
    Assignee: Japan Display Inc.
    Inventor: Masato Hiramatsu
  • Publication number: 20190334122
    Abstract: According to one embodiment, a display device includes a first base, a second base, a middle layer including a metal layer located between the first base and the second base, and a circuit unit and a display element unit located above the second base.
    Type: Application
    Filed: July 9, 2019
    Publication date: October 31, 2019
    Applicant: Japan Display Inc.
    Inventor: Masato HIRAMATSU
  • Patent number: 10424760
    Abstract: According to one embodiment, a display device includes a first base, a second base, a middle layer including a metal layer located between the first base and the second base, and a circuit unit and a display element unit located above the second base.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: September 24, 2019
    Assignee: Japan Display Inc.
    Inventor: Masato Hiramatsu
  • Publication number: 20190206975
    Abstract: A display device including a substrate, a display region, a periphery region outside of the display region, a terminal part arranged with a plurality of terminal electrodes in the periphery region, a wiring arranged between the display region and the terminal part, a plurality of inorganic insulation layers, and an organic insulation film arranged between the display region and the terminal part. At least one of the plurality of inorganic insulation layer extends between the display region and the terminal part and includes an opening part between the display region and the terminal part, the organic insulation film is arranged overlapping the opening part, the organic insulation film has a larger film thickness at a center part than an end part of the opening part, and the wiring is arranged along an upper surface of the organic insulation film.
    Type: Application
    Filed: December 20, 2018
    Publication date: July 4, 2019
    Inventor: Masato HIRAMATSU
  • Publication number: 20180351131
    Abstract: According to one embodiment, a display device includes a first base, a second base, a middle layer including a metal layer located between the first base and the second base, and a circuit unit and a display element unit located above the second base.
    Type: Application
    Filed: May 17, 2018
    Publication date: December 6, 2018
    Applicant: Japan Display Inc.
    Inventor: Masato Hiramatsu
  • Publication number: 20170287999
    Abstract: A display device includes a substrate having flexibility, a transistor having a gate insulating film and further having a semiconductor layer and a gate electrode that sandwich the gate insulating film, the transistor formed in an area where the substrate is bent, and a gate wiring line so formed on the substrate as to be connected to the gate electrode, and the gate electrode has an area that is present in an area where the gate electrode overlaps with the semiconductor layer and is thinner than at least part of the gate wiring line.
    Type: Application
    Filed: March 30, 2017
    Publication date: October 5, 2017
    Applicant: Japan Display Inc.
    Inventors: Yasukazu KIMURA, Masato HIRAMATSU, Takuma NISHINOHARA, Toshihiko ITOGA
  • Publication number: 20170278869
    Abstract: A first semiconductor layer is formed on an insulating surface. A first insulating layer for covering an upper side of the first semiconductor layer is formed. On the first insulating layer, a second semiconductor layer is formed. A second insulating layer for covering an upper side of the second semiconductor layer is formed. A first contact hole extending through the first and second insulating layers to reach the first semiconductor, and a second contact hole extending through the second insulating layer to reach the second semiconductor layer but not reaching the first insulating layer are opened. After the step of forming the second insulating layer before the step of opening the first and second contact holes, laser or heat annealing process is executed.
    Type: Application
    Filed: March 21, 2017
    Publication date: September 28, 2017
    Applicant: Japan Display Inc.
    Inventors: Masato Hiramatsu, Hiroki Ohara
  • Publication number: 20170207255
    Abstract: According to one embodiment, a display device includes an underlying insulation layer formed on a surface of a resin layer, and a thin-film transistor formed above the surface of the resin layer via the underlying insulation layer. The underlying insulation layer includes a three-layer multilayer structure of a first silicon oxide film, a silicon nitride film formed above the first silicon oxide film, and a second silicon oxide film formed above the silicon nitride film.
    Type: Application
    Filed: April 5, 2017
    Publication date: July 20, 2017
    Applicant: Japan Display Inc.
    Inventors: Masato HIRAMATSU, Yasushi KAWATA, Arichika ISHIDA
  • Patent number: 9666599
    Abstract: According to one embodiment, a display device includes an underlying insulation layer formed on a surface of a resin layer, and a thin-film transistor formed above the surface of the resin layer via the underlying insulation layer. The underlying insulation layer includes a three-layer multilayer structure of a first silicon oxide film, a silicon nitride film formed above the first silicon oxide film, and a second silicon oxide film formed above the silicon nitride film.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: May 30, 2017
    Assignee: Japan Display Inc.
    Inventors: Masato Hiramatsu, Yasushi Kawata, Arichika Ishida
  • Patent number: 9647134
    Abstract: According to one embodiment, a thin-film transistor comprises an oxide semiconductor layer formed on a part of a substrate, a first gate insulator film of a silicon dioxide film formed on the oxide semiconductor layer and by the CVD method with a silane-based source gas, a second gate insulator film of a silicon dioxide film formed on the first gate insulator film by the CVD method with a TEOS source gas, and a gate electrode formed on the second gate insulator film.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: May 9, 2017
    Assignee: JAPAN DISPLAY INC.
    Inventors: Masato Hiramatsu, Masayoshi Fuchi, Arichika Ishida
  • Patent number: 9412334
    Abstract: According to one embodiment, a liquid crystal display device includes an array substrate including a first color filter configured to transmit light in a first wavelength range, a second color filter configured to transmit light in a second wavelength range of greater wavelengths than the first wavelength range, a first switching element disposed above the second color filter, a second switching element disposed above the second color filter, a first pixel electrode which is electrically connected to the first switching element and is located above the first color filter, and a second pixel electrode which is electrically connected to the second switching element and is located above the second color filter.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: August 9, 2016
    Assignee: JAPAN DISPLAY INC.
    Inventors: Hajime Watakabe, Arichika Ishida, Masato Hiramatsu
  • Publication number: 20160172503
    Abstract: According to one embodiment, a thin-film transistor comprises an oxide semiconductor layer formed on a part of a substrate, a first gate insulator film of a silicon dioxide film formed on the oxide semiconductor layer and by the CVD method with a silane-based source gas, a second gate insulator film of a silicon dioxide film formed on the first gate insulator film by the CVD method with a TEOS source gas, and a gate electrode formed on the second gate insulator film.
    Type: Application
    Filed: February 24, 2016
    Publication date: June 16, 2016
    Applicant: Japan Display Inc.
    Inventors: Masato HIRAMATSU, Masayoshi FUCHI, Arichika ISHIDA