Abstract: According to one embodiment, a first electrode is formed on a first face of a first semiconductor chip, and a second electrode and a protrusion are formed on a second face of a second semiconductor chip. The first semiconductor chip and the second semiconductor chip are spaced from one another by the protrusion in such a manner that the first face and the second face face each other. The first semiconductor chip and the second semiconductor chip are subject to reflow to be electrically connected to each other, and then the protrusion is cured at a temperature lower than a reflow temperature.

Abstract: According to an embodiment, a semiconductor package includes a semiconductor chip mounted on an interposer board, a encapsulant sealing the semiconductor chip, and a conductive shielding layer covering the encapsulant and at least part of a side surface of the interposer board. The interposer board has plural vias through an insulating substrate. A part of the plural vias has a cutting plane exposing to the side surface of the interposer board and cut in a thickness direction of the interposer board. The cutting plane of the via is electrically connected to the conductive shielding layer.

Abstract: According to an embodiment, a semiconductor package includes a semiconductor chip mounted on an interposer board, a encapsulant sealing the semiconductor chip, and a conductive shielding layer covering the encapsulant and at least part of a side surface of the interposer board. The interposer board has plural vias through an insulating substrate. A part of the plural vias has a cutting plane exposing to the side surface of the interposer board and cut in a thickness direction of the interposer board. The cutting plane of the via is electrically connected to the conductive shielding layer.

Abstract: A semiconductor manufacturing apparatus includes: a collet which sucks a semiconductor chip having a main surface on which a bump is formed, and an actuator which transfers the sucked semiconductor chip onto a mounting substrate or another semiconductor chip by driving the collet. A recessed portion for avoiding a contact between the collet and the bump is formed on a suction surface of the collet which sucks the semiconductor chip.

Abstract: The problem that a metal wire joined integrally to a hole formed in a proximal end face of a medical suture needle is susceptible to bending damage is reduced. A suture needle A has a blind hole 5 which is formed in a proximal end face 3, inserts the end of a wire 10 thereinto, and joins the wire 10 thereto by caulking, and a counterbore 6 which is formed on the proximal end face 3 side of the blind hole 5 and has a dimension D at least in the proximal end face 3 larger than a dimension d of the blind hole 5 and a depth L smaller than a depth of a caulked portion with respect to the blind hole 5. A suture needle with wire inserts the end of the wire 10 into the blind hole 5 to caulk the outer circumference of the suture needle corresponding to the blind hole 5, thereby integrally joins the wire 10 thereto.

Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.

Abstract: [Problems] To ensure the sharpness of a stripping knife whereby a part of a living tissue is incised and stripped while preventing a cut along the thickness direction. [Means for Solving Problems] A stripping knife (A) having a plate-shaped blade (3) having an edge (1) around the periphery, a shank (5) connected to the blade (3), and a handle (7) holding the shank (5) in the integrated state, wherein the blade (3) is composed of the edge (1) formed at the front end and a guide face (2) which is formed between the edge (1) and the front face (3b) of the connected plate constituting the blade (3) and brought into contact with the surface (13) of the remaining tissue.

Abstract: According to one embodiment a method is provided including positioning and bonding a plurality of first semiconductor chips in a coplanar relation on a first substrate, laminating at least a plurality of second semiconductor chips on the first semiconductor chips, cutting the first substrate for separation into a discrete chip lamination, aligning an electrode pad provided on a surface of the discrete lamination with an electrode pad on a second substrate, and temporarily connecting the electrode pads on the lamination and the second substrate in an opposing relation to the first substrate, providing electrical connection between the electrode pads by a reflow process, flowing a liquid resin from the side of the first substrate towards the second substrate to seal the chip lamination and spaces between the chip lamination and the first and second substrate, and cutting the chip lamination to form a discrete device.

Abstract: A hard mask formed above a gate film is patterned with a first mask pattern, the patterned hard mask film is processed into a gate pattern with a second mask pattern, the gate film is patterned with the hard mask film as a mask, a spacer insulating film is formed, a third mask pattern covering an edges of the gate pattern is formed above the spacer insulating film, the spacer insulating film is etched with the third mask pattern as a mask, and a sidewall insulating film is formed on side walls of the gate film leaving the spacer insulating film in a region of the edge of the gate pattern.

Abstract: An apparatus relating to the manufacture of stacked semiconductor devices includes, for example, a first holding section configured to hold a first semiconductor device and a second holding section configured to hold a second semiconductor device. Additionally, a measuring section including an imaging device for acquiring images of the first and second semiconductor devices and a control section configured to control the holding sections to correct misalignment between the semiconductor devices. The control section is further configured to determine misalignment using the images of the first and second semiconductor devices when the images include a first alignment mark disposed proximate to an edge of the first semiconductor device and a second alignment mark disposed proximate to an edge of the second semiconductor device.

Abstract: According to one embodiment, a first electrode is formed on a first face of a first semiconductor chip, and a second electrode and a protrusion are formed on a second face of a second semiconductor chip. The first semiconductor chip and the second semiconductor chip are spaced from one another by the protrusion in such a manner that the first face and the second face face each other. The first semiconductor chip and the second semiconductor chip are subject to reflow to be electrically connected to each other, and then the protrusion is cured at a temperature lower than a reflow temperature.

Abstract: A semiconductor device includes: a semiconductor substrate; a first transistor which is formed on the semiconductor substrate and includes a source/drain region and a gate electrode; an insulating film which covers the source/drain region and the gate electrode of the first transistor; and a first contact plug which is formed in the insulating film and is connected to the source/drain region or the gate electrode of the first transistor, wherein the first contact plug includes a first column section which extends in a thickness direction of the insulating film and is in contact with the source/drain region or the gate electrode of the first transistor, and a first flange section which juts out from an upper portion of the first column section in a direction parallel to a surface of the insulating film, and an upper surface of the first flange section is planarized.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor chip having a first main surface and a second main surface which opposes the first main surface and on which a first electrode is mounted, a second semiconductor chip having a third main surface on which a second electrode connected to the first electrode is provided and a fourth main surface which opposes the third main surface, and a first spacer which is arranged in a region formed between the first and second electrodes and an outer peripheral surface of the first and second semiconductor chips, and ensures a gap between the first semiconductor chip and the second semiconductor chip.

Abstract: A semiconductor manufacturing apparatus includes: a collet which sucks a semiconductor chip having a main surface on which a bump is formed, and an actuator which transfers the sucked semiconductor chip onto a mounting substrate or another semiconductor chip by driving the collet. A recessed portion for avoiding a contact between the collet and the bump is formed on a suction surface of the collet which sucks the semiconductor chip.

Abstract: A manufacturing method of a semiconductor device includes forming a first resist film above a substrate, placing a first photomask, that includes a first mask pattern, in a first position above the first resist film, transferring the first mask pattern to the first resist film to form a first resist pattern above the substrate, forming a second resist film above the substrate after forming the first resist pattern, placing the first photomask in a second position above the second resist film, and transferring the first mask pattern to the second resist film to form a second resist pattern above the substrate.

Abstract: According to one embodiment a method is provided including positioning and bonding a plurality of first semiconductor chips in a coplanar relation on a first substrate, laminating at least a plurality of second semiconductor chips on the first semiconductor chips, cutting the first substrate for separation into a discrete chip lamination, aligning an electrode pad provided on a surface of the discrete lamination with an electrode pad on a second substrate, and temporarily connecting the electrode pads on the lamination and the second substrate in an opposing relation to the first substrate, providing electrical connection between the electrode pads by a reflow process, flowing a liquid resin from the side of the first substrate towards the second substrate to seal the chip lamination and spaces between the chip lamination and the first and second substrate, and cutting the chip lamination to form a discrete device.

Abstract: A hard mask formed above a gate film is patterned with a first mask pattern, the patterned hard mask film is processed into a gate pattern with a second mask pattern, the gate film is patterned with the hard mask film as a mask, a spacer insulating film is formed, a third mask pattern covering an edges of the gate pattern is formed above the spacer insulating film, the spacer insulating film is etched with the third mask pattern as a mask, and a sidewall insulating film is formed on side walls of the gate film leaving the spacer insulating film in a region of the edge of the gate pattern.

Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.

Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.

Abstract: A semiconductor device, includes: a wiring substrate, a stacked body mounted on the wiring substrate, an underfill layer filled into gaps between respective semiconductor chips of the stacked body; and a molding body made up of a molding resin covered and formed at outside of the stacked body and so on. The underfill layer is made up of a cured product of a resin material containing an amine-based curing agent, and the cured product has a Tg of 65° C. or more and 100° C. or less.