Patents by Inventor Masatoshi Fukuda

Masatoshi Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7264626
    Abstract: A blood vessel knife allows a doctor to easily see a knife main body when holding it for surgical operation. In a blood vessel knife having a cutter holder at a tip portion of a rod-shaped grip, and a knife main body attached to a tip of the cutter holder, at least one of a first bent portion 2a formed at an end of the grip 2 and a second bent portion 3a formed on the cutter holder 3 is provided; the cutter holder 3 can be detachably engaged with the tip portion from either an inside or outside thereof; and an angle between the grip 2 and the knife main body is changeable whether the cutter holder is engaged from the inside or the outside of the tip portion. When gripping the blood vessel knife 1, doctors can easily see the knife main body 4 due to the second bent portion 3a, and the knife main body 4 diagonally penetrates a blood vessel 15 to prevent the knife main body 4 from penetrating a lower blood vessel wall 15b.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: September 4, 2007
    Assignee: MANI, Inc.
    Inventors: Yoshihiko Mochizuki, Masaaki Matsutani, Masatoshi Fukuda, Maeko Sasanuma
  • Patent number: 7148529
    Abstract: A semiconductor package includes (a) an interposer, (b) a wiring layer containing conductors formed adjacent to each other at intervals that cause no short circuit among the conductors, the wiring layer covering a given area of the interposer, to block light from passing through the given area, (c) a light blocking layer covering a no-wiring area of the interposer not covered by the wiring layer, to block light from passing through the no-wiring area, (d) a semiconductor chip electrically connected to the wiring layer, and (e) a resin mold sealing the wiring layer, the light blocking layer, and the semiconductor chip.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: December 12, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuru Oida, Masatoshi Fukuda, Yasuhiro Koshio, Hiroshi Funakura
  • Patent number: 7132332
    Abstract: A polysilicon film and the like are patterned to form n? diffusion layers on a silicon substrate. Subsequently, an outer edge of an Al2O3 film is made retreat to be smaller than that of a gate electrode by performing isotropic etching of the Al2O3 film, using a solution of sulfuric acid with hydrogen peroxide. A silicon oxide film, a silicon nitride film, the polysilicon film and the like are hardly removed although the solution of sulfuric acid with hydrogen peroxide exhibits higher etching rate to the Al2O3 film, enabling almost exclusive etching of the Al2O3 film at a high selectivity ratio. Subsequently, another polysilicon film is formed so as to fill spaces formed after the retreat of the Al2O3 film under the silicon oxide film. Subsequently, a sidewall insulating film is formed by remaining portions of the later polysilicon film in the spaces by performing RIE, oxidation, or the like of the later polysilicon film.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: November 7, 2006
    Assignee: Fujitsu Limited
    Inventors: Masaki Ishidao, Masahiro Kobayashi, Masatoshi Fukuda
  • Publication number: 20060243774
    Abstract: The present invention relates to a medical stapler for suturing body tissue by forming a medical staple supported by an anvil by bringing a ram close to the anvil, comprising a housing, a lever, an anvil and a ram, and the ram is composed of metal material and the drive portion formed on part of the lever and the ram guide portion provided in the housing are composed of synthetic resin and a gap between a leg formed on the ram and the anvil opposing the leg is set to a dimension allowing the medical staple to be formed into an excellent shape with a light load.
    Type: Application
    Filed: April 25, 2006
    Publication date: November 2, 2006
    Inventors: Kanji Matsutani, Toshiharu Kamei, Masatoshi Fukuda
  • Publication number: 20060191974
    Abstract: A surgical stapler has a body capable of containing a plurality of staples in an aligned state; a ram provided inside said body, having a central concave portion and pressure armatures on both sides of the concave portion; an anvil that, when the armatures of said ram contact both sides of a crown of a staple, forces the center of the crown into the concave portion of the ram; and a trigger rotatably supported on the body so as to cause relative movement between the ram and the anvil. A moving member strikes another member so as to produce a sound or a sensation of impact after a staple sandwiched between the ram and the anvil is bent by the advance of the anvil into the concave portion of the ram and bending of the staple is completed.
    Type: Application
    Filed: February 21, 2006
    Publication date: August 31, 2006
    Applicant: MANI., Inc.
    Inventors: Kanji Matsutani, Masatoshi Fukuda, Toshiharu Kamei, Takashi Ina
  • Publication number: 20060060912
    Abstract: A polysilicon film and the like are patterned to form n-diffusion layers on a silicon substrate. Subsequently, an outer edge of an Al2O3 film is made retreat to be smaller than that of a gate electrode by performing isotropic etching of the Al2O3 film, using a solution of sulfuric acid with hydrogen peroxide. A silicon oxide film, a silicon nitride film, the polysilicon film and the like are hardly removed although the solution of sulfuric acid with hydrogen peroxide exhibits higher etching rate to the Al2O3 film, enabling almost exclusive etching of the Al2O3 film at a high selectivity ratio. Subsequently, another polysilicon film is formed so as to fill spaces formed after the retreat of the Al2O3 film under the silicon oxide film. Subsequently, a sidewall insulating film is formed by remaining portions of the later polysilicon film in the spaces by performing RIE, oxidation, or the like of the later polysilicon film.
    Type: Application
    Filed: October 12, 2005
    Publication date: March 23, 2006
    Applicant: Fujitsu Limited
    Inventors: Masaki Ishidao, Masahiro Kobayashi, Masatoshi Fukuda
  • Patent number: 6987297
    Abstract: A polysilicon film and the like are patterned to form n? diffusion layers on a silicon substrate. Subsequently, an outer edge of an Al2O3 film is made retreat to be smaller than that of a gate electrode by performing isotropic etching of the Al2O3 film, using a solution of sulfuric acid with hydrogen peroxide. A silicon oxide film, a silicon nitride film, the polysilicon film and the like are hardly removed although the solution of sulfuric acid with hydrogen peroxide exhibits higher etching rate to the Al2O3 film, enabling almost exclusive etching of the Al2O3 film at a high selectivity ratio. Subsequently, another polysilicon film is formed so as to fill spaces formed after the retreat of the Al2O3 film under the silicon oxide film. Subsequently, a sidewall insulating film is formed by remaining portions of the later polysilicon film in the spaces by performing RIE, oxidation, or the like of the later polysilicon film.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: January 17, 2006
    Assignee: Fujitsu Limited
    Inventors: Masaki Ishidao, Masahiro Kobayashi, Masatoshi Fukuda
  • Patent number: 6960494
    Abstract: A semiconductor package has (a) a package base, (b) package terminals formed on the package base and used to connect the semiconductor package to another device, (c) a wiring layer formed on the package base and electrically connected to the package terminals, (d) a semiconductor chip mounted on the package base and electrically connected to the wiring layer, (e) a low-elasticity resin layer formed between a resin mold and the wiring layer and between the package base and the resin mold, and (f) the resin mold sealing the package base, the wiring layer, the semiconductor chip, and the low-elasticity resin layer.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: November 1, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Funakura, Eiichi Hosomi, Yasuhiro Koshio, Tetsuya Nagaoka, Junya Nagano, Mitsuru Oida, Masatoshi Fukuda, Atsushi Kurosu, Kaoru Kawai, Osamu Yamagata
  • Patent number: 6924526
    Abstract: The semiconductor device comprises a capacitor including a storage electrode 76, a capacitor dielectric film formed on the storage electrode 76, and a plate electrode formed on the capacitor dielectric film 78, the storage electrode 76 having an upper end rounded and having a larger thickness at the upper end than a thickness in the rest region. Whereby electric field concentration on the upper end of the storage electrode can be mitigated, and leakage current increase and dielectric breakdown of the capacitor dielectric film can be precluded.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: August 2, 2005
    Assignee: Fujitsu Limited
    Inventors: Masatoshi Fukuda, Kouji Tsunoda
  • Publication number: 20050051810
    Abstract: A semiconductor package has (a) a package base, (b) package terminals formed on the package base and used to connect the semiconductor package to another device, (c) a wiring layer formed on the package base and electrically connected to the package terminals, (d) a semiconductor chip mounted on the package base and electrically connected to the wiring layer, (e) a low-elasticity resin layer formed between a resin mold and the wiring layer and between the package base and the resin mold, and (f) the resin mold sealing the package base, the wiring layer, the semiconductor chip, and the low-elasticity resin layer.
    Type: Application
    Filed: October 21, 2004
    Publication date: March 10, 2005
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Funakura, Eiichi Hosomi, Yasuhiro Koshio, Tetsuya Nagaoka, Junya Nagano, Mitsuru Oida, Masatoshi Fukuda, Atsushi Kurosu, Kaoru Kawai, Osamu Yamagata
  • Patent number: 6836012
    Abstract: A semiconductor package has (a) a package base, (b) package terminals formed on the package base and used to connect the semiconductor package to another device, (c) a wiring layer formed on the package base and electrically connected to the package terminals, (d) a semiconductor chip mounted on the package base and electrically connected to the wiring layer, (e) a low-elasticity resin layer formed between a resin mold and the wiring layer and between the package base and the resin mold, and (f) the resin mold sealing the package base, the wiring layer, the semiconductor chip, and the low-elasticity resin layer.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: December 28, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Funakura, Eiichi Hosomi, Yasuhiro Koshio, Tetsuya Nagaoka, Junya Nagano, Mitsuru Oida, Masatoshi Fukuda, Atsushi Kurosu, Kaoru Kawai, Osamu Yamagata
  • Publication number: 20040218413
    Abstract: A polysilicon film and the like are patterned to form n-diffusion layers on a silicon substrate. Subsequently, an outer edge of an Al2O3 film is made retreat to be smaller than that of a gate electrode by performing isotropic etching of the Al2O3 film, using a solution of sulfuric acid with hydrogen peroxide. A silicon oxide film, a silicon nitride film, the polysilicon film and the like are hardly removed although the solution of sulfuric acid with hydrogen peroxide exhibits higher etching rate to the Al2O3 film, enabling almost exclusive etching of the Al2O3 film at a high selectivity ratio. Subsequently, another polysilicon film is formed so as to fill spaces formed after the retreat of the Al2O3 film under the silicon oxide film. Subsequently, a sidewall insulating film is formed by remaining portions of the later polysilicon film in the spaces by performing RIE, oxidation, or the like of the later polysilicon film.
    Type: Application
    Filed: February 2, 2004
    Publication date: November 4, 2004
    Inventors: Masaki Ishidao, Masahiro Kobayashi, Masatoshi Fukuda
  • Publication number: 20040153108
    Abstract: To provide a blood vessel knife with which a doctor is easily see a knife main body while holding it with his or her hand, and it becomes easier to prevent the cutter from penetrating the lower blood vessel wall 15b during heartbeats.
    Type: Application
    Filed: October 27, 2003
    Publication date: August 5, 2004
    Inventors: Masaaki Matsutani, Masatoshi Fukuda, Maeko Sasanuma
  • Publication number: 20030222303
    Abstract: A non-volatile semiconductor memory device comprise a source region 44 and a drain region 46 formed in a semiconductor substrate 30; a gate electrode 36 formed on the semiconductor substrate between the source region and the drain region with a first insulation film 32 formed between the gate electrode and the semiconductor substrate; and a charge accumulation region 42a, 42b of a dielectric material, which is formed on at least either of the side wall of the gate electrode on the side of the source region and the side wall of the gate electrode on the side of the drain region. Accordingly, charges accumulated on the side of the source region 44 and the charges accumulated on the side of the drain region 46 can be easily spatially isolated from each other.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 4, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Masatoshi Fukuda, Taro Sugizaki, Toshiro Nakanishi, Yasuo Nara
  • Publication number: 20030183946
    Abstract: Disclosed is a semiconductor device comprising a substrate, a first semiconductor chip having a thickness of 0.25 mm or less and mounted on the substrate through flip-chip connection with a gap of 0.055 mm or less, a conductive connector member connecting the chip to the substrate, and a molding resin layer covering the chip and formed of a cured resin comprising 75-92% by weight of an inorganic filler and 0.5-1.5% by weight of carbon black, a portion of the molding resin layer opposite to the substrate having a thickness of 0.15 mm or less, 99 wt % of the filler having longest diameter of 35 &mgr;m or less, the average longest diameter of the filler being 15 &mgr;m or less, and the content of fine filler having a longest diameter of 10 &mgr;m or less is within the range of 30-50% by weight based on the entire filler.
    Type: Application
    Filed: March 27, 2003
    Publication date: October 2, 2003
    Inventors: Masatoshi Fukuda, Kaoru Kawai
  • Publication number: 20030109124
    Abstract: Insulation films 45, 56 having a contact hole 58 are formed on a substrate. A dummy plug 62 is formed in the contact hole 58. Insulation films 64, 66 are formed on the insulation film 56. An opening 70 for exposing at least a part of the dummy plug 62 is formed in the insulation films 64, 66. The dummy plug 62 is selectively removed through the opening 70. A storage electrode 72 is formed in the contact hole 58 and the opening 70. The insulation film 66 is selectively removed. A dielectric film 74 and a plate electrode are formed on the storage electrode 72. Whereby, without an extra support for supporting the storage electrode 72, the storage electrode 72 is prevented form falling down or peeling off, and defective contact and breakage of the lower structure due to disalignment can be precluded.
    Type: Application
    Filed: January 15, 2003
    Publication date: June 12, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Shunji Nakamura, Masatoshi Fukuda
  • Patent number: 6568432
    Abstract: A stent manufactured for treating internal tubular organs, typically for treating a blood vessel, in which the stent has a sufficient diametral shrinkage ability and an ability for returning back to the original diameter thereof. A zigzag shape-memorized stent A is manufactured by performing shape memorization where a wire 1 is fixed in a zigzag bent manner in which the wire is made from a shape-memorizing Ni—Ti alloy not having been subject to shape-memorization of any sort. A stent A being shape-memorized with a zigzag shape as well as a cylindrical shape could be manufactured by performing shape-memorization process in which a stent having been shape-memorized into a zigzag shape with the end portions thereof being connected by overlapping with each other, is attached to a cylindrical jig.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: May 27, 2003
    Assignee: Mani, Inc.
    Inventors: Masaaki Matsutani, Masatoshi Fukuda, Shoichi Fukuda
  • Publication number: 20030075753
    Abstract: A stacked capacitor on a contact plug of a semiconductor substrate and the method for fabricating the same. A cylindrical conductive layer is formed upon a contact plug of a semiconductor substrate as a lower electrode of a stacked capacitor and there is an opening in the cylindrical conductive layer. A barrier layer is deposited inside the opening of the cylindrical conductive layer and fills a portion of the opening. A capacitor dielectric layer is deposited on the cylindrical conductive layer and on the barrier layer and an upper electrode layer is formed on the capacitor dielectric layer to complete the stacked capacitor.
    Type: Application
    Filed: September 13, 2002
    Publication date: April 24, 2003
    Inventors: Chung-Ming Chu, Masuhiro Kiyotoshi, Masatoshi Fukuda, Tosiya Suzuki, Min-Chieh Yang
  • Publication number: 20030068850
    Abstract: In a semiconductor device manufacturing method, at least a semiconductor element is arranged in a cavity of a resin molding die. A resin is supplied to a resin reservoir in direct contact with the cavity and is then injected in order to substantially fill the cavity. The resin filled in the cavity forms a resin seal for encapsulating the semiconductor element. The resin seal has a recess or a protrusion as a remainder of the resin reservoir.
    Type: Application
    Filed: November 6, 2002
    Publication date: April 10, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masatoshi Fukuda, Susumu Harada, Tetsuya Sato, Hidenobu Sato, Atsushi Nakano
  • Patent number: 6537874
    Abstract: Insulation films 45, 56 having a contact hole 58 are formed on a substrate. A dummy plug 62 is formed in the contact hole 58. Insulation films 64, 66 are formed on the insulation film 56. An opening 70 for exposing at least a part of the dummy plug 62 is formed in the insulation films 64, 66. The dummy plug 62 is selectively removed through the opening 70. A storage electrode 72 is formed in the contact hole 58 and the opening 70. The insulation film 66 is selectively removed. A dielectric film 74 and a plate electrode are formed on the storage electrode 72. Whereby, without an extra support for supporting the storage electrode 72, the storage electrode 72 is prevented form falling down or peeling off, and defective contact and breakage of the lower structure due to disalignment can be precluded.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: March 25, 2003
    Assignee: Fujitsu Limited
    Inventors: Shunji Nakamura, Masatoshi Fukuda