Patents by Inventor Masatoshi Fukuda

Masatoshi Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130134583
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.
    Type: Application
    Filed: May 22, 2012
    Publication date: May 30, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi TSUKIYAMA, Masatoshi Fukuda, Hiroshi Watabe, Keita Mizoguchi, Naoyuki Komuta
  • Patent number: 8445321
    Abstract: In one embodiment, a method of manufacturing a semiconductor device is disclosed. The method includes forming a cured film of an insulation resin on a surface of a first semiconductor chip and flip-chip bonding a second semiconductor via a bump on the first semiconductor chip on which the cured film of the insulation resin is formed. The insulation resin can be cured at temperature range from (A?50)° C. to (A+50)° C., wherein “A” is a solidification point of the bump.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: May 21, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masatoshi Fukuda
  • Publication number: 20130082331
    Abstract: A semiconductor device includes: a semiconductor substrate; a first transistor which is formed on the semiconductor substrate and includes a source/drain region and a gate electrode; an insulating film which covers the source/drain region and the gate electrode of the first transistor; and a first contact plug which is formed in the insulating film and is connected to the source/drain region or the gate electrode of the first transistor, wherein the first contact plug includes a first column section which extends in a thickness direction of the insulating film and is in contact with the source/drain region or the gate electrode of the first transistor, and a first flange section which juts out from an upper portion of the first column section in a direction parallel to a surface of the insulating film, and an upper surface of the first flange section is planarized.
    Type: Application
    Filed: August 17, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Masatoshi FUKUDA
  • Patent number: 8409271
    Abstract: A stent has a stent main wire. The strut is disposed adjacent to the stent main wire and a junction pipe disposed around the stent main wire and strut so as to affix the stent main wire to the strut. A locking part is formed at an end of the strut to prevent the strut from sliding out of the junction pipe. The locking part comprises a folded back portion, wherein a distal most end of the folded back portion abuts with a distal most end of the junction pipe, a swelling portion, wherein a distal most end of the swelling portion is abutting a distal most end of the junction pipe, or a bent portion, wherein a distal most end of the bent portion is abutting with a distal most end of the junction pipe.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: April 2, 2013
    Assignee: Mani, Inc.
    Inventors: Yasushi Hashimoto, Masaaki Matsutani, Masatoshi Fukuda
  • Patent number: 8409919
    Abstract: According to a manufacturing method of one embodiment, a first solder bump and a second solder bump are aligned and placed in contact with each other, and thereafter, the first and second solder bumps are heated to a temperature equal or higher than a melting point of the solder bumps and melted, whereby a partially connection body of the first solder bump and the second solder bump is formed. The partially connection body is cooled. The cooled partially connection body is heated to a temperature equal to or higher than the melting point of the solder bump in a reducing atmosphere, thereby to form a permanent connection body by melting the partially connection body while removing an oxide film existing on a surface of the partially connection body.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: April 2, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Aoki, Masatoshi Fukuda, Kanako Sawada, Yasuhiro Koshio
  • Publication number: 20120228762
    Abstract: A semiconductor device, includes: a wiring substrate, a stacked body mounted on the wiring substrate, an underfill layer filled into gaps between respective semiconductor chips of the stacked body; and a molding body made up of a molding resin covered and formed at outside of the stacked body and so on. The underfill layer is made up of a cured product of a resin material containing an amine-based curing agent, and the cured product has a Tg of 65° C. or more and 100° C. or less.
    Type: Application
    Filed: February 15, 2012
    Publication date: September 13, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi FUKUDA, Hiroshi WATABE
  • Publication number: 20120119326
    Abstract: A capacitor includes first electrode patterns and second electrode patterns disposed alternately on a plane, each of the first electrode patterns having a linear shape and extending in a first direction from a first end to a third end with a first length, each of the second electrodes having a linear shape and extending in said first direction from a second end to a fourth end with a second length shorter than the first length, a first wiring pattern supplying a first voltage to the first electrode patterns by first via-plugs, and a second wiring pattern supplying a second voltage to the second electrode patterns by second via-plugs, wherein the first end of the first electrode pattern extends beyond the second end of the second electrode pattern and the third end of the first electrode pattern extends beyond the fourth end of said the electrode.
    Type: Application
    Filed: August 11, 2011
    Publication date: May 17, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tsuyoshi Sugisaki, Masatoshi Fukuda
  • Publication number: 20120015687
    Abstract: According to an embodiment, a semiconductor package includes a semiconductor chip mounted on an interposer board, a encapsulant sealing the semiconductor chip, and a conductive shielding layer covering the encapsulant and at least part of a side surface of the interposer board. The interposer board has plural vias through an insulating substrate. A part of the plural vias has a cutting plane exposing to the side surface of the interposer board and cut in a thickness direction of the interposer board. The cutting plane of the via is electrically connected to the conductive shielding layer.
    Type: Application
    Filed: July 13, 2011
    Publication date: January 19, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiju YAMADA, Takashi Yamazaki, Masatoshi Fukuda, Yasuhiro Koshio
  • Publication number: 20120001324
    Abstract: In one embodiment, a semiconductor device includes a circuit substrate, and first and second semiconductor chips mounted on it. The first semiconductor chip and the second semiconductor chip are flip-chip connected, and an underfill resin is filled between them. The underfill resin has a fillet portion. A thickness T1 of the first semiconductor chip and a thickness T2 of the second semiconductor chip satisfy a relationship of T1/(T1+T2)?0.6.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 5, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideo AOKI, Hideko Mukaida, Masatoshi Fukuda, Yasuhiro Koshio, Hiroshi Watabe
  • Patent number: 8070795
    Abstract: A stent is provided, which joins a plurality of stent components via a strut which, even when repeatedly bent over a long period of time, resists breaking. In particular, a stent is provided having a joining portion which integrally joins a stent main wire and a strut, the stent main wire and the strut being fitted into a restraining pipe in a non-joining portion of the stent main wire and the strut near the end of the joining portion. This construction restrains the relative movement of the stent main wire to the strut 4 is restrained and decreased, thus reducing fatigue.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: December 6, 2011
    Assignee: Mani, Inc.
    Inventors: Yasushi Hashimoto, Masaaki Matsutani, Masatoshi Fukuda
  • Publication number: 20110230958
    Abstract: It is an object of the present invention to provide a stent including a plurality of loop stents connected with one another using a plurality of loop struts and adapted to bend uniformly as a whole. A stent 1 has a connection part in which wire parts including a stent main wire 2 and a strut 4 are connected to each other through a junction pipe 7, wherein the strut 4 is larger in diameter than the stent main wire 2.
    Type: Application
    Filed: May 31, 2011
    Publication date: September 22, 2011
    Applicant: MANI, INC.
    Inventors: Yasushi Hashimoto, Masaaki Matsutani, Masatoshi Fukuda
  • Publication number: 20110074018
    Abstract: In one embodiment, a method of manufacturing a semiconductor device is disclosed. The method includes forming a cured film of an insulation resin on a surface of a first semiconductor chip and flip-chip bonding a second semiconductor via a bump on the first semiconductor chip on which the cured film of the insulation resin is formed. The insulation resin can be cured at temperature range from (A?50)° C. to (A+50)° C., wherein “A” is a solidification point of the bump.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 31, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masatoshi Fukuda
  • Publication number: 20110076801
    Abstract: According to a manufacturing method of one embodiment, a first solder bump and a second solder bump are aligned and placed in contact with each other, and thereafter, the first and second solder bumps are heated to a temperature equal or higher than a melting point of the solder bumps and melted, whereby a partially connection body of the first solder bump and the second solder bump is formed. The partially connection body is cooled. The cooled partially connection body is heated to a temperature equal to or higher than the melting point of the solder bump in a reducing atmosphere, thereby to form a permanent connection body by melting the partially connection body while removing an oxide film existing on a surface of the partially connection body.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 31, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideo Aoki, Masatoshi Fukuda, Kanako Sawada, Yasuhiro Koshio
  • Patent number: 7883960
    Abstract: A method of manufacturing a semiconductor device includes forming a conductive layer over a semiconductor substrate, selectively removing the conductive layer for forming a resistance element and a gate electrode, forming sidewall spacers over sidewalls of the remaining conductive layer, forming a first insulating film containing a nitrogen over the semiconductor substrate having the sidewall spacers, implanting ions in the semiconductor substrate through the first insulating film, forming a second insulating film containing a nitrogen over the first insulating film after implanting ions in the semiconductor substrate through the first insulating film, and selectively removing the first and the second insulating film such that at least a part of the first and the second insulating films is remained over the semiconductor substrate and over the conductive layer.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: February 8, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masatoshi Fukuda, Akiyoshi Hatada, Katsuaki Ookoshi, Kenichi Okabe, Tomonari Yamamoto
  • Publication number: 20100280535
    Abstract: [Problems] To ensure the sharpness of a stripping knife whereby a part of a living tissue is incised and stripped while preventing a cut along the thickness direction. [Means for Solving Problems] A stripping knife (A) having a plate-shaped blade (3) having an edge (1) around the periphery, a shank (5) connected to the blade (3), and a handle (7) holding the shank (5) in the integrated state, wherein the blade (3) is composed of the edge (1) formed at the front end and a guide face (2) which is formed between the edge (1) and the front face (3b) of the connected plate constituting the blade (3) and brought into contact with the surface (13) of the remaining tissue.
    Type: Application
    Filed: April 25, 2008
    Publication date: November 4, 2010
    Applicant: MANI, INC.
    Inventors: Akio Yamaguchi, Masatoshi Fukuda, Masahiko Saito
  • Publication number: 20090326637
    Abstract: In a stent which joins a plurality of stent components by a strut, even when the repeated bending acts on the stent for a long period, the breaking of the strut can be prevented. In a stent 1 having a joining portion 7 which integrally joins a stent main wire 2 and a strut 4, the stent main wire 2 and the strut 4 are fitted into a restraining pipe 8 in a non-joining portion of the stent main wire 2 and the strut 4 near the end of the joining portion 7. The relative movement of the stent main wire 2 and the strut 4 is restrained. The amount of movement of the strut 4 relative to the stent main wire 2 can be decreased to reduce fatigue.
    Type: Application
    Filed: July 6, 2007
    Publication date: December 31, 2009
    Applicant: MANI, INC.
    Inventors: Yasushi Hashimoto, Masaaki Matsutani, Masatoshi Fukuda
  • Publication number: 20090326636
    Abstract: It is an object of the present invention to prevent a wire part including a stabilizer hook, a strut or the pulling-back member from separating from a connection part even when a force in a tensile direction is applied to a stent. A stent 1 having a connection part in which wire parts including a stent main wire 2, a strut 4 and a stabilizer hook 5 are connected to each other through a junction pipe 7, wherein a locking part which is locked to the junction pipe 7 is formed on the wire part which is inserted into the junction pipe 7.
    Type: Application
    Filed: July 6, 2007
    Publication date: December 31, 2009
    Applicant: MANI, Inc.
    Inventors: Yasushi Hashimoto, Masaaki Matsutani, Masatoshi Fukuda
  • Publication number: 20090311838
    Abstract: A method of manufacturing a semiconductor device includes forming a conductive layer over a semiconductor substrate, selectively removing the conductive layer for forming a resistance element and a gate electrode, forming sidewall spacers over sidewalls of the remaining conductive layer, forming a first insulating film containing a nitrogen over the semiconductor substrate having the sidewall spacers, implanting ions in the semiconductor substrate through the first insulating film, forming a second insulating film containing a nitrogen over the first insulating film after implanting ions in the semiconductor substrate through the first insulating film, and selectively removing the first and the second insulating film such that at least a part of the first and the second insulating films is remained over the semiconductor substrate and over the conductive layer.
    Type: Application
    Filed: March 24, 2009
    Publication date: December 17, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Masatoshi FUKUDA, Akiyoshi HATADA, Katsuaki OOKOSHI, Kenichi OKABE, Tomonari YAMAMOTO
  • Patent number: 7458494
    Abstract: A surgical stapler has a body capable of containing a plurality of staples in an aligned state; a ram provided inside the body, having a central concave portion and pressure armatures on both sides of the concave portion; an anvil that, when the armatures of the ram contact both sides of a crown of a staple, forces the center of the crown into the concave portion of the ram; and a trigger rotatably supported on the body so as to cause relative movement between the ram and the anvil. The trigger as a moving member and the body as another member strike each other so as to produce a sound and/or a vibration indicating that a staple sandwiched between the ram and the anvil is bent by the advance of the anvil into the concave portion of the ram and bending of the staple is completed.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: December 2, 2008
    Assignee: MANI, Inc.
    Inventors: Kanji Matsutani, Masatoshi Fukuda, Toshiharu Kamei, Takashi Ina
  • Patent number: 7264626
    Abstract: A blood vessel knife allows a doctor to easily see a knife main body when holding it for surgical operation. In a blood vessel knife having a cutter holder at a tip portion of a rod-shaped grip, and a knife main body attached to a tip of the cutter holder, at least one of a first bent portion 2a formed at an end of the grip 2 and a second bent portion 3a formed on the cutter holder 3 is provided; the cutter holder 3 can be detachably engaged with the tip portion from either an inside or outside thereof; and an angle between the grip 2 and the knife main body is changeable whether the cutter holder is engaged from the inside or the outside of the tip portion. When gripping the blood vessel knife 1, doctors can easily see the knife main body 4 due to the second bent portion 3a, and the knife main body 4 diagonally penetrates a blood vessel 15 to prevent the knife main body 4 from penetrating a lower blood vessel wall 15b.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: September 4, 2007
    Assignee: MANI, Inc.
    Inventors: Yoshihiko Mochizuki, Masaaki Matsutani, Masatoshi Fukuda, Maeko Sasanuma