Patents by Inventor Masaya Nagata

Masaya Nagata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10804312
    Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit 5 of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive 10 material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: October 13, 2020
    Assignee: Sony Corporation
    Inventors: Masaya Nagata, Kaori Takimoto
  • Publication number: 20200273897
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Application
    Filed: March 2, 2020
    Publication date: August 27, 2020
    Applicant: SONY CORPORATION
    Inventors: Atsushi YAMAMOTO, Shinji MIYAZAWA, Yutaka OOKA, Kensaku MAEDA, Yusuke MORIYA, Naoki OGAWA, Nobutoshi FUJII, Shunsuke FURUSE, Masaya NAGATA, Yuichi YAMAMOTO
  • Publication number: 20200258924
    Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.
    Type: Application
    Filed: October 16, 2018
    Publication date: August 13, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taizo TAKACHI, Yuichi YAMAMOTO, Suguru SAITO, Satoru WAKIYAMA, Yoichi OOTSUKA, Naoki KOMAI, Kaori TAKIMOTO, Tadashi IIJIMA, Masaki HANEDA, Masaya NAGATA
  • Publication number: 20200203408
    Abstract: The present technology relates to a solid-state imaging unit that makes it possible to increase the number of terminals, a method of producing the same, and an electronic apparatus. A solid-state imaging unit includes: an image sensor substrate including a light receiving region in which pixels that convert incoming light to an electric signal are arranged in a matrix; a solder ball; a glass substrate opposite the image sensor substrate and the solder ball; and a through electrode that couples a wiring line pattern and the solder ball to each other by penetrating a glass adhesive resin interposed between the wiring line pattern and the solder ball. The solder ball is disposed outside the image sensor substrate in a plane direction. The wiring line pattern being formed on the glass substrate. The present disclosure is applicable, for example, to a package and the like including the image sensor substrate.
    Type: Application
    Filed: August 8, 2018
    Publication date: June 25, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masaya NAGATA, Satoru WAKIYAMA
  • Patent number: 10608028
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: March 31, 2020
    Assignee: SONY CORPORATION
    Inventors: Atsushi Yamamoto, Shinji Miyazawa, Yutaka Ooka, Kensaku Maeda, Yusuke Moriya, Naoki Ogawa, Nobutoshi Fujii, Shunsuke Furuse, Masaya Nagata, Yuichi Yamamoto
  • Publication number: 20190341417
    Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.
    Type: Application
    Filed: July 19, 2019
    Publication date: November 7, 2019
    Applicant: Sony Corporation
    Inventors: Masaya NAGATA, Kaori TAKIMOTO
  • Patent number: 10408219
    Abstract: A fuel pump includes a pump cover at one end portion of the housing, a cover end at the other end portion of the housing, a bearing supported by the cover end and rotatably supporting an end portion of the shaft on the cover end-side. The cover end includes a base part that covers the other end portion, a discharge part that is connected to the base part, a bearing accommodating part which is formed such that a cross-section of the bearing accommodating part perpendicular to a rotation axis of the shaft has an annular shape and which includes an accommodating space accommodating the bearing, and a connection part that connects together the base part and the bearing accommodating part. A length of the connection part is shorter than a length of the base part and a length of the bearing accommodating part, in a direction of the rotation axis.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: September 10, 2019
    Assignee: DENSO CORPORATION
    Inventors: Hiromi Sakai, Kiyoshi Nagata, Masaya Ootake
  • Patent number: 10403669
    Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: September 3, 2019
    Assignee: Sony Corporation
    Inventors: Masaya Nagata, Kaori Takimoto
  • Publication number: 20190115414
    Abstract: [Object] To enable further reducing a chip area. [Solution] Provided is a display module including: a display device configured such that a pixel region in which a plurality of pixels for displaying an image are arranged is formed on an upper surface of a substrate, and a device-side signal electrode for exchanging a signal related to the pixels with an outside is disposed on a side surface of the substrate; and a module casing configured to store the display device and have a casing-side signal electrode electrically connected to the device-side signal electrode in a spot facing the device-side signal electrode.
    Type: Application
    Filed: April 14, 2017
    Publication date: April 18, 2019
    Inventors: Hiroshi Horikoshi, Masato Kawashima, Kaori Takimoto, Masaya Nagata
  • Publication number: 20180331142
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Application
    Filed: July 26, 2018
    Publication date: November 15, 2018
    Applicant: SONY CORPORATION
    Inventors: Atsushi YAMAMOTO, Shinji MIYAZAWA, Yutaka OOKA, Kensaku MAEDA, Yusuke MORIYA, Naoki OGAWA, Nobutoshi FUJII, Shunsuke FURUSE, Masaya NAGATA, Yuichi YAMAMOTO
  • Patent number: 10038021
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: July 31, 2018
    Assignee: Sony Corporation
    Inventors: Atsushi Yamamoto, Shinji Miyazawa, Yutaka Ooka, Kensaku Maeda, Yusuke Moriya, Naoki Ogawa, Nobutoshi Fujii, Shunsuke Furuse, Masaya Nagata, Yuichi Yamamoto
  • Publication number: 20180166491
    Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.
    Type: Application
    Filed: June 2, 2016
    Publication date: June 14, 2018
    Inventors: Masaya NAGATA, Kaori TAKIMOTO
  • Patent number: 9991301
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: June 5, 2018
    Assignee: Sony Corporation
    Inventors: Atsushi Yamamoto, Shinji Miyazawa, Yutaka Ooka, Kensaku Maeda, Yusuke Moriya, Naoki Ogawa, Nobutoshi Fujii, Shunsuke Furuse, Masaya Nagata, Yuichi Yamamoto
  • Publication number: 20180019277
    Abstract: An image pickup device and a method of the same are described herein. By way of first example, the image pickup device includes a seal member having a first surface, the first surface of the seal member including a concave portion, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member. By way of a second example, the image pickup device includes a seal member having a first surface, the first surface being a polished surface, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member.
    Type: Application
    Filed: September 27, 2017
    Publication date: January 18, 2018
    Inventors: MASAYA NAGATA, TAIZO TAKACHI
  • Patent number: 9780135
    Abstract: An image pickup device and a method of the same are described herein. By way of first example, the image pickup device includes a seal member having a first surface, the first surface of the seal member including a concave portion, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member. By way of a second example, the image pickup device includes a seal member having a first surface, the first surface being a polished surface, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: October 3, 2017
    Assignee: Sony Corporation
    Inventors: Masaya Nagata, Taizo Takachi
  • Publication number: 20170271389
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Application
    Filed: March 31, 2017
    Publication date: September 21, 2017
    Inventors: Atsushi YAMAMOTO, Shinji MIYAZAWA, Yutaka OOKA, Kensaku MAEDA, Yusuke MORIYA, Naoki OGAWA, Nobutoshi FUJII, Shunsuke FURUSE, Masaya NAGATA, Yuichi YAMAMOTO
  • Publication number: 20170263665
    Abstract: A semiconductor device includes a first semiconductor substrate in which a pixel region where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate in which a logic circuit processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate protecting an on-chip lens is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin interposed therebetween.
    Type: Application
    Filed: May 23, 2017
    Publication date: September 14, 2017
    Inventors: Naoki KOMAI, Naoto SASAKI, Naoki OGAWA, Takashi OINOUE, Hayato IWAMOTO, Yutaka OOKA, Masaya NAGATA
  • Publication number: 20170236860
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Application
    Filed: January 26, 2015
    Publication date: August 17, 2017
    Inventors: Atsushi YAMAMOTO, Shinji MIYAZAWA, Yutaka OOKA, Kensaku MAEDA, Yusuke MORIYA, Naoki OGAWA, Nobutoshi FUJII, Shunsuke FURUSE, Masaya NAGATA, Yuichi YAMAMOTO
  • Publication number: 20160284753
    Abstract: A semiconductor device includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions (51) performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween.
    Type: Application
    Filed: December 12, 2014
    Publication date: September 29, 2016
    Inventors: Naoki KOMAI, Naoto SASAKI, Naoki OGAWA, Takashi OINOUE, Hayato IWAMOTO, Yutaka OOKA, Masaya NAGATA
  • Patent number: RE47087
    Abstract: A semiconductor device is provided, including a semiconductor substrate that includes a semiconductor; an electrode layer formed above a first surface side inside the semiconductor substrate; a conductor layer formed above the electrode layer and above the first surface of the semiconductor substrate; a hole formed through the semiconductor substrate from a second surface of the semiconductor substrate to the conductor layer; and a wiring layer that is electrically connected to the electrode layer via the conductor layer at an end portion of the vertical hole, and that extends to the second surface of the semiconductor substrate, the wiring layer being physically separated from the electrode layer by an insulating layer disposed therebetween.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: October 16, 2018
    Assignee: Sony Corporation
    Inventor: Masaya Nagata