Patents by Inventor Masaya Nagata

Masaya Nagata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10038021
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: July 31, 2018
    Assignee: Sony Corporation
    Inventors: Atsushi Yamamoto, Shinji Miyazawa, Yutaka Ooka, Kensaku Maeda, Yusuke Moriya, Naoki Ogawa, Nobutoshi Fujii, Shunsuke Furuse, Masaya Nagata, Yuichi Yamamoto
  • Publication number: 20180166491
    Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.
    Type: Application
    Filed: June 2, 2016
    Publication date: June 14, 2018
    Inventors: Masaya NAGATA, Kaori TAKIMOTO
  • Patent number: 9991301
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: June 5, 2018
    Assignee: Sony Corporation
    Inventors: Atsushi Yamamoto, Shinji Miyazawa, Yutaka Ooka, Kensaku Maeda, Yusuke Moriya, Naoki Ogawa, Nobutoshi Fujii, Shunsuke Furuse, Masaya Nagata, Yuichi Yamamoto
  • Publication number: 20180019277
    Abstract: An image pickup device and a method of the same are described herein. By way of first example, the image pickup device includes a seal member having a first surface, the first surface of the seal member including a concave portion, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member. By way of a second example, the image pickup device includes a seal member having a first surface, the first surface being a polished surface, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member.
    Type: Application
    Filed: September 27, 2017
    Publication date: January 18, 2018
    Inventors: MASAYA NAGATA, TAIZO TAKACHI
  • Patent number: 9780135
    Abstract: An image pickup device and a method of the same are described herein. By way of first example, the image pickup device includes a seal member having a first surface, the first surface of the seal member including a concave portion, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member. By way of a second example, the image pickup device includes a seal member having a first surface, the first surface being a polished surface, and an optical device coupled to a second surface of the seal member, the second surface of the seal member being opposite from the first surface of the seal member.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: October 3, 2017
    Assignee: Sony Corporation
    Inventors: Masaya Nagata, Taizo Takachi
  • Publication number: 20170271389
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Application
    Filed: March 31, 2017
    Publication date: September 21, 2017
    Inventors: Atsushi YAMAMOTO, Shinji MIYAZAWA, Yutaka OOKA, Kensaku MAEDA, Yusuke MORIYA, Naoki OGAWA, Nobutoshi FUJII, Shunsuke FURUSE, Masaya NAGATA, Yuichi YAMAMOTO
  • Publication number: 20170263665
    Abstract: A semiconductor device includes a first semiconductor substrate in which a pixel region where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate in which a logic circuit processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate protecting an on-chip lens is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin interposed therebetween.
    Type: Application
    Filed: May 23, 2017
    Publication date: September 14, 2017
    Inventors: Naoki KOMAI, Naoto SASAKI, Naoki OGAWA, Takashi OINOUE, Hayato IWAMOTO, Yutaka OOKA, Masaya NAGATA
  • Publication number: 20170236860
    Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
    Type: Application
    Filed: January 26, 2015
    Publication date: August 17, 2017
    Inventors: Atsushi YAMAMOTO, Shinji MIYAZAWA, Yutaka OOKA, Kensaku MAEDA, Yusuke MORIYA, Naoki OGAWA, Nobutoshi FUJII, Shunsuke FURUSE, Masaya NAGATA, Yuichi YAMAMOTO
  • Publication number: 20160284753
    Abstract: A semiconductor device includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions (51) performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween.
    Type: Application
    Filed: December 12, 2014
    Publication date: September 29, 2016
    Inventors: Naoki KOMAI, Naoto SASAKI, Naoki OGAWA, Takashi OINOUE, Hayato IWAMOTO, Yutaka OOKA, Masaya NAGATA
  • Patent number: 9252084
    Abstract: A semiconductor device including: a base material portion that includes a semiconductor substrate and an insulating film that is formed on one face of the semiconductor substrate and on which a vertical hole is formed along the thickness direction of the semiconductor substrate; a vertical hole wiring portion that includes a vertical hole electrode formed on a side wall of the base material portion that forms the vertical hole; a metallic film that is formed within the insulating film and that is electrically connected to the vertical hole wiring portion; and a conductive protective film that is formed to be in contact with the metallic film within the insulating film and that is formed in a region that includes a contact region of a probe during a probe test that is performed in the middle of manufacture on a film face of the metallic film.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: February 2, 2016
    Assignee: SONY CORPORATION
    Inventor: Masaya Nagata
  • Publication number: 20150206826
    Abstract: A semiconductor device including: a base material portion that includes a semiconductor substrate and an insulating film that is formed on one face of the semiconductor substrate and on which a vertical hole is formed along the thickness direction of the semiconductor substrate; a vertical hole wiring portion that includes a vertical hole electrode formed on a side wall of the base material portion that forms the vertical hole; a metallic film that is formed within the insulating film and that is electrically connected to the vertical hole wiring portion; and a conductive protective film that is formed to be in contact with the metallic film within the insulating film and that is formed in a region that includes a contact region of a probe during a probe test that is performed in the middle of manufacture on a film face of the metallic film.
    Type: Application
    Filed: March 30, 2015
    Publication date: July 23, 2015
    Inventor: Masaya Nagata
  • Patent number: 9070643
    Abstract: A semiconductor device including: a base material portion that includes a semiconductor substrate and an insulating film that is formed on one face of the semiconductor substrate and on which a vertical hole is formed along the thickness direction of the semiconductor substrate; a vertical hole wiring portion that includes a vertical hole electrode formed on a side wall of the base material portion that forms the vertical hole; a metallic film that is formed within the insulating film and that is electrically connected to the vertical hole wiring portion; and a conductive protective film that is formed to be in contact with the metallic film within the insulating film and that is formed in a region that includes a contact region of a probe during a probe test that is performed in the middle of manufacture on a film face of the metallic film.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: June 30, 2015
    Assignee: SONY CORPORATION
    Inventor: Masaya Nagata
  • Patent number: 9018628
    Abstract: A semiconductor device including: a base material portion that includes a semiconductor substrate and an insulating film that is formed on one face of the semiconductor substrate and on which a vertical hole is formed along the thickness direction of the semiconductor substrate; a vertical hole wiring portion that includes a vertical hole electrode formed on a side wall of the base material portion that forms the vertical hole; a metallic film that is formed within the insulating film and that is electrically connected to the vertical hole wiring portion; and a conductive protective film that is formed to be in contact with the metallic film within the insulating film and that is formed in a region that includes a contact region of a probe during a probe test that is performed in the middle of manufacture on a film face of the metallic film.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: April 28, 2015
    Assignee: Sony Corporation
    Inventor: Masaya Nagata
  • Patent number: 8970012
    Abstract: A semiconductor device is provided, including a semiconductor substrate that includes a semiconductor; an electrode layer formed above a first surface side inside the semiconductor substrate; a conductor layer formed above the electrode layer and above the first surface of the semiconductor substrate; a hole formed through the semiconductor substrate from a second surface of the semiconductor substrate to the conductor layer; and a wiring layer that is electrically connected to the electrode layer via the conductor layer at an end portion of the vertical hole, and that extends to the second surface of the semiconductor substrate, the wiring layer being physically separated from the electrode layer by an insulating layer disposed therebetween.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: March 3, 2015
    Assignee: Sony Corporation
    Inventor: Masaya Nagata
  • Publication number: 20140232002
    Abstract: A semiconductor device is provided, including a semiconductor substrate that includes a semiconductor; an electrode layer formed above a first surface side inside the semiconductor substrate; a conductor layer formed above the electrode layer and above the first surface of the semiconductor substrate; a hole formed through the semiconductor substrate from a second surface of the semiconductor substrate to the conductor layer; and a wiring layer that is electrically connected to the electrode layer via the conductor layer at an end portion of the vertical hole, and that extends to the second surface of the semiconductor substrate, the wiring layer being physically separated from the electrode layer by an insulating layer disposed therebetween.
    Type: Application
    Filed: April 24, 2014
    Publication date: August 21, 2014
    Applicant: SONY CORPORATION
    Inventor: Masaya NAGATA
  • Publication number: 20140225111
    Abstract: A semiconductor device including: a base material portion that includes a semiconductor substrate and an insulating film that is formed on one face of the semiconductor substrate and on which a vertical hole is formed along the thickness direction of the semiconductor substrate; a vertical hole wiring portion that includes a vertical hole electrode formed on a side wall of the base material portion that forms the vertical hole; a metallic film that is formed within the insulating film and that is electrically connected to the vertical hole wiring portion; and a conductive protective film that is formed to be in contact with the metallic film within the insulating film and that is formed in a region that includes a contact region of a probe during a probe test that is performed in the middle of manufacture on a film face of the metallic film.
    Type: Application
    Filed: April 21, 2014
    Publication date: August 14, 2014
    Applicant: Sony Corporation
    Inventor: Masaya Nagata
  • Patent number: 8736027
    Abstract: A semiconductor device includes: a semiconductor substrate that includes a semiconductor; an electrode layer formed on a first surface side inside the semiconductor substrate; a frame layer laminated on the first surface of the semiconductor substrate; a conductor layer formed in an aperture portion formed by processing the semiconductor substrate and the frame layer in such a manner as to expose the electrode layer on the first surface of the semiconductor substrate; a vertical hole formed through the semiconductor substrate from a second surface of the semiconductor substrate to the conductor layer; and a wiring layer that is electrically connected to the electrode layer via the conductor layer at an end portion of the vertical hole, and that extends to the second surface of the semiconductor substrate.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: May 27, 2014
    Assignee: Sony Corporation
    Inventor: Masaya Nagata
  • Patent number: 8732038
    Abstract: According to a service management method to supply products-in-circulation to service receivers, a service management system is built that enables the service provider to manage whether the service receivers are using those products-in-circulation delivered from the service provider in an authorized manner. This provides a reasonable service whereby the service receiver is charged only for those products-in-circulation the service receiver has actually used. To this end, the service management device in accordance with the present invention includes: a memory section for registering data of products-in-circulation to be delivered to the service receivers; an input section for entering current status of the products-in-circulation; and an arithmetic processing section for calculating charges on the basis of the number of products-in-circulation that are regarded as having been actually used, not the total number of the delivered product-in-circulations.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 20, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masaya Nagata
  • Publication number: 20130311228
    Abstract: According to a service management method to supply products-in-circulation to service receivers, a service management system is built that enables the service provider to manage whether the service receivers are using those products-in-circulation delivered from the service provider in an authorized manner. This provides a reasonable service whereby the service receiver is charged only for those products-in-circulation the service receiver has actually used. To this end, the service management device in accordance with the present invention includes: a memory section for registering data of products-in-circulation to be delivered to the service receivers; an input section for entering current status of the products-in-circulation; and an arithmetic processing section for calculating charges on the basis of the number of products-in-circulation that are regarded as having been actually used, not the total number of the delivered product-in-circulations.
    Type: Application
    Filed: April 22, 2013
    Publication date: November 21, 2013
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Masaya Nagata
  • Patent number: 8410569
    Abstract: A solid-state imaging device includes a first substrate including a light-sensing portion configured to perform photoelectric conversion of incident light and a wiring portion provided on a light-incident side; an optically transparent second substrate provided on a wiring portion side of the first substrate at a certain distance; a through-hole provided in the first substrate; a through-via provided in the through-hole; a front-surface-side electrode connected to the through-via and provided on a front surface of the first substrate; a back-surface-side electrode connected to the through-via and provided on a back surface of the first substrate; and a stopper electrode provided on the front-surface-side electrode and filling a space between the front-surface-side electrode and the second substrate.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: April 2, 2013
    Assignee: Sony Corporation
    Inventors: Ikuo Yoshihara, Masaya Nagata, Naoto Sasaki, Taku Umebayashi, Hiroshi Takahashi, Yoichi Otsuka, Isaya Kitamura, Tokihisa Kaneguchi, Keishi Inoue, Toshihiko Hayashi, Hiroyasu Matsugai, Mayoshi Aonuma, Hiroshi Yoshioka