Abstract: The liquid-repellent structure comprises a major surface to which liquid repellency is imparted, and a liquid-repellent layer formed on the major surface; wherein the liquid-repellent layer contains a scale-like filler having an average particle size of 0.1 to 6 ?m, inclusive, a thermoplastic resin, and a fluorine compound, and has aggregates containing the scale-like filler; and the ratio WS1/(WP+WFC) of the mass WS1 of the scale-like filler contained in the liquid-repellent layer to the sum (WP+WFC) of the mass WP of the thermoplastic resin and the mass WFC of the fluorine compound contained in the liquid-repellent layer is 0.1 to 10 inclusive.

Abstract: An interface circuit includes: a plurality of signal transmitter circuits each receiving an input signal and outputting an output signal responsive to a first power supply voltage based on the input signal; an operation control circuit controlling operation/suspension of the signal transmitter circuits; and an amplitude control circuit exerting control so that the first power supply voltage be greater with increase in the number of operating circuits among the signal transmitter circuits and thereby the amplitude of the output signals of the signal transmitter circuits become greater.

Abstract: There is provided a fastening tape. A plurality of fastening cells on a surface of an elongated substrate. Each of at least some of the fastening cells includes: a fastening element array; one or more barriers at least partially surrounding the fastening element array; at least one slit provided in an upper portion of at least one of the one or more barriers; and a fastening element at least partially filling the slit. At least some of the fastening cells which are adjacent to each other in a longitudinal direction are separated from each other by an open space extending across the substrate in a lateral direction. The fastening element extends inward of the respective fastening cells in a direction away from a respective one of the open spaces.

Abstract: There is provided a fastening tape. A plurality of fastening cells on a surface of an elongated substrate. Each of at least some of the fastening cells includes: a fastening element array; one or more barriers at least partially surrounding the fastening element array; at least one slit provided in an upper portion of at least one of the one or more barriers; and a fastening element at least partially filling the slit. At least some of the fastening cells which are adjacent to each other in a longitudinal direction are separated from each other by an open space extending across the substrate in a lateral direction. The fastening element extends inward of the respective fastening cells in a direction away from a respective one of the open spaces.

Abstract: An image display unit with screen input function is provided, by which it is possible to input image data directly to a screen without decreasing numerical aperture of pixel. The image display unit comprises a light detecting TFT 61 receiving a light entering from a screen of a liquid crystal display panel, said light detecting TFT 61 is connected in series to a switching TFT 60, which does not receive a light entering from the screen of the liquid crystal display panel. To a source electrode of the light detecting TFT 61, a storage capacitor Cst and a pixel electrode of a liquid crystal element are connected. The liquid crystal element is represented by a capacitor CLC. A sensor control line 140 is connected to the gate electrode of the light detecting TFT 61, and a gate line 120 is connected to the gate electrode of the switching TFT 60. A data line 110 is connected to the drain electrode of the switching TFT 60, and a storage line 150 is connected to one end of a storage capacitor Cst.

Abstract: An electrostatic capacitance type touch panel includes: a substrate; a plurality of first electrodes disposed in parallel on the substrate; an insulating film formed so as to cover the plurality of first electrodes; a plurality of second electrodes disposed in parallel to intersect the plurality of first electrodes on the insulating film; a plurality of first drawing wiring lines connected to the plurality of first electrodes to be drawn to a connection terminal; and a plurality of second drawing wiring lines connected to the plurality of second electrodes to be drawn to the connection terminal. The plurality of first drawing wiring lines have different lengths, larger widths as the lengths are shorter, and larger intervals between adjacent two of the plurality of first drawing wiring lines as the lengths are longer.

Abstract: An image display apparatus with image entry function capable of high-speed and high-accuracy direct screen entry without increasing the peripheral circuit scale or the number of circuit elements for each pixel that lower the pixel aperture ratio. A first pixel circuit and a second pixel circuit are alternately arrayed horizontally. First and second data lines are connected to a data driver and a sensor signal processor circuit. Selector switches are connected to the input terminal of the data driver. Gray scale voltages are sent from the data driver to the first and second data lines, and first and second photo sensor signals are sent to the sensor signal processor circuit.

Abstract: According to the present invention, a highly sensitive photo-sensing element and a sensor driver circuit are prepared by planer process on an insulating substrate by using only polycrystalline material. Both the photo-sensing element and the sensor driver circuit are made of polycrystalline silicon film. As the photo-sensing element, a photo transistor is formed by using TFT, which comprises a first electrode 11 prepared on an insulating substrate 10, a photoelectric conversion region 14 and a second electrode 12, and a third electrode 13 disposed above the photoelectric conversion region 14. An impurity layer positioned closer to an intrinsic layer (density of active impurities is 1017 cm?3 or lower) is provided on the regions 15 and 16 on both sides under the third electrode 13 or on one of the regions 15 or 16 on one side.

Abstract: A PLL circuit includes: a frequency division section; a phase detector configured to detect the phase difference between a reference clock signal and an output signal of the frequency division section; a loop filter configured to filter an output signal of the phase detector and output the result as a digital value; a selector configured to select either the digital value or a fixed value; a digitally controlled oscillator configured to oscillate at a frequency corresponding to the value selected by the selector; and a control section configured to instruct the selector to select the fixed value until receiving a start signal, and after receiving the start signal, instruct the selector to select the digital value, and the frequency division section to start output, at timing of an edge of the reference clock signal.

Abstract: According to the present invention, a highly sensitive photo-sensing element and a sensor driver circuit are prepared by planer process on an insulating substrate by using only polycrystalline material. Both the photo-sensing element and the sensor driver circuit are made of polycrystalline silicon film. As the photo-sensing element, a photo transistor is formed by using TFT, which comprises a first electrode 11 prepared on an insulating substrate 10, a photoelectric conversion region 14 and a second electrode 12, and a third electrode 13 disposed above the photoelectric conversion region 14. An impurity layer positioned closer to an intrinsic layer (density of active impurities is 1017 cm?3 or lower) is provided on the regions 15 and 16 on both sides under the third electrode 13 or on one of the regions 15 or 16 on one side.

Abstract: In a phase adjustment circuit that divides the frequency of a double-frequency clock to obtain a 50% duty-cycle clock, a first ½ frequency division circuit having a phase inversion function generates an intermediate reference clock apart in phase from both a phase reference clock and a phase-adjusted clock. A first phase control circuit controls the phase of the intermediate reference clock to be in a desired phase state with respect to the phase reference clock. A second phase control circuit controls the phase of the phase-adjusted clock to be in a desired phase state with respect to the intermediate reference clock. Thus, when the phase-adjusted clock is adjusted to be close in phase to the phase reference clock, the phase difference between these clocks can be determined correctly and stably even if it varies due to clock jitter.

Abstract: A detection resolution is improved in a display device that employs an electrostatic capacity coupling type touch panel provided with a transparent conductive film serving as a detection film. A plurality of electrode terminals (102) is provided such that at least three electrode terminals (102) are aligned in each side of a detection transparent conductive film (101). A touch panel control circuit is provided for selecting one of two to four numbers of electrode terminals from among the plurality of electrode terminals (102) of the detection transparent conductive film (101), applying an AC signal provided from a signal source (105) through a current detection resistor (r) (103), and then detecting a current that flows through each of the selected electrode terminals.

Abstract: The screen-input image display device has a touch panel for outputting touched locations of a finger or the like in contact with a display panel screen; and a sensing circuit for sensing coordinates of the touched locations based on the output of the touch panel. The touch panel has a transparent conductor film which is single layer on a transparent substrate, the transparent conductor film being patterned into numerous electrode pads arranged in rows and columns of a two-dimensional matrix, and surface areas of the electrode pads vary depending on the location of the touch areas. Coordinates of the touch locations are sensed based on the proportion of charge signals of the touch locations due to differences in surface areas of the electrode pads.

Abstract: In a phase adjustment circuit that divides the frequency of a double-frequency clock to obtain a 50% duty-cycle clock, a first 1/2 frequency division circuit having a phase inversion function generates an intermediate reference clock apart in phase from both a phase reference clock and a phase-adjusted clock. A first phase control circuit controls the phase of the intermediate reference clock to be in a desired phase state with respect to the phase reference clock. A second phase control circuit controls the phase of the phase-adjusted clock to be in a desired phase state with respect to the intermediate reference clock. Thus, when the phase-adjusted clock is adjusted to be close in phase to the phase reference clock, the phase difference between these clocks can be determined correctly and stably even if it varies due to clock jitter.

Abstract: Provided is a semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation thereof. The semiconductor integrated circuit apparatus includes: an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.

Abstract: A clock signal amplifier circuit includes: an inverter; a coupling capacitor connected to the input of the inverter; two resistors connected in series between the power supply potential and the ground potential, a connection node of the two resistors being connected to the input of the inverter; a feedback resistor provided between the input and output of the inverter; and two switches configured to perform a same open/close operation according to a control signal, the two switches being provided on any two of a supply path of the power supply potential to the inverter, a supply path of the ground potential to the inverter, and a feedback path of the inverter via the feedback resistor.

Abstract: A current mirror circuit 10 is formed to have a current ratio (a transistor size ratio) of 1:m. As well, respective pairs of nMOS transistors MN1, MN3 and nMOS transistors MN2, MN4 are formed to have a current ratio of 1:m. Two currents output from the current mirror circuit 10 are each distributed to two. The distributed currents flowing in the nMOS transistors MN2, MN4 are added and are then allowed to flow into one resistor R2. Hence, for the resistor R2, only one resistor in which current of double flows suffices when m=1, for example. This effortlessly reduces the necessary resistance to one fourth.

Abstract: In a PLL circuit, a voltage controlled oscillator 4 has two voltage-current conversion circuits 40 and 41 and a selection circuit 42 for selecting an output of either one of the voltage-current conversion circuits 40 and 41. The output of the voltage-current conversion circuit selected by the selection circuit 42 is inputted to a current controlled oscillator 45. The one voltage-current conversion circuit 41 has an input thereof connected to an output of a loop filter 3, while the other voltage-current conversion circuit 40 has an input thereof connected to an input terminal 8 for evaluating the oscillation characteristics of the voltage controlled oscillator 4.

Abstract: In a PLL which does not include a loop filter, an additional circuit for subjecting a voltage-controlled oscillator to a burn-in test with an appropriate oscillation frequency is realized by a less circuit configuration. A gate terminal of a diode-connected transistor (13) which has the same polarity as a voltage-to-current conversion transistor (11) in a voltage-controlled oscillator (10) is connected to a gate terminal of the transistor (11) through a switch (12a), and a current supply (14) is connected to a drain terminal of the transistor (13). By appropriately controlling the current value supplied from the current supply (14) and the size ratio between the transistor (11) and the transistor (13), a current required for performing a burn-in test can be supplied to a ring oscillator in the voltage-controlled oscillator (10).

Abstract: Provided is a semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation thereof. The semiconductor integrated circuit apparatus includes: an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.