Patents by Inventor Masayoshi Kinoshita

Masayoshi Kinoshita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7675348
    Abstract: Provided is a semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation thereof. The semiconductor integrated circuit apparatus includes: an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: March 9, 2010
    Assignee: Panasonic Corporation
    Inventors: Masaya Sumita, Shirou Sakiyama, Masayoshi Kinoshita
  • Publication number: 20090295489
    Abstract: In a PLL circuit, a voltage controlled oscillator 4 has two voltage-current conversion circuits 40 and 41 and a selection circuit 42 for selecting an output of either one of the voltage-current conversion circuits 40 and 41. The output of the voltage-current conversion circuit selected by the selection circuit 42 is inputted to a current controlled oscillator 45. The one voltage-current conversion circuit 41 has an input thereof connected to an output of a loop filter 3, while the other voltage-current conversion circuit 40 has an input thereof connected to an input terminal 8 for evaluating the oscillation characteristics of the voltage controlled oscillator 4.
    Type: Application
    Filed: March 29, 2007
    Publication date: December 3, 2009
    Inventors: Kazuaki Sogawa, Masayoshi Kinoshita, Yuji Yamada, Junji Nakatsuka
  • Publication number: 20090262095
    Abstract: An electrostatic capacitance type touch panel includes: a substrate; a plurality of first electrodes disposed in parallel on the substrate; an insulating film formed so as to cover the plurality of first electrodes; a plurality of second electrodes disposed in parallel to intersect the plurality of first electrodes on the insulating film; a plurality of first drawing wiring lines connected to the plurality of first electrodes to be drawn to a connection terminal; and a plurality of second drawing wiring lines connected to the plurality of second electrodes to be drawn to the connection terminal. The plurality of first drawing wiring lines have different lengths, larger widths as the lengths are shorter, and larger intervals between adjacent two of the plurality of first drawing wiring lines as the lengths are longer.
    Type: Application
    Filed: April 15, 2009
    Publication date: October 22, 2009
    Inventors: Masayoshi KINOSHITA, Norio Mamba, Mutsuko Hatano
  • Publication number: 20090128518
    Abstract: The screen-input image display device has a touch panel for outputting touched locations of a finger or the like in contact with a display panel screen; and a sensing circuit for sensing coordinates of the touched locations based on the output of the touch panel. The touch panel has a transparent conductor film which is single layer on a transparent substrate, the transparent conductor film being patterned into numerous electrode pads arranged in rows and columns of a two-dimensional matrix, and surface areas of the electrode pads vary depending on the location of the touch areas. Coordinates of the touch locations are sensed based on the proportion of charge signals of the touch locations due to differences in surface areas of the electrode pads.
    Type: Application
    Filed: November 12, 2008
    Publication date: May 21, 2009
    Inventors: Masayoshi Kinoshita, Takeshi Sato
  • Publication number: 20090115742
    Abstract: A detection resolution is improved in a display device that employs an electrostatic capacity coupling type touch panel provided with a transparent conductive film serving as a detection film. A plurality of electrode terminals (102) is provided such that at least three electrode terminals (102) are aligned in each side of a detection transparent conductive film (101). A touch panel control circuit is provided for selecting one of two to four numbers of electrode terminals from among the plurality of electrode terminals (102) of the detection transparent conductive film (101), applying an AC signal provided from a signal source (105) through a current detection resistor (r) (103), and then detecting a current that flows through each of the selected electrode terminals.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 7, 2009
    Inventors: Norio MAMBA, Tsutomu Furuhashi, Toshiyuki Kumagai, Masayoshi Kinoshita
  • Publication number: 20090115502
    Abstract: A current mirror circuit 10 is formed to have a current ratio (a transistor size ratio) of 1:m. As well, respective pairs of nMOS transistors MN1, MN3 and nMOS transistors MN2, MN4 are formed to have a current ratio of 1:m. Two currents output from the current mirror circuit 10 are each distributed to two. The distributed currents flowing in the nMOS transistors MN2, MN4 are added and are then allowed to flow into one resistor R2. Hence, for the resistor R2, only one resistor in which current of double flows suffices when m=1, for example. This effortlessly reduces the necessary resistance to one fourth.
    Type: Application
    Filed: September 4, 2007
    Publication date: May 7, 2009
    Inventors: Shiro Sakiyama, Akinori Matsumoto, Takashi Morie, Masayoshi Kinoshita
  • Publication number: 20090102809
    Abstract: In a touch panel capable of detecting the coordinates of two pressed-down points individually at the same time, the coordinates detected while one point is pressed are stored and, if a second point is subsequently pressed, the stored coordinates of a first point are used to identify the coordinates closer to the stored coordinates as the first point and the coordinates of another detected point as the second point, thereby identifying an order in which the two points are pressed. Thereafter, what mouse operation has been executed at the coordinates of the first point is detected based on a positional relation between the coordinates of the first point and the coordinates of the second point, and a result of the detection is output to an application operable through a graphical user interface.
    Type: Application
    Filed: October 20, 2008
    Publication date: April 23, 2009
    Inventors: Norio MAMBA, Toshiyuki Kumagai, Tsutomu Furuhashi, Masayoshi Kinoshita
  • Patent number: 7508251
    Abstract: Providing semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation. The semiconductor integrated circuit apparatus includes: an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: March 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaya Sumita, Shirou Sakiyama, Masayoshi Kinoshita
  • Patent number: 7498865
    Abstract: In a semiconductor integrated circuit of the present invention, the main circuit 2 includes MOS transistors in which the source and the substrate are separated from each other. The substrate potential control circuit 1 controls the substrate potential of the MOS transistors of the main circuit 2 so that the actual saturation current value of the MOS transistors of the main circuit 2 is equal to the target saturation current value Ids under the operating power supply voltage Vdd of the main circuit 2. Therefore, it is possible to suppress variations in the operation speed even if the operating power supply voltage of the semiconductor integrated circuit is reduced.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: March 3, 2009
    Assignee: Panasonic Corporation
    Inventors: Shiro Sakiyama, Masayoshi Kinoshita, Masaya Sumita
  • Patent number: 7495504
    Abstract: In a reference voltage generation circuit, a bandgap reference circuit (BGR circuit) 1 includes diode element D1 and D2 having different current densities, three resistive elements R1, R2 and R3, a P-type first transistor Tr1 for supplying a current to a reference voltage output terminal O, a P-type second transistor Tr2 for determining a drain current flowing through the first transistor Tr1 by a current mirror structure, and a feedback type control circuit 11. The BGR circuit 1 is connected to a pull-down circuit 2. The pull-down circuit 2 includes a resistive element R4 and a P-type transistor Tr4 which are connected in series. The resistive element R4 is connected to a drain terminal of the second P-type transistor Tr2. The P-type transistor Tr4 has a gate terminal connected to the reference voltage output terminal O and a grounded drain terminal.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: February 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Masayoshi Kinoshita, Shiro Sakiyama
  • Publication number: 20090002338
    Abstract: In an image display device incorporating a touch sensor capable of detecting coordinates with simple structure and high precision, a transparent conductive film on a substrate SUB forming a display screen of the image display device is patterned to form detection electrodes taking the shape of a plurality of pad electrodes SSP arranged in a two-dimensional matrix form of rows (X direction) and columns (Y direction). Row connection electrodes LNL and column connection electrodes LNC connecting the detection electrodes in rows and columns of the two-dimensional matrix to each other are formed of the same transparent conductive film as the pad electrodes. By arranging the pad electrodes in the matrix form, the contact area of a finger or the like touching the screen can be made large, resulting in improved detection precision (resolution). The pad electrodes are connected at four corners to coordinate detection terminals PDT1 to PDT4.
    Type: Application
    Filed: May 30, 2008
    Publication date: January 1, 2009
    Inventors: Masayoshi Kinoshita, Norio Mamba
  • Publication number: 20080303022
    Abstract: A highly sensitive optical sensor element, and a switch element such as a sensor driver circuit are formed on the same insulating substrate by using an LTPS planar process to provide a low cost area sensor (optical sensor device) incorporating the sensor driver circuit and the like or an image display device incorporating the optical sensor element. As an optical sensor element structure, one electrode of the sensor element is manufactured with the same film of the polycrystalline silicon film that is an active layer of the switch element constituting a circuit. A photoelectric conversion unit for performing photoelectric conversion is made of an amorphous silicon or a polycrystalline silicon film of an intrinsic layer. A structure in which the amorphous silicon of the photoelectric conversion unit and the insulating layer are sandwiched between two electrodes of the sensor element is adopted.
    Type: Application
    Filed: February 25, 2008
    Publication date: December 11, 2008
    Inventors: Mitsuharu Tai, Masayoshi Kinoshita
  • Patent number: 7429887
    Abstract: Providing semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation. The semiconductor integrated circuit apparatus includes: an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: September 30, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaya Sumita, Shirou Sakiyama, Masayoshi Kinoshita
  • Publication number: 20080198140
    Abstract: An image display apparatus with image entry function of high accuracy enabling high-speed direct screen input without decreasing a pixel aperture ratio. Data lines of thin-film transistors which do not receive light and storage lines are connected to respective selector switches. The selector switches are turned on and off by a switching signal supplied through a switching line from a control circuit. The conveyance of a drive signal and a video signal supplied from a gate line driving circuit and a data line driving circuit and the conveyance of a light signal to an X address detection circuit and a Y address detection circuit are switched by turning on and off the selector switches.
    Type: Application
    Filed: December 14, 2007
    Publication date: August 21, 2008
    Inventors: Masayoshi Kinoshita, Hiroshi Kageyama
  • Publication number: 20080198143
    Abstract: An image display apparatus with image entry function capable of high-speed and high-accuracy direct screen entry without increasing the peripheral circuit scale or the number of circuit elements for each pixel that lower the pixel aperture ratio. A first pixel circuit and a second pixel circuit are alternately arrayed horizontally. First and second data lines are connected to a data driver and a sensor signal processor circuit. Selector switches are connected to the input terminal of the data driver. Gray scale voltages are sent from the data driver to the first and second data lines, and first and second photo sensor signals are sent to the sensor signal processor circuit.
    Type: Application
    Filed: December 18, 2007
    Publication date: August 21, 2008
    Inventors: Masayoshi Kinoshita, Hiroshi Kageyama
  • Publication number: 20080142920
    Abstract: According to the present invention, a highly sensitive photo-sensing element and a sensor driver circuit are prepared by planer process on an insulating substrate by using only polycrystalline material. Both the photo-sensing element and the sensor driver circuit are made of polycrystalline silicon film. As the photo-sensing element, a photo transistor is formed by using TFT, which comprises a first electrode 11 prepared on an insulating substrate 10, a photoelectric conversion region 14 and a second electrode 12, and a third electrode 13 disposed above the photoelectric conversion region 14. An impurity layer positioned closer to an intrinsic layer (density of active impurities is 1017 cm?3 or lower) is provided on the regions 15 and 16 on both sides under the third electrode 13 or on one of the regions 15 or 16 on one side.
    Type: Application
    Filed: December 14, 2007
    Publication date: June 19, 2008
    Inventors: Mitsuharu Tai, Hideo Sato, Mutsuko Hatano, Masayoshi Kinoshita
  • Publication number: 20080122804
    Abstract: An image display unit with screen input function is provided, by which it is possible to input image data directly to a screen without decreasing numerical aperture of pixel. The image display unit comprises a light detecting TFT 61 receiving a light entering from a screen of a liquid crystal display panel, said light detecting TFT 61 is connected in series to a switching TFT 60, which does not receive a light entering from the screen of the liquid crystal display panel. To a source electrode of the light detecting TFT 61, a storage capacitor Cst and a pixel electrode of a liquid crystal element are connected. The liquid crystal element is represented by a capacitor CLC. A sensor control line 140 is connected to the gate electrode of the light detecting TFT 61, and a gate line 120 is connected to the gate electrode of the switching TFT 60. A data line 110 is connected to the drain electrode of the switching TFT 60, and a storage line 150 is connected to one end of a storage capacitor Cst.
    Type: Application
    Filed: November 3, 2007
    Publication date: May 29, 2008
    Inventors: Masayoshi KINOSHITA, Hiroshi Kageyama
  • Patent number: 7365590
    Abstract: A semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so hat the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation. The semiconductor integrated circuit apparatus includes an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: April 29, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaya Sumita, Shirou Sakiyama, Masayoshi Kinoshita
  • Publication number: 20080088357
    Abstract: Providing semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation. The semiconductor integrated circuit apparatus includes: an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.
    Type: Application
    Filed: December 4, 2007
    Publication date: April 17, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masaya Sumita, Shirou Sakiyama, Masayoshi Kinoshita
  • Patent number: 7358793
    Abstract: Providing semiconductor integrated circuit apparatus capable of controlling the substrate voltage of a MOSFET so that the drain current for an arbitrary gate voltage value in a subthreshold region or a saturated region will be free from temperature dependence and process variation dependence, thereby enhancing the stable operation. The semiconductor integrated circuit apparatus includes: an integrated circuit main body having a plurality of MOSFETs on a semiconductor substrate; a monitor unit for monitoring at least one of the drain currents of the plurality of MOSFETs; and a substrate voltage regulating unit for controlling the substrate voltage of the semiconductor substrate so as to keep constant the drain current.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: April 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaya Sumita, Shirou Sakiyama, Masayoshi Kinoshita