Abstract: A lead-free solder alloy comprises 1.0-5.0 wt % Ag, 0.01-0.5 wt % Ni, one or both of (a) 0.001-0.05 wt % Co and (b) at least one of P, Ge, and Ga in a total amount of 0.001-0.05 wt %, and a remainder of Sn. The solder can form solder bumps which have a high bonding strength and which do not undergo yellowing after soldering.

Abstract: A lead-free solder includes 0.05-5 mass % of Ag, 0.01-0.5 mass % of Cu, at least one of P, Ge, Ga, Al, and Si in a total amount of 0.001-0.05 mass %, and a remainder of Sn. One or more of a transition element for improving resistance to heat cycles, a melting point lowering element such as Bi, In, or Zn, and an element for improving impact resistance such as Sb may be added.

Abstract: A method of producing semiconductor devices including the steps of providing a semiconductor wafer of substantially uniform thickness 22, providing a heat-radiating plate 22, and attaching the heat-radiating plate 20 to the semiconductor wafer. The assembled wafer and heat-radiating plate are diced into individual semiconductor integrated circuits having individual heat radiating plates attached thereto.

Abstract: Apparatus and method for assembling a semiconductor device on a wiring substrate is disclosed, wherein Pb (lead) is not used and the chance of generation of defects is reduced. Semiconductor package (100) has solder balls (114) containing Sn (tin), Ag (silver) and Cu (copper). Wiring substrate 200 has connecting terminals 208 for connecting solder balls (114). The connecting terminals (208) have an Au (gold) layer (212) and a Ni layer (210). In the operation for assembling semiconductor package (100) onto wiring substrate (200), because solder balls (114) are heated and fixed on connecting terminals (208), Au in Au layer (212) diffuses into balls (114). Because Au is contained in solder balls (114), a high bonding strength is obtained, and the chance of generation of defects is reduced.

Abstract: The invention relates to an LOC type semiconductor device having improved heat radiation. The semiconductor device related to the present invention has a preferably metal heat-radiating element 7 that is in thermal contact with the surface opposite the principal surface of the semiconductor chip 3. One region of said heat-radiating element 7 is externally exposed from the package that encloses the semiconductor chip 3. The heat-radiating element 7 is in thermal contact with a metal pattern 12 that is formed on the substrate 10 on which the semiconductor device is mounted. The heat from the semiconductor chip is transferred to the mounting substrate 10 side via the heat-radiating plate 7, and heat dissipation is conducted efficiently.

Abstract: A method for attaching an integrated circuit chip to an organic substrate comprising the steps of providing an integrated circuit chip having an active and a passive surface, said active surface including a protective polymer layer; activating said polymer layer by exposing it to reactive ion etching plasma, thereby increasing the surface roughness and imparting affinity to adhesion; providing an electrically insulating substrate having first and second surfaces; and contacting said second surface of said substrate to said activated polymer layer on said chip, whereby strong adhesion is exerted at the interface between said layer and said substrate, directly attaching said substrate to said chip.

Abstract: Apparatus and method for assembling a semiconductor device on a wiring substrate is disclosed, wherein Pb (lead) is not used and the chance of generation of defects is reduced. Semiconductor package (100) has solder balls (114) containing Sn (tin), Ag (silver) and Cu (copper). Wiring substrate 200 has connecting terminals 208 for connecting solder balls (114). The connecting terminals (208) have an Au (gold) layer (212) and a Ni layer (210). In the operation for assembling semiconductor package (100) onto wiring substrate (200), because solder balls (114) are heated and fixed on connecting terminals (208), Au in Au layer (212) diffuses into balls (114). Because Au is contained in solder balls (114), a high bonding strength is obtained, and the chance of generation of defects is reduced.

Abstract: A method for attaching an integrated circuit chip to an organic substrate comprising the steps of providing an integrated circuit chip having an active and a passive surface, said active surface including a protective polymer layer; activating said polymer layer by exposing it to reactive ion etching plasma, thereby increasing the surface roughness and imparting affinity to adhesion; providing an electrically insulating substrate having first and second surfaces; and contacting said second surface of said substrate to said activated polymer layer on said chip, whereby strong adhesion is exerted at the interface between said layer and said substrate, directly attaching said substrate to said chip.

Abstract: A semiconductor device (100) has a semiconductor chip (102) mounted on a tape carrier (104). Tape carrier (104) of thickness t has a plurality of via holes (118) of inner diameter Dv penetrating the tape carrier (104). Solder balls (114) having outer diameter Db are attached through the via holes (118) to serve as external connection terminals for the semiconductor chip (102). Specific dimensional relationships are established among thickness t of tape carrier (104), inner diameter Dv of via holes (118) and outer diameter Db of solder balls (114) in order to improve connection reliability by reducing poor connections of solder balls (114).

Abstract: A semiconductor device comprising a semiconductor chip having an active and a passive surface, the passive surface adhesively attached to a substrate film by means of a multilayer composite; this composite comprising a metal foil having first and second surfaces and an adhesive layer attached on each of these surfaces. The multilayer composite has an average modulus larger than the modulus of the encapsulating molding compound used in the semiconductor device. By applying the composite to assembling face-up chip-scale devices, stress in solder joints is reduced and solder fatigue life enhanced.

Abstract: The invention is to improve the heat radiation of an LOC type semiconductor device. The semiconductor device related to the present invention has a preferably metal heat-radiating element 7 that is in thermal contact with the surface opposite the principal surface of the semiconductor chip 3. One region of said heat-radiating element 7 is externally exposed from the package that encloses the semiconductor chip 3. The above-mentioned heat-radiating element 7 is in thermal contact with a metal pattern 12 that is formed on the substrate 10 on which the semiconductor device is mounted. The heat from the semiconductor chip is transferred to the mounting substrate 10 side via the heat-radiating plate 7, and heat dissipation is conducted efficiently.

Abstract: A method for attaching an integrated circuit chip to an organic substrate comprising the steps of providing an integrated circuit chip having an active and a passive surface, said active surface including a protective polymer layer; activating said polymer layer by exposing it to reactive ion etching plasma, thereby increasing the surface roughness and imparting affinity to adhesion; providing an electrically insulating substrate having first and second surfaces; and contacting said second surface of said substrate to said activated polymer layer on said chip, whereby strong adhesion is exerted at the interface between said layer and said substrate, directly attaching said substrate to said chip.

Abstract: Disclosed is a process for preparing a semiconductor device comprising the steps of adhering a back surface of a wafer, a front surface of which has been formed a circuit, onto the radiation curable adhesive layer, dicing the wafer into chips, rinsing, drying, irradiating the adhesive layer with radiation to cure said adhesive layer, expanding the adhesive sheet if necessary to make the chips apart from each other, then picking up the chips, mounting the picked chips on a lead frame, bonding, and molding to give such a structure that the back surfaces of the chips are partially or wholly in contact with a package molding resin, wherein the radiation curable adhesive layer comprises 100 parts by weight of an acrylic adhesive composed of a copolymer of an acrylic ester and an OH group-containing polymerizable monomer and 50-200 parts by weight of a radiation polymerizable compound having two or more unsaturated bonds, and the radiation curable adhesive layer has an elastic modulus of not less than 1×109 d

Abstract: The purpose is to improve the assembly reliability of the BGA package. The present invention provides a type of BGA semiconductor device having plural conductor bumps arranged two-dimensionally on one surface of the insulating substrate. In this semiconductor device, there is adhesive layer (8) for attaching semiconductor chip (2) to said insulating substrate (3). According to the present invention, the outer edge of said adhesive layer (8) extends beyond the outer edge of said semiconductor chip (2).

Abstract: The objective of the invention is to reduce the thickness, to improve the heat-releasing property, and to increase the number of terminals that can be assembled, in particular, for the CSP-type semiconductor package. According to this invention, insulating substrate 3 having multiple conductor leads 7 is contained on the first surface. Semiconductor chip 1 equipped with multiple electrode pads 2, which has multiple electrode pads 2 on its principal surface 1, is carried on said insulating substrate 3 with its principal surface facing the aforementioned first surface. Insulating substrate 3 has openings 4 and 5 for exposing inner leads 7a of the conductor leads, as well as multiple electrode pads 2 on the second surface side. Inner leads 7a and electrode pads 2 are connected to each other through conductor leads 9 via said openings 4 and 5. Outer connecting terminals 11 are connected to outer leads 7b of the conductor leads.

Abstract: To provide a type of semiconductor device with high resistance to cracks and having fewer manufacturing steps. Semiconductor device 1 has a substrate having insulating base material 2 mainly made of a thermoplastic polyimide resin. When heated to a temperature above the glass transition temperature, the surface of insulating base material 2 made of thermoplastic polyimide resin melts and exhibits the properties of an adhesive. The adhesive layer is preferred for laminating the metal film for forming conductor pattern 3, and it is preferred for fixing semiconductor IC chip 4 to insulating base material 2 made of thermoplastic polyimide resin. When semiconductor IC chip 4 is fixed on insulating base material 2 made of thermoplastic polyimide resin, the two are brought into contact with each other under a prescribed pressure, and the atmospheric temperature is higher than the glass transition temperature for bonding.

Abstract: The wafer dicing/bonding sheet of the present invention comprises a soft film, a pressure sensitive adhesive layer formed on the soft film, a processing film for polyimide type resin composed of a heat resistant resin which has been formed on the pressure sensitive adhesive layer and a polyimide adhesive layer formed on the processing film. It is preferred that the processing film be a polyethylene naphthalate film whose surface has been subjected to an alkyd release treatment. The present invention facilitates expansion to be conducted after the wafer dicing.

Abstract: A semiconductor device having a photosensitive thermosetting resin layer 64 provided on top of a protective film 13 for a semiconductor chip 10. A lead frame 11 is affixed to the surface of this photosensitive thermosetting resin layer 64 only at support pin sections 60, 61, and this lead frame 11 is electrically connected to the surface of semiconductor chip 10. Breakage of the wiring and chip cracking are prevented after the pressure-bonding mounting of the lead frame. Because package cracking and package warping are better controlled in thermal processes such as such as IR reflow and resin sealing, a lower cost semiconductor device and manufacturing method are enabled.

Abstract: Our semiconductor device is an IC chip 10 whose back surface is affixed to a mounting section 81 by means of a thermoplastic adhesive (for example, thermoplastic polyimide) 84. Package cracks are eliminated or markedly reduced and the problems with productivity for mounting curing and mounting alleviated. Even when a padless special lead frame or one with a small die pad is used, package cracks are eliminated or markedly reduced, and the lead frame can be mounted easily and with good reliability on top of the lead frame.

Abstract: A process for manufacturing a wafer dicing/bonding sheet of the present invention comprises a soft film, a pressure sensitive adhesive layer formed on the soft film, a processing film for polyimide type resin composed of a heat resistant resin which has been formed on the pressure sensitive adhesive layer and a polyimide adhesive layer formed on the processing film. It is preferred that the processing film be a polyethylene naphthalate film whose surface has been subjected to an alkyd release treatment. The present invention facilitates expansion to be conducted after the wafer dicing.