Patents by Inventor Masazumi Amagai

Masazumi Amagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Packaged semiconductor device having stress absorbing film
    Patent number: 5466888
    Abstract: A packaged semiconductor device has a semiconductor chip and leads formed over the chip with an electrically insulating film interposed therebetween and a packaging material for sealing the chip and the inner lead portions of the leads. The electrically insulating film has such an area as to provide a peripheral portion not covered by parts of the inner lead portions of the leads for strengthening adherence of the electrically insulating film to the packaging material and to the chip. The electrically insulating film has a thickness substantially in a range from 80 .mu.m to 200 .mu.m for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature. A stress absorption film may be formed between the electrically insulating film and the semiconductor chip for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature.
    Type: Grant
    Filed: February 7, 1995
    Date of Patent: November 14, 1995
    Assignees: Hitachi, Ltd., Texas Instruments, Inc.
    Inventors: Lim T. Beng, Chai T. Chong, Masazumi Amagai, Ichiro Anjoh, Junichi Arita, Kunihiro Tsubosaki, Masahiro Ichitani, Darvin Edwards
  • Packaged semiconductor device having stress absorbing film
    Patent number: 5406028
    Abstract: A packaged semiconductor device has a semiconductor chip and leads formed over the chip with an electrically insulating film interposed therebetween and a packaging material for sealing the chip and the inner lead portions of the leads. The electrically insulating film has such an area as to provide a peripheral portion not covered by parts of the inner lead portions of the leads for strengthening adherence of the electrically insulating film to the packaging material and to the chip. The electrically insulating film has a thickness substantially in a range from 80 .mu.m to 200 .mu.m for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature. A stress absorption film may be formed between the electrically insulating film and the semiconductor chip for absorbing stress which may be produced in the packaged semiconductor device when subjected to variations of the ambient temperature.
    Type: Grant
    Filed: February 18, 1994
    Date of Patent: April 11, 1995
    Assignees: Hitachi, Ltd., Texas Instruments Incorporated
    Inventors: Lim T. Beng, Chai T. Chong, Masazumi Amagai, Ichiro Anjoh, Junichi Arita, Kunihiro Tsubosaki, Masahiro Ichitani, Darvin Edwards