Patents by Inventor Matthew J. Kalos

Matthew J. Kalos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210042230
    Abstract: Provided are a computer program product, system, and method for maintaining cache hit ratios for insertion points into a cache list to optimize memory allocation to a cache. A plurality of insertion points to a cache list for the cache each identify a track in the cache list. Insertion points to tracks in the cache list are used to determine locations in the cache list at which to indicate tracks in the cache in the cache list that are to be indicated at the MRU end of the cache list. Indication is made of cache hits for each of the insertion points used to indicate locations in the cache list for tracks accessed while indicated in the cache list. The cache hits indicated for the insertion points are to indicate whether to increase or decrease a size of the cache.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Inventors: Lokesh M. Gupta, Kyler A. Anderson, Kevin J. Ash, Matthew J. Kalos
  • Publication number: 20210042242
    Abstract: Provided are a computer program product, system, and method for using insertion points to determine locations in a cache list at which to move processed tracks. There are a plurality of insertion points to a cache list for the cache having a least recently used (LRU) end and a most recently used (MRU) end, wherein each insertion point of the insertion points identifies a track in the cache list. An insertion point of the insertion points is determined at which to move the processed track in response to determining that a processed track is indicated to move to the MRU end. The processed track is indicated at a position in the cache list with respect to the determined insertion point.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Inventors: Lokesh M. Gupta, Kyler A. Anderson, Kevin J. Ash, Matthew J. Kalos
  • Publication number: 20210042229
    Abstract: Provided are a computer program product, system, and method for adjusting a number of insertion points used to determine locations in a cache list at which to indicate tracks. Tracks added to the cache are indicated in a cache list. The cache list has a least recently used (LRU) end and a most recently used (MRU) end. In response to indicating in a cache list an insertion point interval number of tracks in the cache in a cache list, setting an insertion point to indicate one of the tracks of the insertion point interval number of tracks indicated in the cache list. Insertion points to tracks in the cache list are used to determine locations in the cache list at which to indicate tracks in the cache in the cache list.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Inventors: Lokesh M. Gupta, Kyler A. Anderson, Kevin J. Ash, Matthew J. Kalos
  • Patent number: 10901916
    Abstract: Provided are a computer program product, system, and method for managing adding of accessed tracks to a cache list based on accesses to different regions of the cache list. A cache has a least recently used (LRU) end and a most recently used (MRU) end. A determination is made of a high access region of tracks from the MRU end of the cache list based on a number of accesses to the tracks in the high access region. A flag is set for an accessed track, indicating to indicate the accessed track at the MRU end upon processing the accessed track at the LRU end, in response to the determining the accessed track is in the high access region. After the setting the flag, the accessed track remains at a current position in the cache list before being accessed.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Kyler A. Anderson, Kevin J. Ash, Matthew J. Kalos
  • Patent number: 10884872
    Abstract: One general aspect of device reservation state preservation in accordance with the present description, provides for an intermediate reservation state, referred to herein as a “peer” reservation state, which may be maintained by a storage controller in the event of a total loss of communication connectivity to the reserving host so long as a peer or partner storage controller of a mirror relationship still has communication connectivity to the host. The peer reservation state as used herein, is a reservation state intermediate between a full reservation state for a device, and a fully released state in which a reservation of the device has been completely released. Other features and aspects may be realized, depending upon the particular application.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: January 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Carol S. Mellgren, John G. Thompson
  • Patent number: 10866901
    Abstract: A method for invalidating a track of data on a storage drive in preparation to unpin the track is disclosed. In one embodiment, such a method includes invalidating certain metadata associated with a track of data residing on a storage drive of a storage system. The method further creates, in cache of the storage system, an invalid track image associated with the track. The method destages, from the cache, the invalid track image to the storage drive. Once the invalid track image is destaged, the method may unpin the track in cache, thereby enabling destages of the track from the cache to the storage drive going forward. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: June 2, 2018
    Date of Patent: December 15, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Kyler A. Anderson
  • Patent number: 10841395
    Abstract: Provided are a computer program product, system, and method for populating a secondary cache with unmodified tracks in a primary cache when redirecting host access from a primary server to a secondary server. Host access to tracks is redirected from the primary server to the secondary server. Prior to the redirecting, updates to tracks in the primary storage were replicated to the secondary server. After the redirecting host access to the secondary server, host access is directed to the secondary server and the secondary storage. A secondary cache at the secondary server is populated with unmodified tracks in a primary cache at the primary server when the host access was redirected to the secondary server to make available to the host access redirected to the secondary server.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: November 17, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi
  • Patent number: 10831665
    Abstract: A dual-server based storage system maintains a first cache and a first non-volatile storage (NVS) in a first server, and a second cache and a second NVS in a second server, where data in the first cache is also written in the second NVS and data in the second cache is also written in the first NVS. In response to a failure of the first server, a determination is made as to whether space exists in the second NVS to accommodate the data stored in the second cache. In response to determining that space exists in the second NVS to accommodate the data stored in the second cache, the data is transferred from the second cache to the second NVS.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Patent number: 10761744
    Abstract: Provided are techniques for synchronously performing commit records operations. A local copy of a commit records message is built for a Non-Volatile Storage (NVS) track, with a valid indicator set to indicate that this commit records message is valid and has not been processed yet. A Direct Memory Access (DMA) chain is executed to transfer customer data from a host to real segments and alternate segments of a track buffer and to transfer the local copy of the commit records message to a mail message structure of a mail message array. At DMA completion, an NVS manager is synchronously called to perform a commit records operation with the commit records message in the mail message structure. In response to the commit records operation completing, there is an indication that a new write DMA is allowed to proceed for the NVS track.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: September 1, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson, Louis A. Rasor
  • Patent number: 10732884
    Abstract: A computer-implemented method for implementing a RAID array, according to one approach, includes: predicting a compression ratio of data to be stored in the RAID array, and using the predicted compression ratio and a physical storage capacity of the RAID array to calculate a maximum virtual storage capacity of the RAID array. The maximum virtual storage capacity is used to establish an effective storage capacity of the RAID array. One or more instructions to store compressed data in the RAID array are also sent. In response to occurrence of a predetermined event, a current compression ratio of the compressed data stored in the RAID array and the physical storage capacity of the RAID array are used to calculate a current virtual storage capacity of the RAID array. Furthermore, the effective storage capacity of the RAID array is scaled based on the current virtual storage capacity.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: August 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Clint A. Hardy, Karl A. Nielsen, Brian A. Rinaldi, Matthew G. Borlick, Matthew J. Kalos
  • Publication number: 20200241787
    Abstract: A computer-implemented method according to one embodiment includes identifying a request to migrate data associated with a volume from a source storage pool having a first rank extent size to a destination storage pool having a second rank extent size smaller than the first rank extent size, creating a correspondence between logical volume extents of the volume and physical offset locations within rank extents of the source storage pool, and migrating data from one or more ranks of the source storage pool to one or more ranks of the destination storage pool, utilizing the correspondence between the logical volume extents of the volume and the physical offset locations within the rank extents of the source storage pool.
    Type: Application
    Filed: January 25, 2019
    Publication date: July 30, 2020
    Inventors: Hui Zhang, Clint A. Hardy, Karl A. Nielsen, Matthew J. Kalos, Qiang Xie
  • Publication number: 20200226041
    Abstract: Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.
    Type: Application
    Filed: March 31, 2020
    Publication date: July 16, 2020
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson
  • Patent number: 10691566
    Abstract: Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: June 23, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson
  • Patent number: 10671475
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10671318
    Abstract: Provided are a computer program product, system, and method for processing a chain of a plurality of write requests including a commit wait flag and plurality of write requests, wherein each write request group includes write transactions directed to the storage. A determination is made as to whether the commit wait flag has a first value or a second value. The write requests are processed by requiring a current write request comprising one of the write requests being processed to complete before beginning to write data for a next write request following the current write request in the write request chain in response to the commit wait flag having the first value. The write requests are processed by processing the next write request before completing the current write request in response to the commit wait flag having the second value.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend
  • Patent number: 10664198
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices for a control unit managing access by hosts to logical devices configured with capacity from attached physical devices. An alias management group of logical devices and alias addresses assigned to the logical devices is configured. A plurality of requests to establish an association of the host with a logical device and the alias addresses assigned to the logical devices in the alias management group are received from a host. Acknowledgment is made to the host that the association is established in response to determining that the host is assigned the logical devices and alias addresses of the logical devices in the alias management group. The host can use one available alias address assigned to any one of the logical devices to access any one of the logical devices indicated in the association.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: May 26, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Patent number: 10664341
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: May 26, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20200159623
    Abstract: Provided are a computer program product, system, and method for generating a chain of a plurality of write requests including a commit wait flag and plurality of write requests. The commit wait flag is set to one of an indicated first value or a second value. The commit wait flag is set to the first value to cause a storage server to process the write requests by requiring a current write request being processed to complete before transferring data for a next write request following the current write request. The commit wait flag is set to the second value to cause the storage server to process the write requests by transferring data for the next write request before completing the current write request preceding the next write request. The write request chain is sent to the storage server to apply the write requests to the storage.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Inventors: Jeffrey A. BERGER, Susan K. CANDELARIA, Matthew J. KALOS, Beth A. PETERSON, Harry M. YUDENFRIEND
  • Patent number: 10656852
    Abstract: A location of a log file is determined, wherein data corresponding to writes is written sequentially starting from a starting block of the log file. A determination is made in the log file of a range of blocks in which data corresponding to a next write is anticipated to be written. Preprocessing operations are performed corresponding to the range of blocks of the log file in which the data corresponding to the next write is anticipated to be written.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: May 19, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Publication number: 20200151095
    Abstract: A cache hit is generated, in response to receiving an input/output (I/O) command over a bus interface. An update for a metadata track is stored in a buffer associated with a central processing unit (CPU) that processes the I/O command, in response to generating the cache hit. The metadata track is asynchronously updated from the buffer with the stored update for the metadata track in the buffer.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos