Patents by Inventor Matthew J. Kalos

Matthew J. Kalos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200151105
    Abstract: Provided are a computer program product, system, and method for invalidating track format information for tracks in cache. Demoted tracks demoted from the cache are indicated in a demoted track list. Track format information is saved for the demoted tracks. The track format information indicates a layout of data in the demoted tracks, wherein the track format information for the demoted tracks is used when the demoted tracks are staged back into the cache. An operation is initiated to invalidate a metadata track of the metadata tracks in the storage. Demoted tracks indicated in the demoted track list having metadata in the metadata track to invalidate are removed. The track format information for the demoted tracks having metadata in the metadata track to invalidate is removed.
    Type: Application
    Filed: January 14, 2020
    Publication date: May 14, 2020
    Inventors: Kyler A. ANDERSON, Kevin J. ASH, Lokesh M. GUPTA, Matthew J. KALOS
  • Publication number: 20200150878
    Abstract: Remote copy operations are performed to copy data from a primary storage controller to a secondary storage controller, wherein input/output (I/O) requests are received at the primary storage controller from a host both via a bus interface and a network interface while the remote copy operations are in progress, and wherein consistency groups are formed during the remote copy operations to copy the data consistently. Quiescing of I/O operations performed via the bus interface are performed while a current consistency group is being replaced by a next consistency group during the remote copy operations.
    Type: Application
    Filed: January 10, 2020
    Publication date: May 14, 2020
    Inventors: Matthew J. Ward, Matthew J. Kalos, Joshua J. Crawford, Carol S. Mellgren, Matthew R. Craig
  • Publication number: 20200151071
    Abstract: A first server of a storage controller is configured to communicate with a host via a first bus interface, and a second server of the storage controller is configured to communicate with the host via a second bus interface. Data is written from the host via the first bus interface to a cache of the first server and via the second bus interface to a non-volatile storage of the second server. The data stored in the cache of the first server is periodically compared to the data stored in the non-volatile storage of the second server.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Inventors: Kyler A. ANDERSON, Kevin J. ASH, Lokesh M. GUPTA, Matthew J. KALOS
  • Publication number: 20200142616
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices by a host accessing logical devices provisioned with a capacity from physical devices managed by a control unit. The host establishes with the control unit an association of logical devices and alias addresses assigned to the logical devices, wherein the alias addresses are associated with an alias management group. Alias address pool information is generated indicating each of the logical devices and their assigned alias addresses indicated in the association. The host uses from the alias address pool information any one of the alias addresses in the alias address pool information to access any of the logical devices associated with the same alias management group as the alias address.
    Type: Application
    Filed: January 8, 2020
    Publication date: May 7, 2020
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Patent number: 10628089
    Abstract: A determination is made that data stored in an extent of a first storage resource is to be moved to an extent of a second storage resource. Operations that are still awaiting to start execution in the first storage resource after the data stored in the extent of the first storage resource has been moved to the extent of the second storage resource, are configured for execution in the second storage resource.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: April 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew G. Borlick, Clint A. Hardy, Matthew J. Kalos, Karl A. Nielsen, Richard B. Stelmach, Hui Zhang
  • Patent number: 10620880
    Abstract: Provided are a computer program product, system, and method for using a delay timer to delay code load operations to process queued write requests. A code load is performed to a selected storage device in a storage array comprised of a plurality of the storage devices. Writes are queued to the storage array in a non-volatile storage while performing the code load. A determination is made as to whether the queued writes to the storage array exceed a threshold. A delay timer is started in response to determining that the queued writes to the storage array exceed the threshold. An additional code load is initiated to an additional selected storage device in the storage array in response to determining that the delay timer has expired. The additional code load is initiated to the additional selected storage device in response to determining that the queued writes are less than the threshold.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: April 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian A. Rinaldi, Clint A. Hardy, Samantha A. Utter, Kevin J. Ash, Karl A. Nielsen, Matthew J. Kalos
  • Patent number: 10613934
    Abstract: For managing RAID parity stripe contention using a processor device in a computing environment, delaying, by a host being separate to the RAID, one of a plurality of operations overlapping a parity sector in a parity stripe with a currently running operation and serializing each one of the multiplicity of operations overlapping the parity sector. The host further serializes each one of the plurality of operations overlapping the parity sector. The delaying is performed when the host determines whether a new write written through a hardware performance path comprising the one of the plurality of operations will overlap the parity stripe of a previous write comprising the currently running operation at the RAID controller.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Kalos, Karl A. Nielsen, Richard B. Stelmach
  • Patent number: 10613946
    Abstract: One general aspect of device reservation management in accordance with the present description, is directed to a host issuing I/O data requests to a primary device which synchronously mirrors data to a secondary data storage device wherein both devices are reserved for exclusive use by the host for I/O data requests. In response to a loss of communication connectivity on all paths to the primary storage controller controlling the primary device, the host confirms whether a communication path to the primary device has been established and whether the primary device remains reserved to the host. Upon successful confirmations, the reservation of the primary device is repaired such that I/O data requests to the reserved primary device continue. Other features and aspects may be realized, depending upon the particular application.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Tri M. Hoang, Matthew J. Kalos, John G. Thompson, Harry M. Yudenfriend
  • Patent number: 10606489
    Abstract: Remote copy operations are performed to copy data from a primary storage controller to a secondary storage controller, wherein input/output (I/O) requests are received at the primary storage controller from a host both via a bus interface and a network interface while the remote copy operations are in progress, and wherein consistency groups are formed during the remote copy operations to copy the data consistently. A relocation is performed of data written via the bus interface for a current consistency group from a cache to a sidefile, and subsequently data written via the bus interface for a next consistency group is stored in the cache.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Ward, Matthew J. Kalos, Joshua J. Crawford, Carol S. Mellgren
  • Patent number: 10599522
    Abstract: Provided are a computer program product, system, and method for generating a chain of a plurality of write requests including a commit wait flag and plurality of write requests. The commit wait flag is set to one of an indicated first value or a second value. The commit wait flag is set to the first value to cause a storage server to process the write requests by requiring a current write request being processed to complete before transferring data for a next write request following the current write request. The commit wait flag is set to the second value to cause the storage server to process the write requests by transferring data for the next write request before completing the current write request preceding the next write request. The write request chain is sent to the storage server to apply the write requests to the storage.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: March 24, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend
  • Patent number: 10592323
    Abstract: A storage system maintains a cache and a non-volatile storage. An error recovery component queries a cache component to determine whether modified customer data exists in a memory preserve cache. In response to determining that the modified customer data exists in the memory preserve cache, and in response to a failure beyond a threshold number of times of initial microcode load (IML) attempts to recover the modified customer data, an error notification is transmitted for manual intervention to avoid loss of the modified customer data.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Patent number: 10592129
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices by a host accessing logical devices provisioned with a capacity from physical devices managed by a control unit. The host establishes with the control unit an association of logical devices and alias addresses assigned to the logical devices, wherein the alias addresses are associated with an alias management group. Alias address pool information is generated indicating each of the logical devices and their assigned alias addresses indicated in the association. The host uses from the alias address pool information any one of the alias addresses in the alias address pool information to access any of the logical devices associated with the same alias management group as the alias address.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Publication number: 20200073955
    Abstract: A computer-implemented method according to one embodiment includes identifying a request to migrate data associated with a volume from a source storage pool that has a first rank extent size to a destination storage pool that has a second rank extent size greater than the first rank extent size. Additionally, the method includes creating a correspondence between logical volume extents of the volume and physical offset locations within rank extents of the destination storage pool. Further, the method includes migrating data from one or more ranks of the source storage pool to one or more ranks of the destination storage pool, according to the correspondence between the logical volume extents of the volume and the physical offset locations within the rank extents of the destination storage pool.
    Type: Application
    Filed: August 30, 2018
    Publication date: March 5, 2020
    Inventors: Clint A. Hardy, Hui Zhang, Karl A. Nielsen, Qiang Xie, Matthew J. Kalos
  • Patent number: 10579532
    Abstract: Provided are a computer program product, system, and method for invalidating track format information for tracks in cache. Demoted tracks demoted from the cache are indicated in a demoted track list. Track format information is saved for the demoted tracks. The track format information indicates a layout of data in the demoted tracks, wherein the track format information for the demoted tracks is used when the demoted tracks are staged back into the cache. An operation is initiated to invalidate a metadata track of the metadata tracks in the storage. Demoted tracks indicated in the demoted track list having metadata in the metadata track to invalidate are removed. The track format information for the demoted tracks having metadata in the metadata track to invalidate is removed.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: March 3, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Patent number: 10579287
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices by a host accessing logical devices provisioned with a capacity from physical devices managed by a control unit. The host establishes with the control unit an association of logical devices and alias addresses assigned to the logical devices, wherein the alias addresses are associated with an alias management group. Alias address pool information is generated indicating each of the logical devices and their assigned alias addresses indicated in the association. The host uses from the alias address pool information any one of the alias addresses in the alias address pool information to access any of the logical devices associated with the same alias management group as the alias address.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: March 3, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Patent number: 10572359
    Abstract: A first server of a storage controller is configured to communicate with a host via a first bus interface, and a second server of the storage controller is configured to communicate with the host via a second bus interface. Data is written from the host via the first bus interface to a cache of the first server and via the second bus interface to a non-volatile storage of the second server. The data stored in the cache of the first server is periodically compared to the data stored in the non-volatile storage of the second server.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: February 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Patent number: 10565109
    Abstract: A cache hit is generated, in response to receiving an input/output (I/O) command over a bus interface. An update for a metadata track is stored in a buffer associated with a central processing unit (CPU) that processes the I/O command, in response to generating the cache hit. The metadata track is asynchronously updated from the buffer with the stored update for the metadata track in the buffer.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kyler A Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Patent number: 10558568
    Abstract: A storage system, maintains a cache and a non-volatile storage. Active tracks in the non-volatile storage are determined. The determined active tracks in the non-volatile storage are validated between the cache and the non-volatile storage during a warmstart recovery.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: February 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos
  • Publication number: 20200042186
    Abstract: One general aspect of device reservation state synchronization in accordance with the present description, device reservation management logic ensures synchronization of reservation states of primary and secondary volumes of a mirror relationship in the event of a change in the state of the mirroring relationship such as achieving full data synchronization between the volumes. Other features and aspects may be realized, depending upon the particular application.
    Type: Application
    Filed: October 11, 2019
    Publication date: February 6, 2020
    Inventors: Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Carol S. Mellgren, John G. Thompson
  • Patent number: 10552324
    Abstract: Provided are a computer program product, system, and method for populating a second cache with tracks from a first cache when transferring management of the tracks from a first node to a second node. Management of a first group of tracks in the storage managed by the first node is transferred to the second node managing access to a second group of tracks in the storage. After the transferring the management of the tracks, the second node manages access to the first and second groups of tracks and caches accessed tracks from the first and second groups in the second cache of the second node. The second cache of the second node is populated with the tracks in a first cache of the first node.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: February 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos, Brian A. Rinaldi