Patents by Inventor Matthew Thompson

Matthew Thompson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220237122
    Abstract: An apparatus includes a CPU core and a L1 cache subsystem including a L1 main cache, a L1 victim cache, and a L1 controller. The apparatus includes a L2 cache subsystem coupled to the L1 cache subsystem by a transaction bus and a tag update bus. The L2 cache subsystem includes a L2 main cache, a shadow L1 main cache, a shadow L1 victim cache, and a L2 controller. The L2 controller receives a message from the L1 controller over the tag update bus, including a valid signal, an address, and a coherence state. In response to the valid signal being asserted, the L2 controller identifies an entry in the shadow L1 main cache or the shadow L1 victim cache having an address corresponding to the address of the message and updates a coherence state of the identified entry to be the coherence state of the message.
    Type: Application
    Filed: April 19, 2022
    Publication date: July 28, 2022
    Inventors: Abhijeet Ashok CHACHAD, David Matthew THOMPSON, Naveen BHORIA, Peter Michael HIPPLEHEUSER
  • Publication number: 20220229690
    Abstract: A method includes receiving, by a L2 controller, a request to perform a global operation on a L2 cache and preventing new blocking transactions from entering a pipeline coupled to the L2 cache while permitting new non-blocking transactions to enter the pipeline. Blocking transactions include read transactions and non-victim write transactions. Non-blocking transactions include response transactions, snoop transactions, and victim transactions.
    Type: Application
    Filed: April 5, 2022
    Publication date: July 21, 2022
    Inventors: Abhijeet Ashok CHACHAD, Naveen BHORIA, David Matthew THOMPSON, Neelima MURALIDHARAN
  • Patent number: 11392498
    Abstract: An apparatus includes first CPU and second CPU cores, a L1 cache subsystem coupled to the first CPU core and comprising a L1 controller, and a L2 cache subsystem coupled to the L1 cache subsystem and to the second CPU core. The L2 cache subsystem includes a L2 memory and a L2 controller configured to operate in an aliased mode in response to a value in a memory map control register being asserted. In the aliased mode, the L2 controller receives a first request from the first CPU core directed to a virtual address in the L2 memory, receives a second request from the second CPU core directed to the virtual address in the L2 memory, directs the first request to a physical address A in the L2 memory, and directs the second request to a physical address B in the L2 memory.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: July 19, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Abhijeet Ashok Chachad, Timothy David Anderson, Pramod Kumar Swami, Naveen Bhoria, David Matthew Thompson, Neelima Muralidharan
  • Publication number: 20220218422
    Abstract: A surgical system comprising a tool for engaging a target site, a manipulator configured to support the tool, and a sensing system configured to detect one or more system conditions associated with one or more of the tool, the manipulator, the target site, or combinations thereof. A controller is coupled to the manipulator and to the sensing system is configured to operate the manipulator between: a first mode to maintain alignment of the tool with respect to the target site according to a first constraint criteria, and a second mode to maintain alignment of the tool with respect to the target site according to a second constraint criteria different from the first constraint criteria. The controller changes operation of the manipulator from the first mode to the second mode in response to determining that at least one of the one or more system conditions satisfies a predetermined condition.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: MAKO Surgical Corp.
    Inventors: Rishabh Khurana, David Gene Bowling, Matthew Thompson
  • Publication number: 20220219817
    Abstract: A rotor system for an aircraft includes an open rotor assembly comprising a plurality of rotor blades connected to a rotor mast via a yoke, wherein the rotor assembly is tiltable between a first position corresponding to an airplane mode and a second position corresponding to a helicopter mode; and a drive system for providing rotational energy to the open rotor assembly via the rotor mast, the drive system comprising at least one electric motor for providing rotational energy to a drive shaft and a gearbox connected to the drive shaft for receiving rotational energy from the at least one electric motor via the drive shaft and providing rotational energy to the rotor mast via a rotor shaft; wherein the drive system is rotatable relative to the wing about a tilt axis and the rotor shaft is coaxial with the drive shaft.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 14, 2022
    Inventors: Jonathan Andrew Knoll, George Matthew Thompson, Charles Hubert Speller, Grant Michael Beall
  • Publication number: 20220219826
    Abstract: A rotor system for an aircraft is described and includes an open rotor assembly comprising a plurality of rotor blades connected to a rotor mast; and a drive system for providing rotational energy to the open rotor assembly via the rotor mast. The drive system includes at least one electric motor for providing rotational energy to a motor shaft; and a gearbox connected to the drive shaft for receiving rotational energy from the at least one electric motor via the motor shaft and providing rotational energy to the rotor mast via a rotor shaft.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 14, 2022
    Inventors: Jonathan Andrew Knoll, George Matthew Thompson, Charles Hubert Speller, Grant Michael Beall
  • Publication number: 20220210100
    Abstract: Systems and methods are provided for performing operations including: retrieving, by one or more processors, a plurality of content items; identifying a list of friends of a user on a messaging application; obtaining reaction data for each friend in the list of friends, the reaction data identifying a set of content items to which respective ones of the friends in the list of friends reacted; selecting, based on the reaction data, a first content item in the plurality of content items that is included in the set of content items to which respective ones of the friends in the list of friends reacted; and presenting the first content item to the user in a presentation arrangement of a graphical user interface.
    Type: Application
    Filed: March 17, 2022
    Publication date: June 30, 2022
    Inventors: Newar Husam Al Majid, Nathan Kenneth Boyd, Laurent Desserrey, Matthew Thompson, Jeremy Voss
  • Patent number: 11374923
    Abstract: The present disclosure relates to systems and methods for implementing tiered authentication using position-based credentials. A system for authenticating a user with position-based credentials may include one or more memories storing instructions and one or more processors configured to execute the instructions to perform operations. The operations may include receiving a login request associated with the user from a first user interface device; receiving a first location associated with the first user interface device; receiving a second location associated with a second user interface device; when a Lebesgue distance between the first location and the second location is below a first threshold, authenticating the user; when the Lebesgue distance is above the first threshold and below a second, larger threshold, prompting the first interface device for a first credential; and when the Lebesgue distance is above the second threshold, prompting the first interface device for a second credential.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: June 28, 2022
    Assignee: Capital One Servics, LLC
    Inventors: Paul Y. Moreton, Ryan Fox, Matthew Thompson
  • Patent number: 11371688
    Abstract: A lighted accessory and/or corresponding method of installation seamlessly replace an original equipment manufacturer (OEM) lighting apparatus and/or accessory. The accessory includes a front side and back side with a circuit board positioned therebetween. One side of the accessory includes translucent portion(s). The circuit board includes a plurality of light emitting diodes (LEDs) which are aligned with the translucent portion of the front side of the accessory such that when the LEDs are illuminated, light is emitted from the accessory. The circuit board also includes at least one microcontroller and a radio-frequency interference filter circuit wherein the microcontroller controls the LEDs and the radio-frequency interference filter circuit mitigates RF emissions.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: June 28, 2022
    Assignee: Putco, Inc.
    Inventors: Xiao Jun Tian, Conner Schramm, James P. Elwell, Matthew Thompson, Seth Hoogendoorn, Parker Freeman
  • Patent number: 11370536
    Abstract: A tip gap control system for a ducted aircraft includes a flight control computer including a blade length control module configured to generate a blade tip actuator command and a proprotor system in data communication with the flight control computer. The proprotor system includes a duct and proprotor blades surrounded by the duct. Each of the proprotor blades includes an active blade tip movable into various positions including a retracted position and an extended position. The tip gap control system also includes one or more actuators coupled to the active blade tips. The one or more actuators move the active blade tips between the various positions based on the blade tip actuator command, thereby controlling a tip gap between the proprotor blades and the duct.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: June 28, 2022
    Assignee: Textron Innovations Inc.
    Inventors: Jonathan Andrew Knoll, George Matthew Thompson, Nicholas Ralph Carlson
  • Publication number: 20220192844
    Abstract: A system for facilitating arthroplasty procedures includes a robotic device, a reaming tool configured to interface with the robotic device, and a processing circuit communicable with the robotic device. The processing circuit is configured to obtain a surgical plan comprising a first planned position of an implant cup and a second planned position of an implant augment relative to a bone of a patient, determine a planned bone modification configured to prepare the bone to receive the implant cup in the first planned position and the implant augment in the second planned position, generate one or more virtual objects based on the planned bone modification, control the robotic device to constrain the cutting tool with the one or more virtual objects while the cutting tool interfaces with the robotic device and is operated to modify the bone in accordance with the planned bone modification.
    Type: Application
    Filed: August 20, 2020
    Publication date: June 23, 2022
    Inventors: Matthew Thompson, Varun Chandra, Mark Nadzadi, Christine Perrone, Garrett Joyal
  • Publication number: 20220182558
    Abstract: Systems and methods are provided for presenting subtitles. The systems and methods include accessing, by a user device, a video discovery graphical user interface that includes a plurality of videos; receiving a user input that gradually reduces volume of the user device; determining that the volume of the user device has gradually been reduced by the user input until a mute state has been reached in which audio output of the user device is disabled; and in response to determining that the volume of the user device has gradually been reduced until the mute state has been reached, automatically causing subtitles of a first video of the plurality of videos to be displayed during playback of the first video.
    Type: Application
    Filed: February 24, 2022
    Publication date: June 9, 2022
    Inventors: Nathan Kenneth Boyd, Andrew Grosvenor Cooper, David Michael Hornsby, Georgiy Kassabli, Matthew Thompson
  • Publication number: 20220171806
    Abstract: Systems and methods are provided for performing operations including: retrieving, by one or more processors, a plurality of content items; identifying a first content item from the plurality of content items to which a user has previously reacted; determining a category of the first content item; selecting a second content item in the plurality of content items that is associated with the determined category of the first content item to which the user has previously reacted; and presenting the second content item to the user in a presentation arrangement of a graphical user interface.
    Type: Application
    Filed: February 16, 2022
    Publication date: June 2, 2022
    Inventors: Newar Husam Al Majid, Nathan Kenneth Boyd, Laurent Desserrey, Matthew Thompson, Jeremy Voss
  • Publication number: 20220164252
    Abstract: An apparatus includes a central processing unit (CPU) core and a cache subsystem coupled to the CPU core. The cache subsystem includes a memory configured to store a line of data and an error correcting code (ECC) syndrome associated with the line of data, where the ECC syndrome is calculated based on the line of data and the ECC syndrome is a first type ECC. The cache subsystem also includes a controller configured to, in response to a request from a master configured to implement a second type ECC, the request being directed to the line of data, transform the first type ECC syndrome for the line of data to a second type ECC syndrome send a response to the master. The response includes the line of data and the second type ECC syndrome associated with the line of data.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 26, 2022
    Inventors: Abhijeet Ashok CHACHAD, David Matthew THOMPSON, Son Hung TRAN
  • Publication number: 20220164287
    Abstract: A method includes receiving, by a level two (L2) controller, a first request for a cache line in a shared cache coherence state; mapping, by the L2 controller, the first request to a second request for a cache line in an exclusive cache coherence state; and responding, by the L2 controller, to the second request.
    Type: Application
    Filed: February 7, 2022
    Publication date: May 26, 2022
    Inventors: Abhijeet Ashok CHACHAD, David Matthew THOMPSON, Timothy David ANDERSON, Kai CHIRCA
  • Publication number: 20220164217
    Abstract: A method includes receiving, by a level two (L2) controller, a write request for an address that is not allocated as a cache line in a L2 cache. The write request specifies write data. The method also includes generating, by the L2 controller, a read request for the address; reserving, by the L2 controller, an entry in a register file for read data returned in response to the read request; updating, by the L2 controller, a data field of the entry with the write data; updating, by the L2 controller, an enable field of the entry associated with the write data; and receiving, by the L2 controller, the read data and merging the read data into the data field of the entry.
    Type: Application
    Filed: December 6, 2021
    Publication date: May 26, 2022
    Inventors: Abhijeet Ashok CHACHAD, David Matthew THOMPSON
  • Patent number: 11343209
    Abstract: Systems and methods are provided for performing operations including: retrieving, by one or more processors, a plurality of content items; identifying a list of friends of a user on a messaging application; obtaining reaction data for each friend in the list of friends, the reaction data identifying a set of content items to which respective ones of the friends in the list of friends reacted; selecting, based on the reaction data, a first content item in the plurality of content items that is included in the set of content items to which respective ones of the friends in the list of friends reacted; and presenting the first content item to the user in a presentation arrangement of a graphical user interface.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: May 24, 2022
    Assignee: Snap Inc.
    Inventors: Newar Husam Al Majid, Nathan Kenneth Boyd, Laurent Desserrey, Matthew Thompson, Jeremy Voss
  • Publication number: 20220156149
    Abstract: In described examples, a processor system includes a processor core that generates memory write requests, a cache memory, and a memory pipeline of the cache memory. The memory pipeline has a holding buffer, an anchor stage, and an RMW pipeline. The anchor stage determines whether a data payload of a write request corresponds to a partial write. If so, the data payload is written to the holding buffer and conforming data is read from a corresponding cache memory address to merge with the data payload. The RMW pipeline has a merge stage and a syndrome generation stage. The merge stage merges the data payload in the holding buffer with the conforming data to make merged data. The syndrome generation stage generates an ECC syndrome using the merged data. The memory pipeline writes the data payload and ECC syndrome to the cache memory.
    Type: Application
    Filed: January 31, 2022
    Publication date: May 19, 2022
    Inventors: Abhijeet Ashok Chachad, David Matthew Thompson, Daniel Brad Wu
  • Publication number: 20220144624
    Abstract: A MEMS sensor includes a proof mass that is suspended over a substrate. A sense electrode is located on a top surface of the substrate parallel to the proof mass, and forms a capacitor with the proof mass. The sense electrodes have a plurality of slots that provide improved performance for the MEMS sensor. A measured value sensed by the MEMS sensor is determined based on the movement of the proof mass relative to the slotted sense electrode.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 12, 2022
    Inventors: Alexander Castro, Matthew Thompson, Leonardo Baldasarre, Sarah Nitzan, Houri Johari-Galle
  • Patent number: 11321248
    Abstract: In described examples, a coherent memory system includes a central processing unit (CPU) and first and second level caches. The memory system can include a pipeline for accessing data stored in one of the caches. Requestors can access the data stored in one of the caches by sending requests at a same time that can be arbitrated by the pipeline.
    Type: Grant
    Filed: May 24, 2020
    Date of Patent: May 3, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Abhijeet Ashok Chachad, David Matthew Thompson