Abstract: Circuits and methods to sense the current through a coil of an integrated switching converter, applicable to boost and to buck converters, have been achieved. The present invention uses a “replica biasing” technique to avoid a resistor for current measurement. The current through a pass device is mirrored into a replica, having a scale of n and being much smaller in size, of said pass device. The current through the replica is mirrored to another branch of the circuit and back again to achieve a fast stabilization of the current. The current through the replica is mirrored again to an output branch of the circuit, which conducts exactly a fraction 1/n of the current flowing through the pass device. The self-biasing current loop of the invention adapts quickly to the actual current level through the pass device of the switching converter. Accuracies better than 5% are achieved over a wide range of dynamic range.

Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.

Abstract: Circuits and methods to achieve dynamic biasing for the complete loop transfer function of a current mode voltage regulator have been achieved. The circuit comprises a Mirror-Transconductor Amplifier type operational transconductance amplifier (OTA) wherein its transconductance is linearly dependent on its biasing current. This biasing current is a linearly derivative of the OTA's output current. A current amplification circuit couples the regulator output current linearly with said OTA's output current. In this configuration the iterative biasing of the OTA forms a feed-forward loop, which contains a low-pass filter for stability and a negative feedback loop is closed by connecting the regulator voltage output to the OTA input. The invention realizes a purely current mode regulator since all internal currents are generated as a fraction of the output load.

Abstract: Circuits and methods to increase the transconductance of a current mirror in case of small input currents of the current mirror without affecting the transconductance of said current mirror in case of large input currents have been achieved. Key of the invention is a “bypass” formed by a transistor in series with a resistor, wherein the bypass is in parallel to the input transistor of the current mirror. This bypass is only relevant for very small input currents wherein the resistor can be neglected compared to the impedance of the bypass-transistor and therefore the total transconductance of the current mirror is increased in case of very small input currents. For large input currents the resistor of the bypass effectively blocks the “bypass” path. The invention solves e.g. a problem of amplifiers having any kind of dynamic biasing namely that the input impedance of current mirrors becomes too large for very small input currents.

Abstract: Circuits and methods to sense the current through a coil of an integrated switching converter, applicable to boost and to buck converters, have been achieved. The present invention uses a “replica biasing” technique to avoid a resistor for current measurement. The current through a pass device is mirrored into a replica, having a scale of n and being much smaller in size, of said pass device. The current through the replica is mirrored to another branch of the circuit and back again to achieve a fast stabilization of the current. The current through the replica is mirrored again to an output branch of the circuit, which conducts exactly a fraction 1/n of the current flowing through the pass device. The self-biasing current loop of the invention adapts quickly to the actual current level through the pass device of the switching converter. Accuracies better than 5% are achieved over a wide range of dynamic range.

Abstract: With self oscillating pulse width modulators, using a hysteretic comparator to change the output duty cycle according to the input signal, as often used for example for Class-D amplifiers or switching regulators, the frequency varies with output power and supply voltage. The disclosed invention presents a method to drastically reduce the frequency variation by introducing the combination of an analog and a digital feedback loop to shift the hysteretic threshold, ideally by providing a single absolute value, which is proportional to the pulse frequency and by alternating the polarity of shifting the hysteretic threshold, based on the actual output pulse phase.

Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.

Abstract: With self oscillating pulse width modulators, using a hysteretic comparator to change the output duty cycle according to the input signal, as often used for example for Class-D amplifiers or switching regulators, the frequency varies with output power and supply voltage. The disclosed invention presents a method to drastically reduce the frequency variation by introducing the combination of an analog and a digital feedback loop to shift the hysteretic threshold, ideally by providing a single absolute value, which is proportional to the pulse frequency and by alternating the polarity of shifting the hysteretic threshold, based on the actual output pulse phase.

Abstract: Circuits and methods to increase the transconductance of a current mirror in case of small input currents of the current mirror without affecting the transconductance of said current mirror in case of large input currents have been achieved. Key of the invention is a “bypass” formed by a transistor in series with a resistor, wherein the bypass is in parallel to the input transistor of the current mirror. This bypass is only relevant for very small input currents wherein the resistor can be neglected compared to the impedance of the bypass-transistor and therefore the total transconductance of the current mirror is increased in case of very small input currents. For large input currents the resistor of the bypass effectively blocks the “bypass” path. The invention solves e.g. a problem of amplifiers having any kind of dynamic biasing namely that the input impedance of current mirrors becomes too large for very small input currents.

Abstract: Circuits and methods to achieve dynamic biasing for the complete loop transfer function of a current mode voltage regulator have been achieved. The circuit comprises a Mirror-Transconductor Amplifier type operational transconductance amplifier (OTA) wherein its transconductance is linearly dependent on its biasing current. This biasing current is a linearly derivative of the OTA's output current. A current amplification circuit couples the regulator output current linearly with said OTA's output current. In this configuration the iterative biasing of the OTA forms a feed-forward loop, which contains a low-pass filter for stability and a negative feedback loop is closed by connecting the regulator voltage output to the OTA input. The invention realizes a purely current mode regulator since all internal currents are generated as a fraction of the output load.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. The threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A method and a circuit to achieve a low dropout voltage regulator having a constant high performance under all operating conditions, including the dropout region, have been accomplished. A regulated cascade structure is placed at the input of a current mirror and in connection with a voltage regulator output stage. In contrast to other applications the positive input of the error amplifier is not biased with a reference voltage but connected to the regulator output. Therefore the cascade structure regulates the voltage of the entry node of the current mirror to be equal to the output voltage of the regulator under all operating conditions of the regulator. Thus the transistors of the current mirror have always identical drain-source voltages. Therefore the regulator is kept in the optimal, balanced operating point, a constant high regulator loop gain is achieved and PSRR and load regulation performance is no more reduced under dropout operating conditions.

Abstract: A method for dynamically adapting the biasing current for a fast switching voltage comparator is achieved. The difference of the two input signals of said comparator controls the comparator's biasing current, where the biasing current is high only when the difference is low and the comparator's switching is likely to happen and where the biasing current is kept low at other times. In a current mirroring circuit, the voltage difference at the comparator inputs controls the mirroring ratio. The biasing current reaches its maximum when the input voltage difference approaches zero. Once the input voltage difference crosses zero and continues to change in the same direction as before, that is after the polarity of the voltage difference changed, the control mechanism alternates the connection of the input signals to the current controlling elements, in order to now reduce the current with a further increase of the voltage difference.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.