Abstract: A method and a circuit to achieve a low dropout voltage regulator having a constant high performance under all operating conditions, including the dropout region, have been accomplished. A regulated cascade structure is placed at the input of a current mirror and in connection with a voltage regulator output stage. In contrast to other applications the positive input of the error amplifier is not biased with a reference voltage but connected to the regulator output. Therefore the cascade structure regulates the voltage of the entry node of the current mirror to be equal to the output voltage of the regulator under all operating conditions of the regulator. Thus the transistors of the current mirror have always identical drain-source voltages. Therefore the regulator is kept in the optimal, balanced operating point, a constant high regulator loop gain is achieved and PSRR and load regulation performance is no more reduced under dropout operating conditions.

Abstract: A method for dynamically adapting the biasing current for a fast switching voltage comparator is achieved. The difference of the two input signals of said comparator controls the comparator's biasing current, where the biasing current is high only when the difference is low and the comparator's switching is likely to happen and where the biasing current is kept low at other times. In a current mirroring circuit, the voltage difference at the comparator inputs controls the mirroring ratio. The biasing current reaches its maximum when the input voltage difference approaches zero. Once the input voltage difference crosses zero and continues to change in the same direction as before, that is after the polarity of the voltage difference changed, the control mechanism alternates the connection of the input signals to the current controlling elements, in order to now reduce the current with a further increase of the voltage difference.

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: A circuit for generating a temperature-stabilized reference voltage uses the current-mode technique, in which two partial currents are superimposed on each other and converted into the reference voltage. One partial current is generated by an asymmetric differential amplifier with two lateral bipolar transistors of different area. In order to generate the other partial current, an electrical resistor is disposed between the common node of the differential amplifier and ground.

Abstract: A circuit for generating a temperature-stabilized reference voltage uses the current-mode technique, in which two partial currents are superimposed on each other and converted into the reference voltage. One partial current is generated by an asymmetric differential amplifier with two lateral bipolar transistors of different area. In order to generate the other partial current, an electrical resistor is disposed between the common node of the differential amplifier and ground.