Patents by Inventor Meng Ding

Meng Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325943
    Abstract: The present application discloses a method of fabricating a thin film transistor, including forming a semiconductor layer having a pattern corresponding to that of the active layer on a base substrate; forming a first photoresist layer on a side of the semiconductor layer distal to the base substrate; the first photoresist layer being in an area corresponding to the channel region, the second doped region, and the fourth doped region; doping a region of the semiconductor layer corresponding to the first doped region and the third doped region using the first photoresist layer as a mask plate; forming a second photoresist layer by removing a portion of the first photoresist layer to expose an initial portion of the semiconductor layer corresponding to at least a portion of the second doped region and at least a portion of the fourth doped region; and doping the initial portion of the semiconductor layer using the second photoresist layer as a mask plate.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: June 18, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., Ordos Yuansheng Optoelectronics Co., Ltd.
    Inventors: Chaochao Sun, Chao Wang, Huafeng Liu, Shengwei Zhao, Bule Shun, Lei Yang, Chongliang Hu, Meng Yang, Jingping Lv, Lin Xie, Shimin Sun, Duolong Ding
  • Publication number: 20180333869
    Abstract: The present invention discloses a safety protection method of dynamic detection for mobile robots. The mobile robot is provided with a sensor. Said sensor obtains the obstacle information in the detection areas in front of a mobile robot, and the mobile robot is caused to progressively slow down and dynamically adjust the detection area when an obstacle appears in the detection area. If no obstacle is detected in the detection area after adjusting, then the mobile robot is caused to keep on moving, and if an obstacle is still detected in the detection area after adjusting, then the mobile robot is caused to keep on decelerating until they are stopped. The sensor sets different detection areas according to the traveling speed and traveling direction of the mobile robot, or presets the detection area according to the path and dynamically adjusts it when the mobile robot is running.
    Type: Application
    Filed: October 8, 2016
    Publication date: November 22, 2018
    Inventors: Meng Ding, Yikun Tao, Xia Wang, Xudong Mi, Lingfen Zhu, Hongbo Zheng, Xinfeng Du, Jizhong Shen
  • Publication number: 20180004365
    Abstract: A method, and an apparatus for recommending an interface theme are provided. An exemplary embodiment of the method includes: obtaining a target image which includes an image of a target person; obtaining characteristic information of the target person based on the target image; obtaining a selection list of recommended themes, wherein the recommended themes are interface themes that match the characteristic information of the target person; and outputting the selection list of recommended themes.
    Type: Application
    Filed: December 12, 2016
    Publication date: January 4, 2018
    Inventors: Haojing FU, Meng DING, Lei ZHOU
  • Publication number: 20160217005
    Abstract: As disclosed herein a method, executed by a computer, for automatically determining a workflow completion state includes initiating a workflow including one or more jobs, receiving a notification that a first job corresponding to the workflow has finished, checking dependency requirements of a successor job corresponding to the first job, submitting the successor job for processing if the dependency requirements have been satisfied, and evaluating a completion status of each of the one or more jobs to determine whether the workflow is still running. Complex workflows may consist of many jobs, all of which may not be required to complete for the workflow to complete successfully. The method described herein enables the completion state of a workflow to be determined without requiring user defined completion criteria. A computer system, and computer program product corresponding to the method are also disclosed herein.
    Type: Application
    Filed: January 23, 2015
    Publication date: July 28, 2016
    Inventors: Meng Ding, Zhi Hua Jin, Qingda Wang
  • Publication number: 20160217017
    Abstract: As disclosed herein a method, executed by a computer, for automatically determining a workflow completion state includes initiating a workflow including one or more jobs, receiving a notification that a first job corresponding to the workflow has finished, checking dependency requirements of a successor job corresponding to the first job, submitting the successor job for processing if the dependency requirements have been satisfied, and evaluating a completion status of each of the one or more jobs to determine whether the workflow is still running. Complex workflows may consist of many jobs, all of which may not be required to complete for the workflow to complete successfully. The method described herein enables the completion state of a workflow to be determined without requiring user defined completion criteria.
    Type: Application
    Filed: August 18, 2015
    Publication date: July 28, 2016
    Inventors: Meng Ding, Zhi Hua Jin, Qingda Wang
  • Patent number: 9276007
    Abstract: A method for fabricating a memory device with a self-aligned trap layer and rounded active region corners is disclosed. In the present invention, an STI process is performed before any of the charge-trapping and top-level layers are formed. Immediately after the STI process, the sharp corners of the active regions are exposed. Because these sharp corners are exposed at this time, they are available to be rounded through any number of known rounding techniques. Rounding the corners improves the performance characteristics of the memory device. Subsequent to the rounding process, the charge-trapping structure and other layers can be formed by a self-aligned process.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: March 1, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventors: Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, YouSeok Suh, Meng Ding, Hidehiko Shiraiwa, Amol Joshi, Hapreet Sachar, David Matsumoto, Lovejeet Singh, Chih-Yuh Yang
  • Publication number: 20150378784
    Abstract: Work flows consist of the following steps: (i) receiving a work flow data set that defines a work flow which includes a plurality of work items; and (ii) defining, a centralized and pattern-based work flow level job input/output (I/O) characteristic set that includes at least I/O settings for work items included in the work flow.
    Type: Application
    Filed: June 27, 2014
    Publication date: December 31, 2015
    Inventors: Kinson Chik, Meng Ding, Qingda Wang
  • Patent number: 9190531
    Abstract: An embodiment of the present invention is directed to a method of forming a memory cell. The method includes etching a trench in a substrate and filling the trench with an oxide to form a shallow trench isolation (STI) region. A portion of an active region of the substrate that comes in contact with the STI region forms a bitline-STI edge. The method further includes forming a gate structure over the active region of the substrate and over the STI region. The gate structure has a first width substantially over the center of the active region of the substrate and a second width substantially over the bitline-STI edge, and the second width is greater than the first width.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: November 17, 2015
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Meng Ding, YouSeok Suh, Shenqing Fang, Kuo-Tung Chang
  • Publication number: 20140312409
    Abstract: A method for fabricating a memory device with a self-aligned trap layer and rounded active region corners is disclosed. In the present invention, an STI process is performed before any of the charge-trapping and top-level layers are formed. Immediately after the STI process, the sharp corners of the active regions are exposed. Because these sharp corners are exposed at this time, they are available to be rounded through any number of known rounding techniques. Rounding the corners improves the performance characteristics of the memory device. Subsequent to the rounding process, the charge-trapping structure and other layers can be formed by a self-aligned process.
    Type: Application
    Filed: January 29, 2014
    Publication date: October 23, 2014
    Applicant: SPANSION LLC
    Inventors: Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, YouSeok Suh, Meng Ding, Hidehiko Shiraiwa, Amol Joshi, Hapreet Sachar, David Matsumoto, Lovejeet Singh, Chih-Yuh Yang
  • Patent number: 8809936
    Abstract: A memory cell system is provided including forming a first insulator layer over a semiconductor substrate, forming a charge trap layer over the first insulator layer, forming a second insulator layer over the charge trap layer, forming a top blocking intermediate layer over the second insulator layer, and forming a contact layer over the top blocking intermediate layer.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: August 19, 2014
    Assignees: Globalfoundries Inc., Spansion LLC
    Inventors: Lei Xue, Rinji Sugino, YouSeok Suh, Hidehiko Shiraiwa, Meng Ding, Shenqing Fang, Joong Jeon
  • Patent number: 8803216
    Abstract: A memory cell system including providing a substrate, forming a charge-storing stack having silicon-rich nitride on the substrate, and forming a gate on the charge-storing stack.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: August 12, 2014
    Assignees: Spansion, LLC, Advanced Micro Devices, Inc.
    Inventors: Meng Ding, Lei Xue, Mark Randolph, Chi Chang, Robert Bertram Ogle, Jr.
  • Publication number: 20140061771
    Abstract: A memory cell system is provided forming a first insulator layer over a semiconductor substrate, forming a charge trap layer over the first insulator layer, forming an intermediate layer over the charge trap layer, and forming a second insulator layer with the intermediate layer.
    Type: Application
    Filed: November 11, 2013
    Publication date: March 6, 2014
    Applicants: Spansion, LLC., Advanced Micro Devices, Inc.
    Inventors: Meng Ding, Amol Ramesh Joshi, Lei Xue, Takashi Orimoto, Kuo-Tung Chang
  • Patent number: 8642441
    Abstract: A method for fabricating a memory device with a self-aligned trap layer and rounded active region corners is disclosed. In the present invention, an STI process is performed before any of the charge-trapping and top-level layers are formed. Immediately after the STI process, the sharp corners of the active regions are exposed. Because these sharp corners are exposed at this time, they are available to be rounded through any number of known rounding techniques. Rounding the corners improves the performance characteristics of the memory device. Subsequent to the rounding process, the charge-trapping structure and other layers can be formed by a self-aligned process.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: February 4, 2014
    Assignee: Spansion LLC
    Inventors: Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, YouSeok Suh, Meng Ding, Hidehiko Shiraiwa, Amol Joshi, Harpreet Sachar, David Matsumoto, Lovejeet Singh, Chih-Yuh Yang
  • Patent number: 8587049
    Abstract: A memory cell system is provided forming a first insulator layer over a semiconductor substrate, forming a charge trap layer over the first insulator layer, forming an intermediate layer over the charge trap layer, and forming a second insulator layer with the intermediate layer.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: November 19, 2013
    Assignees: Spansion, LLC, Advanced Micro Devices, Inc.
    Inventors: Meng Ding, Amol Ramesh Joshi, Lei Xue, Takashi Orimoto, Kuo-Tung Chang
  • Patent number: 8404541
    Abstract: A semiconductor device includes a substrate and a memory cell formed on the substrate. The memory cell includes a word line. The semiconductor device also includes a protection area formed in the substrate, a conductive structure configured to extend the word line to the protection area, and a contact configured to short the word line and the protection area.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: March 26, 2013
    Assignee: Spansion LLC
    Inventors: Wei Zheng, Jean Yang, Mark Randolph, Ming Kwan, Yi He, Zhizheng Liu, Meng Ding
  • Patent number: 8367537
    Abstract: An embodiment of the present invention is directed to a method of forming a memory cell. The method includes etching a trench in a substrate and filling the trench with an oxide to form a shallow trench isolation (STI) region. A portion of an active region of the substrate that comes in contact with the STI region forms a bitline-STI edge. The method further includes forming a gate structure over the active region of the substrate and over the STI region. The gate structure has a first width substantially over the center of the active region of the substrate and a second width substantially over the bitline-STI edge, and the second width is greater than the first width.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: February 5, 2013
    Assignee: Spansion LLC
    Inventors: Meng Ding, YouSeok Suh, Shenqing Fang, Kuo-Tung Chang
  • Patent number: 8143661
    Abstract: A memory cell system is provided including a first insulator layer over a semiconductor substrate, a charge trap layer over the first insulator layer, and slot where the charge trap layer includes a second insulator layer having the characteristic of being grown.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: March 27, 2012
    Assignees: Spansion LLC, Advanced Micro Devices, Inc.
    Inventors: Shenqing Fang, Rinji Sugino, Jayendra Bhakta, Takashi Orimoto, Hiroyuki Nansei, Yukio Hayakawa, Takayuki Maruyama, Hidehiko Shiraiwa, Kuo-Tung Chang, Lei Xue, Meng Ding, Amol Ramesh Joshi, YouSeok Suh, Harpreet Sachar
  • Patent number: 8031528
    Abstract: A flash memory system configured in accordance with an example embodiment of the invention employs a virtual ground array architecture. During programming operations, target memory cells are biased with a positive source bias voltage to reduce or eliminate leakage current that might otherwise conduct through the target memory cells. A positive source bias voltage may also be applied to target memory cells during verification operations (program verify, soft program verify, erase verify) to reduce or eliminate leakage current that might otherwise introduce errors in the verification operations.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: October 4, 2011
    Assignee: Spansion LLC
    Inventors: Ashot Melik-Martirosian, Ed Runnion, Mark Randolph, Meng Ding
  • Publication number: 20100240210
    Abstract: A semiconductor device includes a substrate and a memory cell formed on the substrate. The memory cell includes a word line. The semiconductor device also includes a protection area formed in the substrate, a conductive structure configured to extend the word line to the protection area, and a contact configured to short the word line and the protection area.
    Type: Application
    Filed: May 28, 2010
    Publication date: September 23, 2010
    Applicant: SPANSION L.L.C.
    Inventors: Wei ZHENG, Jean YANG, Mark RANDOLPH, Ming KWAN, Yi HE, Zhizheng LIU, Meng DING
  • Patent number: 7750407
    Abstract: A semiconductor device includes a substrate and a memory cell formed on the substrate. The memory cell includes a word line. The semiconductor device also includes a protection area formed in the substrate, a conductive structure configured to extend the word line to the protection area, and a contact configured to short the word line and the protection area.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: July 6, 2010
    Assignee: Spansion LLC
    Inventors: Wei Zheng, Jean Yang, Mark Randolph, Ming Kwan, Yi He, Zhizheng Liu, Meng Ding