Abstract: The disclosure provides a motherboard including a first communication interface and a switch module. The first communication interface obtains a power signal from a second communication interface of a display, the switch module obtains the power signal, and the switch module controls a first power supply to power supply for the USB communication module. The disclosure also provides a computer control system including the motherboard. The motherboard and the computer control system control the computer to save energy via a display.

Abstract: An indication system indicates a first power supply unit and a second power supply unit working in a first operation mode or a second operation mode. The indication system includes a power distribution board, a motherboard, and an indication unit. When the motherboard determines that the power supply units are working in the first operation mode, the motherboard outputs a first signal to light a first light-emitting diode of the indication unit. When the motherboard determines that the power supply units are working in the second operation mode, the motherboard outputs a second signal to make a second light-emitting diode of the indication unit flicker.

Abstract: A control circuit includes a control module, a trigger module and an unlock module. The control circuit is coupled to a power supply. The trigger module outputs different signals to the control module to activate or inactivate the power supply. The control circuit locks the status of the control circuit in a preset time since the power supply is activated. Thus, no matter what signal the trigger module outputs to the control module, the control module continues activating the power supply. The unlock module is used to output an unlock signal to the control module to unlock the status of the control circuit.

Abstract: A control system for a plurality of hard disks includes a chip unit, a first storage unit, and a second storage unit. The chip unit includes a first, second, and third GPIO pin and a firmware. The first storage unit is coupled to the chip unit and a plurality of hard disks. The second storage unit is coupled to the chip unit and a plurality of hard disks. When the first GPIO of the chip unit receives a power on signal, the firmware carries out a staggered spin-up function, the second GPIO of the chip unit outputs a first signal to the first storage unit, the hard disks of the first storage unit execute spin up, after a preset delay time, the third GPIO of the chip unit outputs a second signal to the second storage unit, and the hard disks of the second storage unit execute spin up.

Abstract: A motherboard includes a first signal module and a second signal module, a first switch module and a second switch module, a first enable module and a second enable module, an input interface, and a control module. The control module outputs different control signal to the first and second switch modules. The first switch is used to connect the first enable module to the first signal module or to the input interface corresponding to the control signals. The second switch is used to connect the second enable module to the second signal module or to the input interface corresponding to the control signals.

Abstract: A hot swap system applied in an electronic device includes a plurality of expansion cards and a plurality of electronic components coupled to the expansion cards. Each of the expansion cards includes an expansion chip, a time delay unit, and a switch unit. The time delay unit is electrically coupled to the expansion chip, and outputs a delay signal to the expansion chip to control the expansion chip not operate within a preset time. The switch unit can operate and transmit signal between the corresponding expansion card and the plurality of electronic components after preset time. Therefore, the hot swap system can operate normally, even when one of the expansion cards is inserted suddenly.

Abstract: A control circuit for a fan includes a temperature sensor, a fan controller, a first power supply unit, a second power supply unit, and a control unit. The second power supply unit supplies power to the fan, controlled by the control unit, when an electronic device is powered on. The first power supply unit supplies power to the fan controlled by the control unit, when the electronic device is in a standby mode.

Abstract: A control circuit for controlling a cooling fan is defined in a data center. The control circuit includes a cooling fan, a controller, a switch unit, and a control unit. The controller is configured to generate a first pulse width modulation (PWM) signal for controlling the cooling fan to rotate at a first speed and the control unit is configured to generate a second PWM signal for controlling the cooling fan to rotate at a second speed. The switch unit is configured to output the first PWM signal to the cooling fan when the data center is in an active mode and configured to output the second PWM signal to the cooling fan when the data center is in a standby mode.

Abstract: A firmware updating method in just a bunch of disks includes the following blocks. A motherboard is coupled to a first primary storage extension chip or to a second primary storage extension chip. The first primary storage extension chip and the second primary storage extension chip are coupled to each other. At least one secondary storage extension chip is coupled to the first primary storage extension chip. At least one secondary storage extension chip is coupled to the second primary storage extension chip. A signal sent to the first primary storage extension chip or to the second primary storage extension chip by the motherboard causes firmware of each storage extension chip to be updated.

Abstract: A computer I/O port system includes a CPU, a plurality of switches and a plurality of I/O ports connecting with each other by PCI Express buses. A first switch receives a pair of PCI Express signals from the CPU, converts them into a plurality of pairs of PCI Express signals and sends one pair thereof to a first I/O port and another pair thereof the a second switch. The second switch converts the another pair of PCI Express signals into a plurality of pairs of PCI Express signals and sends one pair thereof to a second I/O port and another pair to a third switch and so on until a last switch converts the pair of PCI Express signals it receives into a plurality of pairs of PCI Express signals and sends one pair thereof to a last I/O port. The I/O ports are USB ports.

Abstract: An expansion control circuit includes a delay circuit coupled to a first expansion module and a switching circuit coupled to a second expansion module. The switching circuit includes a buffer and a switching module. The buffer is coupled to the first expansion module. The first expansion module outputs a first control signal upon being switched on and outputs a second control signal after a working time. The delay circuit outputs a disconnecting signal upon being switched on. The buffer is switched off upon receiving the disconnect signal. The delay circuit further outputs a connecting signal after a delay time after outputting the disconnecting signal. The buffer is switched on upon receiving the connect signal. The buffer further outputs the second control signal to the switching module upon being switched on. The switching module controls the second expansion module to be switched on v receiving the second control signal.

Abstract: A fan control circuit includes a power supply module, a timing circuit, and a switching circuit. The switching circuit is coupled to the timing circuit and is configured to couple to a fan module. The power supply module is coupled to the switching circuit and is capable of supplying power to the fan module via the switching circuit. The timing circuit is configured to output a first control signal to the switching circuit after receiving an input starting signal. The switching circuit is configured to deactivate after receiving the first control signal, thereby enabling the power supply module to stop supplying power to the fan module.

Abstract: A fan detection and control circuit for a storage device includes an extension chip configured to output a control signal, a plurality of transmission units, a plurality of control units and a fan detection and control chip electrically coupled to the extension chip, the transmission units and the control units. Each transmission unit corresponds to a fan. Each control unit is electrically coupled to a transmission unit from amongst the plurality of transmission units. The fan detection and control chip receives the control signal and outputs a pulse signal and a detection signal via the transmission units and the control units. When the fan is connected to the corresponding transmission unit and operating normally, the fan detection and control chip outputs a first type detection signal to the corresponding control unit, and the control unit outputs a first state signal to indicate the fan is operating normally.

Abstract: A booting system for a crashed motherboard includes a BIOS (Basic Input/Output System) chip, and a south bridge chip. The BIOS chip stores a plurality of boot procedures. The south bridge chip is coupled to the BIOS chip and includes a cache module. The cache module loads the plurality of boot procedures from the BIOS chip when the motherboard is powered on. When the motherboard crashes, the south bridge chip can load the plurality of boot procedures from the cache module to power on or repower the motherboard.

Abstract: A booting system for a crashed motherboard includes a BIOS (Basic Input/Output System) chip, and a south bridge chip. The BIOS chip stores a plurality of boot procedures. The south bridge chip is coupled to the BIOS chip and includes a cache module. The cache module loads the plurality of boot procedures from the BIOS chip when the motherboard is powered on. When the motherboard crashes, the south bridge chip can load the plurality of boot procedures from the cache module to power on or repower the motherboard.

Abstract: A storage device includes a primary storage extension chip, a plurality of secondary storage extension chips, and a plurality of resistors. Each of the storage extension chips includes two data pins, a plurality of general purpose input/output (GPIO) pins, and a firmware. Each of the GPIO pins is connected to a power terminal through one resistor, and is grounded through a resistor, for setting a firmware version number of storage extension chips. The primary storage extension chip determines whether the version number of each secondary storage extension chip is same as that of the primary storage extension chip. If the version number is different from that of the primary storage extension chip, the firmware version number of the primary storage extension chip is applied to the secondary storage extension chip.

Abstract: The disclosure provides a detecting circuit including a controller and a light emitting diode (LED). The controller obtains a plurality of sequence signals output by a plurality of sequence signal terminals of the motherboard. The LED is electrically coupled to the controller. When the controller obtains a sequence signal from one of the sequence signal terminals of the motherboard, the controller outputs a first control signal to the LED, and the LED flashes once. An electronic device including the detecting circuit is also provided.

Abstract: A network attached storage (NAS) device includes a control unit, a wireless communication unit, a switch unit, a voltage conversion circuit, a battery unit, and a storage unit. When the wireless communication unit receives a request to access the storage unit, the wireless communication unit outputs a first control signal to activate the switch unit, the battery unit powers the voltage conversion circuit through the switch unit, and the voltage conversion circuit supplies power to the control unit and the storage unit. Until the wireless communication unit receives the request, the wireless communication unit outputs a second control signal to deactivate the switch unit, the battery unit cannot power the voltage conversion circuit through the switch unit, and the voltage conversion circuit does not supply power the control unit and the storage unit.

Abstract: A storage device includes an extension chip and an energy-efficiency control circuit. The extension chip includes an input interface electrically coupled to a motherboard and an output interface. The energy-efficiency control circuit is electrically coupled between the motherboard and the extension chip. The energy-efficiency control circuit includes an interface module, a control module, and a switch module. The interface module is electrically coupled to the input interface of the extension chip, and configured to receive a control signal from the motherboard. The control module is electrically coupled to the interface module, to configured receive the control signal, and to output an output signal according to the control signal received. The switch module is electrically coupled to the control module and a first power supply terminal, to receive the output signal, and to output a voltage of the first power supply terminal to a storage unit.

Abstract: A switch circuit for a just a bunch of disks (JBOD) includes a selection module, a trigger module, a delay module, and a control module. The selection module is configured to receive a button signal. The trigger module is coupled to the selection module to receive a selection signal and output a power on trigger signal or a power off trigger signal. The delay module is configured to receive the button signal and output a delay signal after a preset time. The control module is coupled between the delay module and the selection module to receive the delay signal and then output a control signal to the selection module. The disclosure further provides a JBOD.