Abstract: A complementary metal oxide semiconductor (CMOS) data reset circuit includes a control unit, a south bridge chip including a reset pin electrically coupled to the control unit, and a indicating unit electrically coupled between the control unit and the south bridge chip. The control unit outputs a control signal to the reset pin and the indicating unit to cause resetting of the CMOS data by the south bridge chip and the indicating unit indicates the resetting of CMOS data as it takes place.

Abstract: A switching device able to switch between communication modes includes a processor, a universal serial bus (USB) communication module, a serial communication module, and a control module. When a USB interface of the USB communication module is electrically coupled to a first electronic device, the control module outputs a first control signal to a control chipset of the serial communication module. The control chipset of the serial communication module is turned off. The processor can communicate with the first electronic device through the USB communication module.

Abstract: A server includes a chassis having a base and a cover, a switch mounted on the chassis, and a motherboard. The motherboard includes a control circuit and a power-on pin. The control circuit includes a switch unit, and the switch unit includes a first buffer, a switch chip and a jumper. When the cover is detached from the base, the switch outputs a first signal to the first buffer, and the first buffer outputs the first signal to the switch chip. The switch chip outputs the first signal to the power-on pin, and the server is powered off. When the base is covered by the cover, the switch outputs a third signal to the first buffer and the first buffer outputs the third signal to the switch chip. The switch chip outputs the third signal to the power-on pin, and the server is powered on.

Abstract: A motherboard includes a host chip, switch chip, and a number of components having different inter integrated circuit (12C) interfaces. The switch chip couples to the host chip through a first 12C bus. The components having different 12C interfaces can couple to the switch chip through different 12C buses.

Abstract: A program loading system effective for several different types of motherboard includes a first storage module, a first control module, first switch module, and a type module. The first control module is coupled between the first storage module and the first switch module. The first switch module is coupled between the first switch module and the type module. When a program stored in the first storage module is needed to be loaded, the first switch module is turned on. The type module outputs a motherboard type signal to the first control module through the first switch module. The first control module loads the program selectively according to the type signal received.

Abstract: The disclosure storage device provides a hard disk drive (HDD) module, the HDD module includes a plurality of HDD units, and each the HDD unit include a plurality of HDDs, a switching unit, and a plurality of indication units. The switching unit configured for operating in a first state or a second state. Each indication unit is configured to electrically couple to the switching unit. When the switching unit outputs a first state signal, the switch control circuit outputs a first control signal to turn off the corresponding indicating control circuits. When the switch control circuit operates in the second state, the switch control circuit outputs a second control signal to turn on the corresponding indicating control circuits. An electronic device using the same is also provided.

Abstract: A power supply circuit applied in an electronic device includes a first power source interface, a second power source interface, a power terminal, a switch unit, and a delay unit. The first power source interface is coupled to the power terminal The second power source interface is coupled to the power terminal through the switch unit. The power terminal can supply power to the first power source interface, and supply power to the second power source interface through the first delay unit and the first switch unit, after a preset time delayed by the first delay unit.

Abstract: An indication circuit indicates a first power supply unit and a second power supply unit working in either a 1+1 or a 2+0. The indication circuit includes a first MCU, a second MCU, a first light-emitting diode, and a second light-emitting diode. When the first MCU and the second MCU determine that the power supply units are working in the first operation mode, the first light-emitting diode and second light-emitting diode are made to flicker synchronously. When it is determined that the power supply units are working in the second operation mode, the diodes are made to flicker asynchronously.

Abstract: A restart system includes a control device and an electronic device. The electronic device includes a motherboard and a PCI Express device. The motherboard includes a control chip, a PCI Express slot and a hot-swap chip. When the motherboard does not identify the PCI Express device electrically coupled to the PCI Express slot, the control device outputs a signal to the control chip. The control chip outputs a first control signal to the hot-swap chip and outputs a second control signal to the PCI Express device. After receiving the first control signal, the hot-swap chip is restarted. In restarting of the hot-swap chip, when the hot-swap chip is powered off, the hot-swap chip does not power the PCI Express device, and when the hot-swap chip is powered on, the hot-swap chip powers the PCI Express device. After receiving the second control signal, the PCI Express device is restarted.

Abstract: A switch circuit includes a voltage follower module, a comparison module and a switch module coupled to the voltage follower module, the comparison module and a power supply. The voltage follower can receive a first control signal and a second control signal. The comparison module can receive the first control signal and the second control signal. The comparison module compares a voltage of the first control signal and the second control signal with a reference voltage. When the comparison module outputs a first signal to turn on the switch module, the first power supply unit and the second power supply unit work in the first operation mode. When the comparison module outputs a second signal to turn off the switch module, the first power supply unit and the second power supply unit work in the second operation mode.

Abstract: A debugging circuit comprises a debugging interface, a switch unit coupled to the debugging interface, a controller coupled to the switch unit, a platform controller hub (PCH), and a central processing unit (CPU). The PCH and the CPU are coupled to the switch unit. The debugging interface is coupled between the switch unit and a debugging device. The switch unit receives a control signal from the controller, and selectively outputs a first data signal from the PCH or a second data signal from the CPU to the debugging device through the debugging interface according to the control signal.

Abstract: An expansion card includes a peripheral component interconnect express (PCIe) slot, a PCI expansion controller, a PCIe/serial advanced technology attachment (PCIe/SATA) converter, a hard disk drive (HDD) controller, and a storage chip. An edge connector is arranged on a bottom side of the expansion card and includes power pins, ground pins, and signal pins. The power pins are connected to power pins of the PCIe slot, the PCIe expansion controller, the PCIe/SATA converter, the HDD controller, and the storage chip. The signal pins are connected to the PCIe expansion controller. The PCIe expansion controller expands a PCI signal into PCI signals and provides the PCI signals to the PCIe slot and the PCIe/SATA converter. The PCIe/SATA converter converts the PCI signal to SATA signals and provides the SATA signals to the HDD controller. The HDD controller controls the storage chip to read or write data.

Abstract: A storage device includes a connector with first to ninth pins, a serial advanced technology attachment (SATA) control chip, a universal serial bus (USB) control chip, and a storage chip. Voltage terminals of the SATA control chip, the USB control chip, and the storage chip are connected to the first pin of the connector. Second, third, fifth, and sixth signal terminals of the SATA control chip are connected to the fifth pin, the sixth pins, the eighth pin, and the ninth pin of the connector, respectively. Output terminals of the SATA control chip and the USB control chip are connected to a signal terminal of the storage chip. Second, third, fifth, sixth, eighth, and ninth signal terminals of the USB control chip are connected to the second pin, the third pin, the fifth pin, the sixth pin, the eighth pin, and the ninth pin of the connector, respectively.

Abstract: A serial advanced technology attachment (SATA) module includes a number of circuit boards and a number of SATA devices. Each of the circuit boards includes an expansion microchip. The expansion microchip includes an input terminal, an output terminal and an expansion terminal. The expansion microchips are electrically connected in series with the input terminal of one expansion microchip connecting to the expansion terminal of another expansion microchip. The input terminal of a front expansion terminal positioned at a first end of the expansion microchips is configured to connect to a SATA controller. Each of the SATA devices is electrically connected to the output terminal of one expansion microchip and configured to transmit data with the SATA controller by the corresponding expansion microchip.

Abstract: A serial advanced technology attachment dual in-line memory module device includes first and second electronic switches, a voltage detecting circuit, a power circuit, and an edge connector. The edge connector includes first to third power pins and first and second notches. The first power pins are connected to an input terminal of the voltage detecting circuit. An output terminal of the voltage detecting circuit is connected to first terminals of the first and second electronic switches. The second power pins are connected to the second terminal of the first electronic switch. The third power pins are connected to the second terminal of the second electronic switch. The third terminals of the first and second electronic switches are connected together and also connected to the power circuit.

Abstract: A serial advanced technology attachment dual in-line memory module (SATA DIMM) device includes a circuit board. A storage chip is arranged on the circuit board and stores a first firmware. A memory is arranged on the circuit board and stores a second firmware. A control chip is arranged on the circuit board and connected to the memory, to read the second firmware from the memory and load the second firmware in the storage chip when the first firmware stored in the storage chip is damaged. The control chip is also connected to the storage chip, to control the storage chip to read or to write data.

Abstract: A serial advanced technology attachment dual in-line memory module (SATA DIMM) device includes a circuit board. A storage chip is arranged on the circuit board and stores a first firmware. A memory is arranged on the circuit board and stores a second firmware. A control chip is arranged on the circuit board and connected to the memory, to read the second firmware from the memory and load the second firmware in the storage chip when the first firmware stored in the storage chip is damaged. The control chip is also connected to the storage chip, to control the storage chip to read or to write data.

Abstract: An expansion card includes a peripheral component interconnect express (PCIe) slot, a PCI expansion controller, a PCIe/serial advanced technology attachment (PCIe/SATA) converter, a hard disk drive (HDD) controller, and a storage chip. An edge connector is arranged on a bottom side of the expansion card and includes power pins, ground pins, and signal pins. The power pins are connected to power pins of the PCIe slot, the PCIe expansion controller, the PCIe/SATA converter, the HDD controller, and the storage chip. The signal pins are connected to the PCIe expansion controller. The PCIe expansion controller expands a PCI signal into PCI signals and provides the PCI signals to the PCIe slot and the PCIe/SATA converter. The PCIe/SATA converter converts the PCI signal to SATA signals and provides the SATA signals to the HDD controller. The HDD controller controls the storage chip to read or write data.

Abstract: A debugging circuit comprises a debugging interface, a switch unit coupled to the debugging interface, a controller coupled to the switch unit, a platform controller hub (PCH), and a central processing unit (CPU). The PCH and the CPU are coupled to the switch unit. The debugging interface is coupled between the switch unit and a debugging device. The switch unit receives a control signal from the controller, and selectively outputs a first data signal from the PCH or a second data signal from the CPU to the debugging device through the debugging interface according to the control signal.

Abstract: A storage device includes a connector with first to ninth pins, a serial advanced technology attachment (SATA) control chip, a universal serial bus (USB) control chip, and a storage chip. Voltage terminals of the SATA control chip, the USB control chip, and the storage chip are connected to the first pin of the connector. First to fourth signal terminals of the SATA control chip are connected to the fifth pin, the sixth pins, the eighth pin, and the ninth pin of the connector, respectively. Output terminals of the SATA control chip and the USB control chip are connected to a signal terminal of the storage chip. First to sixth signal terminals of the USB control chip are connected to the second pin, the third pin, the fifth pin, the sixth pin, the eighth pin, and the ninth pin of the connector, respectively.