Patents by Inventor Michael A. Warner

Michael A. Warner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060006693
    Abstract: A deck for use with a vehicle having a frame includes a platform. The platform has opposite upper and lower surfaces. The platform is operatively coupled to the frame of the vehicle for selective movement between a storage position, wherein the upper surface is disposed substantially underneath the vehicle and a use position wherein the upper surface is disposed alongside the vehicle for ingress and egress thereon. A stabilizer extends from the lower surface for supporting the platform above the ground while in the use position. The stabilizer is selectively height adjustable to maintain the upper surface in a generally horizontal position.
    Type: Application
    Filed: July 9, 2004
    Publication date: January 12, 2006
    Inventors: Anthony Anderson, Michael Warner
  • Publication number: 20050288609
    Abstract: A force applied to the foot of a patient causes the foot to rotate inwardly. After measuring the rotational displacement of the foot inwardly as the function of the applied force, the force is removed and the displacement of the foot is measured again. Next, a force is applied to the foot of the patient that causes the foot to rotate outwardly. After measuring the rotational displacement of the foot outwardly as a function of the applied force, the force is removed and the displacement of the foot is measured again. The displacements versus applied forces are plotted on a Cartesian coordinate system to produce a hysteresis curve. The data obtained and the hysteresis curve produced therefrom provides a quantitative measure of the motion quality and motion quantity of the foot and its corresponding ankle and is subject to detailed analytic and medical analysis.
    Type: Application
    Filed: June 23, 2005
    Publication date: December 29, 2005
    Inventors: Michael Warner, James Mertz
  • Publication number: 20050280134
    Abstract: A decoupling device (10) includes a plurality of capacitors having different capacitances (14,16,18) physically mounted in a package (12, 212), and terminals including at least one first terminal (24, 224) and at least one second terminal (26, 226) adapted for mounting the package to a circuit panel. The plural capacitors are connected in parallel between the first and second terminals so as to form plural circuits with different self-resonant frequencies. The device can be mounted as a unit on a circuit board with the first terminals connected to a power conductor and the second terminals connected to a ground conductor, and provides low impedance shunting of noise over a wide frequency spectrum.
    Type: Application
    Filed: June 16, 2005
    Publication date: December 22, 2005
    Applicant: Tessera, Inc.
    Inventors: David Gibson, Andy Stavros, Michael Warner
  • Patent number: 6959489
    Abstract: A method of making a microelectronic package includes providing a substrate having a plurality of conductive leads at a first surface of the substrate. The conductive leads may have first ends permanently attached to the substrate and second ends remote from the terminal ends, the second ends being movable relative to the first ends of the leads. One or more microelectronic elements having contact bearing surfaces and back surfaces remote therefrom may be juxtaposed with the substrate and the contacts connected with the first ends of the leads. A substantially rigid plate may be attached to the back surfaces of the microelectronic elements. The substantially rigid plate may be moved to a precise height above the substrate to vertically extend the leads. While the plate is maintained at the precise height above the substrate, a spacer material is dispensed between the plate and the substrate. The spacer material is then at least partially cured for holding the plate at the precise height above the substrate.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: November 1, 2005
    Assignee: Tessera, Inc.
    Inventors: Masud Beroz, Michael Warner
  • Publication number: 20050189635
    Abstract: Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as a transducer of at least one of acoustic energy and electromagnetic energy, and the chip including a plurality of bond pads exposed at one of the front and rear faces. The packaged chip includes a package element having a dielectric element and a metal layer disposed on the dielectric element, the package element having an inner surface facing the chip and an outer surface facing away from the chip. The metal layer includes a plurality of contacts exposed at at least one of the inner and outer surfaces, the contacts conductively connected to the bond pads.
    Type: Application
    Filed: March 1, 2005
    Publication date: September 1, 2005
    Applicant: Tessera, Inc.
    Inventors: Giles Humpston, Philip Osborn, Jesse Thompson, Yoichi Kubota, Chung-Chuan Tseng, Robert Burtzlaff, Belgacem Haba, David Tuckerman, Michael Warner
  • Publication number: 20050189622
    Abstract: Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as a transducer of at least one of acoustic energy and electromagnetic energy, and the chip including a plurality of bond pads exposed at one of the front and rear faces. The packaged chip includes a package element having a dielectric element and a metal layer disposed on the dielectric element, the package element having an inner surface facing the chip and an outer surface facing away from the chip. The metal layer includes a plurality of contacts exposed at at least one of the inner and outer surfaces, the contacts conductively connected to the bond pads.
    Type: Application
    Filed: March 1, 2005
    Publication date: September 1, 2005
    Applicant: Tessera, Inc.
    Inventors: Giles Humpston, Philip Osborn, Jesse Thompson, Yoichi Kubota, Chung-Chuan Tseng, Robert Burtzlaff, Belgacem Haba, David Tuckerman, Michael Warner
  • Publication number: 20050167814
    Abstract: A method of manufacturing a plurality of microelectronic packages including electrically and/or thermally conductive elements. The method includes providing a support structure having a plurality of protrusions and depressions extending outwardly from the support. A conductive element is then mated to the support structure in a male-to-female relationship. The depressions formed in the support structure and conductive element are used to house a microelectronic element such as a semiconductor chip. A substrate is provided so as to cover substantially each depression located in the conductive element. Leads interconnect contacts to the chip to terminals on the substrate. A curable encapsulant material may be deposited into the depression so as to protect and support the leads and the microelectronic element. Additionally, the curable encapsulant material forms part of the exterior of a single resulting chip package once the assembly is diced and cut into individual packages.
    Type: Application
    Filed: March 28, 2005
    Publication date: August 4, 2005
    Applicant: Tessera, Inc.
    Inventors: Masud Beroz, Bob Wen Kong, Michael Warner
  • Publication number: 20050128201
    Abstract: In one embodiment, a computer-implemented method comprises receiving a time period indication selected by a user for a group of objects including a plurality of data points. The plurality of data points are mapped to features selected by the user. Key frames are generated for the group of objects for each interval of time of the time period. Relations can be inserted between any pair of objects. The group of objects and relations are rendered using the key frames over the time period to generate an animation. An object position is offset during animation according to an elasticity variable associated with the relations that is selected by the user. Positions in between key frames are interpolated to provide smooth rendering between variable time frames. In an alternate embodiment, the object position is offset during animation according to features of the group of objects selected by the user, with or without the elasticity variable.
    Type: Application
    Filed: December 8, 2004
    Publication date: June 16, 2005
    Inventors: Michael Warner, Paul Pantera
  • Publication number: 20050087861
    Abstract: A packaged microelectronic device is provided which includes: (a) a unit having a chip with an upwardly-facing front surface and a downwardly-facing rear surface, a lid overlying at least a portion of the front surface of the chip, the lid having a top surface facing upwardly away from the chip and unit connections exposed at the top surface of the lid. At least some of the unit connections are electrically connected to the chip. The packaged microelectronic device also includes a package structure including structure defining package terminals, at least some of the package terminals being electrically connected to the chip. The package structure, the unit or both define a downwardly-facing bottom surface of the package, the terminals being exposed at the bottom surface.
    Type: Application
    Filed: September 24, 2004
    Publication date: April 28, 2005
    Applicant: Tessera, Inc.
    Inventors: Robert Burtzlaff, Belgacem Haba, Giles Humpston, David Tuckerman, Michael Warner, Craig Mitchell
  • Patent number: 6885106
    Abstract: A stacked microelectronic assembly includes a dielectric element and a first and second microelectronic element stacked one atop the other with the first microelectronic element disposed between the second microelectronic element and the dielectric. The dielectric element has opposed first and second surfaces with conductive features exposed at the first surface and terminals exposed on the second surface. Preferably, the contact-bearing face of the first microelectronic element confronts the first surface of the dielectric with at least some of the conductive features being movable with respect to the contacts or terminals. By providing such movable features, joining units have heights of about 300 microns or less may be joined to the terminals thereby reducing the overall height of the microelectronic assembly to 1.2 mm and less.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: April 26, 2005
    Assignee: Tessera, Inc.
    Inventors: Philip Damberg, Craig S. Mitchell, John B. Riley, Michael Warner, Joseph Fjelstad
  • Patent number: 6873039
    Abstract: A method of manufacturing a plurality of microelectronic packages including electrically and/or thermally conductive elements. The method includes providing a support structure having a plurality of protrusions and depressions extending outwardly from the support. A conductive element is then mated to the support structure in a male-to-female relationship. The depressions formed in the support structure and conductive element are used to house a microelectronic element such as a semiconductor chip. A substrate is provided so as to cover substantially each depression located in the conductive element. Leads interconnect contacts to the chip to terminals on the substrate. A curable encapsulant material may be deposited into the depression so as to protect and support the leads and the microelectronic element. Additionally, the curable encapsulant material forms part of the exterior of a single resulting chip package once the assembly is diced and cut into individual packages.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: March 29, 2005
    Assignee: Tessera, Inc.
    Inventors: Masud Beroz, Bob Wen Zhong Kong, Michael Warner
  • Publication number: 20050064626
    Abstract: A connection component for a microelectronic element includes a body of dielectric material having opposing first and second surfaces. A plurality of elongated leads extend through the body between the first and second surfaces. The leads have a first end accessible at the first surface and a second end accessible at the second surface. A layer of anisotropic conductive material overlies the first ends and the first surface of the body for electrical connection of the leads to a microelectronic element.
    Type: Application
    Filed: November 22, 2004
    Publication date: March 24, 2005
    Inventors: David Light, Paula Lagattuta Tostado, Michael Warner
  • Patent number: 6869535
    Abstract: There is disclosed a co-oxidation method and a reagent system of co-oxidation agents for removing from a contaminated zone below the ground surface a water-immiscible organic compound having a density greater than that of water from a contaminated zone below the ground surface, comprising the steps of (a) injecting into the contaminated zone a solution of at least one inorganic permanganate salt, (b) injecting into the zone a cosolvent compatible with the inorganic permanganate salt, (c) causing reaction of the permanganate salt with the water-immiscible organic compound, and (d) extracting co-oxidant from the contaminated zone, thereby diminishing the level of water-immiscible organic compound present in the contaminated zone.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: March 22, 2005
    Inventors: Robert Collins Cowdery, Joseph Linn Applegate, Kevin Michael Warner
  • Publication number: 20050046001
    Abstract: A packaged semiconductor chip includes features such as a chip carrier having a large thermal conductor which can be solder-bonded to a circuit board so as to provide enhanced thermal conductivity to the circuit board and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier. A module includes two circuits and an enclosure with a medial wall between the circuits to provide electromagnetic shielding between the circuits.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 3, 2005
    Applicant: Tessera, Inc
    Inventor: Michael Warner
  • Patent number: 6856007
    Abstract: A packaged semiconductor chip includes features such as a chip carrier having a large thermal conductor which can be solder-bonded to a circuit board so as to provide enhanced thermal conductivity to the circuit board and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier. A module includes two circuits and an enclosure with a medial wall between the circuits to provide electromagnetic shielding between the circuits.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: February 15, 2005
    Assignee: Tessera, Inc.
    Inventor: Michael Warner
  • Patent number: 6851915
    Abstract: The subject of the invention is a load handling device for an industrial truck having a lift frame, a lift carriage which can be displaced along the lift frame, and a reach carriage guided so as to move on the lift carriage. A load pick-up device is arranged on the reach carriage. According to the invention, the lift carriage is guided on the outer sides of the lift frame by rollers, and the reach carriage is guided on the outer sides of the lift carriage. In order to displace the reach carriage, a hydraulic reach cylinder is provided on each side of the lift frame and is fixed at one end to the lift carriage and at the other end to the reach carriage.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: February 8, 2005
    Assignee: Linde Aktiengesellschaft
    Inventors: Barry Michael Warner, David John Brown
  • Publication number: 20040262777
    Abstract: An ultra thin system-in-a-package (SIP) with independent test and repair capability comprises an interposer having arranged on a top surface and a bottom surface thereof a number of packaged semiconductor chips mounted via solder bumps in accordance with a Land Grid Array (LGA) format and wherein no underfill is used on the SIP.
    Type: Application
    Filed: October 10, 2003
    Publication date: December 30, 2004
    Applicant: Tessera, Inc.
    Inventors: Young-Gon Kim, David Gibson, Michael Warner, Philip Damberg, Philip Osborn
  • Publication number: 20040247506
    Abstract: A method for treating a flue emissions stream from a high-temperature industrial process in which the stream comprises an acid gas and particulates contaminated with a hazardous metal includes the steps of dry injecting into the stream a metal stabilizing agent in an amount sufficient to reduce leaching potential of the metal under natural or induced leaching conditions and an acid gas treating agent that comprises a reactive alkaline oxide powder (−400 mesh or smaller) having a surface area of at least about 35 m2/g, (when measured by BET) in an amount sufficient to remove at least 40% of the acid gas and to act as a pH control agent for the metal stabilizing aspect of the invention.
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Inventors: Ajit K. Chowdhury, Lane D. Tickanen, Michael Warner
  • Publication number: 20040238857
    Abstract: A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting upwardly from the plane of the plate. The assembly step places the rear surfaces of the chips on the bottom side of the connecting element into proximity with the thermal conductor and joins the conductive traces on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board. The leads provide robust electrical connections between the connecting element and the circuit board.
    Type: Application
    Filed: December 24, 2003
    Publication date: December 2, 2004
    Applicant: Tessera, Inc.
    Inventors: Masud Beroz, Michael Warner, Lee Smith, Glenn Urbish, Teck-Gyu Kang, Jae M. Park, Yoichi Kubota
  • Publication number: 20040238934
    Abstract: A packaged semiconductor chip includes features such as a chip carrier having a large thermal conductor which can be solder-bonded to a circuit panel so as to provide enhanced thermal conductivity to the circuit panel and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier.
    Type: Application
    Filed: February 20, 2004
    Publication date: December 2, 2004
    Applicant: Tessera, Inc.
    Inventors: Michael Warner, Lee Smith, Belgacem Haba, Glenn Urbish, Masud Beroz, Teck-Gyu Kang