Abstract: A non-flushing urinal system with a large sealing and flow area using a bell-shaped valve with supporting ribs on its interior surface, which utilizes low “crack pressure,” or ease of initial opening to create for high flow rate and superior sealing.

Abstract: A processor for supporting secure memory intent is disclosed. The processor of the disclosure includes a memory execution unit to access memory and a processor core coupled to the memory execution unit. The processor core is to receive a request to access a convertible page of the memory. In response to the request, the processor core to determine an intent for the convertible page in view of a page table entry (PTE) corresponding to the convertible page. The intent indicates whether the convertible page is to be accessed as at least one of a secure page or a non-secure page.

Abstract: A hybrid flushing system for water free urinals is presented with a housing having a wall portion forming a cavity for receiving a cartridge. The housing also includes a flushing fluid inlet portion for receiving a flushing fluid and a flushing fluid directing portion configured to direct the flushing fluid. A cartridge for installation into a housing is presented, including a cartridge wall, a flushing fluid receiving portion and a flushing fluid directing portion to direct flushing fluid received to any portion to clean areas of the housing, the cartridge, and connected plumbing. Steps for cleaning a hybrid flushing system are presented with an act of directing a flushing fluid into an area, where the area is one of a cartridge for a hybrid flushing system, a housing for a hybrid flushing system, and a plumbing system connected with the hybrid flushing system.

Abstract: Described is a fluid control valve for use in a urinal having a drip edge to direct fluid flow. The fluid control valve includes an outer sealing body wall surrounding a sealing area and a flexible membrane positioned within the sealing area. The flexible membrane creates a seal with the outer sealing body wall within the sealing area. The drip edge of the fluid control valve may be formed in the flexible membrane or the outer sealing body wall to direct fluid away from the fluid control valve to prevent formation of solids build-up. Additionally, the drip edge can direct fluid towards a flushing sensor to initiate a urinal flushing operation.

Abstract: A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.

Abstract: A visual indicator for denoting a fluid level in a throat portion of a waterless urinal cartridge is presented. The visual indicator comprises a fluid level indicator disposed in the throat portion of the cartridge. As material buildup occurs inside the cartridge, a corresponding rise in the fluid level in the throat of the cartridge may be seen relative to the indicator, indicating when the cartridge will need replacement. The visual indicator may comprise markings that indicate the level of fluid within the throat portion, reactive materials, or an electronic reader. The fluid level indicator may also be made visible by ultraviolet radiation.

Abstract: A fluid inlet portion for a waterless urinal cartridge is presented. The fluid inlet portion comprises to fluid director comprising a non-linear surface proximate a throat portion of the cartridge formed to impart a horizontal velocity component to fluid flowing through the throat portion of the cartridge to reduce vertical turbulence within the fluid. The fluid director can be formed so that it is in fluid communication with at least part of a fluid layer within the cartridge. The non-linear surface imparts a horizontal velocity component, thereby reducing disruption of the fluid layer by fluid flowing through the throat portion of the cartridge. The fluid director may be positioned within the cartridge to impart a substantially horizontal swirling motion to fluid within the cartridge. A fluid deflector proximate the fluid director can receive fluid from the fluid deflector and for re-directing the fluid from the fluid director.

Abstract: A fluid exit portion for a splash-reducing urinal cartridge is presented. The exit portion comprises a splash reducer for causing fluid to exit the cartridge in a splash-reduced manner. The splash reducer is generally in the form of a spout with a tapered exit area for accelerating and directing the fluid. The spout may comprise converting fins to urge fluid to collect in a progressively narrower channel. When the cartridge is installed into a housing, the splash reducer ensures that fluid exiting the cartridge transitions into the housing with minimal disturbance, substantially parallel to the housing. The splash reducer is formed of a flexible material or is hinged with respect to the cartridge body to allow for easy insertion into a housing.

Abstract: Described is a fluid control valve suitable to permit only gravitationally induced flow. The valve includes an inlet section in the form of a self-supporting trough-shaped section and an outlet section. The outlet section is formed from a flexible resilient material connected to the inlet section. The outlet section includes a sealing area with side gussets that hold a set of sealing surfaces of the sealing area apart from each other, where the sealing area is connected with the inlet section at its upper edge.

Abstract: A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual machine in a system that supports virtualization, and installing, in a graphics memory translation table, a physical guest graphics memory address to host physical memory address translation.

Abstract: Embodiments of an invention for memory management in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction and a second instruction. The execution unit is to execute the first instruction, wherein execution of the first instruction includes allocating a page in an enclave page cache to a secure enclave. The execution unit is also to execute the second instruction, wherein execution of the second instruction includes confirming the allocation of the page.

Abstract: A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.

Abstract: A processor for supporting secure memory intent is disclosed. The processor of the disclosure includes a memory execution unit to access memory and a processor core coupled to the memory execution unit. The processor core is to receive a request to access a convertible page of the memory. In response to the request, the processor core to determine an intent for the convertible page in view of a page table entry (PTE) corresponding to the convertible page. The intent indicates whether the convertible page is to be accessed as at least one of a secure page or a non-secure page.

Abstract: Embodiments of an invention for memory management in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction and a second instruction. The execution unit is to execute the first instruction, wherein execution of the first instruction includes allocating a page in an enclave page cache to a secure enclave. The execution unit is also to execute the second instruction, wherein execution of the second instruction includes confirming the allocation of the page.

Abstract: Embodiments of apparatuses and methods including virtual address memory range registers are disclosed. In one embodiment, a processor includes a memory interface, address translation hardware, and virtual memory address comparison hardware. The memory interface is to access a system memory using a physical memory address. The address translation hardware is to support translation of a virtual memory address to the physical memory address. The virtual memory address is used by software to access a virtual memory location in the virtual memory address space of the processor. The virtual memory address comparison hardware is to determine whether the virtual memory address is within a virtual memory address range.

Abstract: A processor for supporting secure memory intent is disclosed. The processor of the disclosure includes a memory execution unit to access memory and a processor core coupled to the memory execution unit. The processor core is to receive a request to access a convertible page of the memory. In response to the request, the processor core to determine an intent for the convertible page in view of a page table entry (PTE) corresponding to the convertible page. The intent indicates whether the convertible page is to be accessed as at least one of a secure page or a non-secure page.

Abstract: Embodiments of an invention for memory management in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction and a second instruction. The execution unit is to execute the first instruction, wherein execution of the first instruction includes allocating a page in an enclave page cache to a secure enclave. The execution unit is also to execute the second instruction, wherein execution of the second instruction includes confirming the allocation of the page.

Abstract: Embodiments of an invention for sharing memory in a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to match an offer to make a page in an enclave page cache shareable to a bid to make the page shareable. The execution unit is to execute the instruction. Execution of the instruction includes making the page shareable.

Abstract: A protected graphics module can send its output to a display engine securely. Secure communications with the display can provide a level of confidentiality of content generated by protected graphics modules against software and hardware attacks.

Abstract: Secure memory repartitioning technologies are described. A processor includes a processor core and a memory controller coupled between the processor core and main memory. The main memory includes a memory range including a section of convertible pages that are convertible to secure pages or non-secure pages. The processor core, in response to a page conversion instruction, is to determine from the instruction a convertible page in the memory range to be converted and convert the convertible page to be at least one of a secure page or a non-secure page. The memory range may also include a hardware reserved section that is convertible in response to a section conversion instruction.