Patents by Inventor Michael Goldsmith

Michael Goldsmith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9286235
    Abstract: Embodiments of apparatuses and methods including virtual address memory range registers are disclosed. In one embodiment, a processor includes a memory interface, address translation hardware, and virtual memory address comparison hardware. The memory interface is to access a system memory using a physical memory address. The address translation hardware is to support translation of a virtual memory address to the physical memory address. The virtual memory address is used by software to access a virtual memory location in the virtual memory address space of the processor. The virtual memory address comparison hardware is to determine whether the virtual memory address is within a virtual memory address range.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: March 15, 2016
    Assignee: Intel Corporation
    Inventors: Gur Hildesheim, Shlomo Raikin, Ittai Anati, Gideon Gerzon, Uday Savagaonkar, Francis Mckeen, Carlos Rozas, Michael Goldsmith, Prashant Dewan
  • Patent number: 9276750
    Abstract: Embodiments of an invention for secure processing environment measurement and attestation are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction associated with a build or a rebuild of a secure enclave. The execution unit is to execute the first instruction. Execution of the first instruction, when associated with the build, includes calculation of a first measurement and a second measurement of the secure enclave. Execution of the first instruction, when associated with the rebuild, includes calculation of the second measurement without calculation of the first measurement.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: March 1, 2016
    Assignee: Intel Corporation
    Inventors: Vincent R. Scarlata, Carlos Rozas, Simon Johnson, Uday Savagaonkar, Rebekah Leslie-Hurd, Barry Huntley, Vedvyas Shanbhogue, Ittai Anati, Francis McKeen, Michael Goldsmith, William Wood, Shay Gueron
  • Publication number: 20160042184
    Abstract: Embodiments of an invention for logging in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction having an associated enclave page cache address. The execution unit is to execute the instruction without causing a virtual machine exit, wherein execution of the instruction includes logging the instruction and the associated enclave page cache address.
    Type: Application
    Filed: October 21, 2015
    Publication date: February 11, 2016
    Applicant: Intel Corporation
    Inventors: Francis X. Mckeen, Michael A. Goldsmith, Barrey E. Huntley, Simon P. Johnson, Rebekah M. Leslie-Hurd, Carlos V. Rozas, Uday R. Savagaonkar, Vincent R. Scarlata, Vedvyas Shanbhogue, Wesley H. Smith, Gilbert Neiger
  • Publication number: 20160012565
    Abstract: A protected graphics module can send its output to a display engine securely. Secure communications with the display can provide a level of confidentiality of content generated by protected graphics modules against software and hardware attacks.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Inventors: Siddhartha Chhabra, Uday R. Savagaonkar, Prashant Dewan, Michael A. Goldsmith, David M. Durham
  • Patent number: 9189411
    Abstract: Embodiments of an invention for logging in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction having an associated enclave page cache address. The execution unit is to execute the instruction without causing a virtual machine exit, wherein execution of the instruction includes logging the instruction and the associated enclave page cache address.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Francis X. Mckeen, Michael A. Goldsmith, Barrey E. Huntley, Simon P. Johnson, Rebekah Leslie, Carlos V. Rozas, Uday R. Savagaonkar, Vincent R. Scarlata, Vedvyas Shanbhogue, Wesley H. Smith
  • Patent number: 9183161
    Abstract: An apparatus and method for managing a protection table by a processor. For example, a processor according to one embodiment of the invention comprises: protection table management logic to manage a protection table, the protection table having an entry for each protected page or each group of protected pages in memory; wherein the protection table management logic prevents direct access to the protection table by user application program code and operating system program code but permits direct access by the processor.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: November 10, 2015
    Assignee: INTEL CORPORATION
    Inventors: Gur Hildesheim, Ittai Anati, Hisham Shafi, Shlomo Raikin, Gideon Gerzon, Uday R Savagaonkar, Carlos V Rozas, Francis X McKeen, Michael A Goldsmith, Dewan Prashant
  • Patent number: 9177353
    Abstract: A protected graphics module can send its output to a display engine securely. Secure communications with the display can provide a level of confidentiality of content generated by protected graphics modules against software and hardware attacks.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 3, 2015
    Assignee: Intel Corporation
    Inventors: Siddhartha Chhabra, Uday R. Savagaonkar, Prashant Dewan, Michael A. Goldsmith, David M. Durham
  • Publication number: 20150301945
    Abstract: A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual machine in a system that supports virtualization, and installing, in a graphics memory translation table, a physical guest graphics memory address to host physical memory address translation.
    Type: Application
    Filed: May 13, 2015
    Publication date: October 22, 2015
    Inventors: Kiran S. Panesar, Michael A. Goldsmith
  • Patent number: 9134878
    Abstract: A device and method for securely rendering content on a gesture-enabled computing device includes initializing a secure execution environment on a processor graphics of the computing device. The computing device transfers view rendering code and associated state data to the secure execution environment. An initial view of the content is rendered by executing the view rendering code in the secure execution environment. A gesture is recognized, and an updated view of the content is rendered in the secure execution environment in response to the gesture. The gesture may include a touch gesture recognized on a touch screen, or a physical gesture of the user recognized by a camera. After the updated view of the content is rendered, the main processor of the computing device may receive updated view data from the secure execution environment.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: September 15, 2015
    Assignee: Intel Corporation
    Inventors: Prashant Dewan, Siddhartha Chhabra, Xiaozhu Kang, Xiaoning Li, Uday R. Savagaonkar, David M. Durham, Paul S. Schmitz, Michael A. Goldsmith, Jason Martin
  • Publication number: 20150204710
    Abstract: A visual indicator for denoting a fluid level in a throat portion of a waterless urinal cartridge is presented. The visual indicator comprises a fluid level indicator disposed in the throat portion of the cartridge. As material buildup occurs inside the cartridge, a corresponding rise in the fluid level in the throat of the cartridge may be seen relative to the indicator, indicating when the cartridge will need replacement. The visual indicator may comprise markings that indicate the level of fluid within the throat portion, reactive materials, or an electronic reader. The fluid level indicator may also be made visible by ultraviolet radiation.
    Type: Application
    Filed: May 28, 2014
    Publication date: July 23, 2015
    Inventor: Edward Michael Goldsmith
  • Patent number: 9087200
    Abstract: A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: July 21, 2015
    Assignee: Intel Corporation
    Inventors: Francis X. McKeen, Carlos V. Rozas, Uday R. Savagaonkar, Simon P. Johnson, Vincent Scarlata, Michael A. Goldsmith, Ernie Brickell, Jiang Tao Li, Howard C. Herbert, Prashant Dewan, Stephen J. Tolopka, Gilbert Neiger, David Durham, Gary Graunke, Bernard Lint, Don A. Van Dyke, Joseph Cihula, Stalinselvaraj Jeyasingh, Stephen R. Van Doren, Dion Rodgers, John Garney, Asher Altman
  • Publication number: 20150188710
    Abstract: Embodiments of an invention for offloading functionality from a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to initialize a secure enclave. The execution unit is to execute the instruction. Execution of the instruction includes verifying that a signature structure key matches a hardware key that permits functionality to be offloaded.
    Type: Application
    Filed: December 28, 2013
    Publication date: July 2, 2015
    Inventors: Simon Johnson, Francis McKeen, Vincent Scarlata, Carlos Rozas, Uday Savagaonkar, Michael Goldsmith, Ernie Brickell
  • Publication number: 20150186659
    Abstract: Embodiments of an invention for modifying memory permissions in a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to modify access permissions for a page in a secure enclave. The execution unit is to execute the instruction. Execution of the instruction includes setting new access permissions in an enclave page cache map entry. Furthermore, the page is immediately accessible from inside the secure enclave according to the new access permissions.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 2, 2015
    Inventors: Rebekah LESLIE-HURD, Ilya ALEXANDROVICH, Ittai ANATI, Alex BERENZON, Michael GOLDSMITH, Simon JOHNSON, Francis MCKEEN, Carlos ROZAS, Uday SAVAGAONKAR, Vincent SCARLATA, Vedvyas SHANBHOGUE, Wesley SMITH
  • Publication number: 20150186272
    Abstract: Embodiments of an invention for sharing memory in a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to match an offer to make a page in an enclave page cache shareable to a bid to make the page shareable. The execution unit is to execute the instruction. Execution of the instruction includes making the page shareable.
    Type: Application
    Filed: December 28, 2013
    Publication date: July 2, 2015
    Inventors: Michael Goldsmith, Carlos Rozas, Vincent Scarlata
  • Patent number: 9058292
    Abstract: A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual machine in a system that supports virtualization, and installing, in a graphics memory translation table, a physical guest graphics memory address to host physical memory address translation.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: June 16, 2015
    Assignee: INTEL CORPORATION
    Inventors: Kiran S. Panesar, Michael A. Goldsmith
  • Publication number: 20150089173
    Abstract: Secure memory repartitioning technologies are described. A processor includes a processor core and a memory controller coupled between the processor core and main memory. The main memory includes a memory range including a section of convertible pages are convertible to secure pages or non-secure pages. The processor core, in response to a page conversion instruction, is to determine from the instruction a convertible page in the memory range to be converted and convert the convertible page to be at least one of a secure page or a non-secure page. The memory range may also include a hardware reserved section are convertible in response to a section conversion instruction.
    Type: Application
    Filed: September 24, 2013
    Publication date: March 26, 2015
    Inventors: Siddhartha Chhabra, Uday R. Savagaonkar, Michael A. Goldsmith, Simon P. Johnson, Rebekah M. Leslie-Hurd, Francis X. McKeen, Gilbert Neiger, Raghunandan Makaram, Carlos V. Rozas, Amy L. Santoni, Vincent R. Scarlata, Vedvyas Shanbhogue, Wesley H. Smith, Ittai Anati, Ilya Alexandrovich
  • Publication number: 20150033012
    Abstract: Embodiments of an invention for secure processing environment measurement and attestation are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction associated with a build or a rebuild of a secure enclave. The execution unit is to execute the first instruction. Execution of the first instruction, when associated with the build, includes calculation of a first measurement and a second measurement of the secure enclave. Execution of the first instruction, when associated with the rebuild, includes calculation of the second measurement without calculation of the first measurement.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 29, 2015
    Inventors: Vincent R. Scarlata, Carlos Rozas, Simon Johnson, Uday Savagaonkar, Rebekah Leslie-Hurd, Barry Huntley, Vedvyas Shanbhogue, Ittai Anati, Francis McKeen, Michael Goldsmith, William Wood, Shay Gueron
  • Publication number: 20150033316
    Abstract: Embodiments of an invention for feature licensing in a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to initialize a secure enclave. The execution unit is to execute the instruction. Execution of the instruction includes determining whether a requested feature is licensed for use in the secure enclave.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 29, 2015
    Inventors: Vincent Scarlata, Carlos Rozas, Simon Johnson, Uday Savagaonkar, Ittai Anati, Francis McKeen, Michael Goldsmith
  • Publication number: 20140352044
    Abstract: A fluid exit portion for a splash-reducing urinal cartridge is presented. The exit portion comprises a splash reducer for causing fluid to exit the cartridge in a splash-reduced manner. The splash reducer is generally in the form of a spout with a tapered exit area for accelerating and directing the fluid. The spout may comprise converting fins to urge fluid to collect in a progressively narrower channel. When the cartridge is installed into a housing, the splash reducer ensures that fluid exiting the cartridge transitions into the housing with minimal disturbance, substantially parallel to the housing. The splash reducer is formed of a flexible material or is hinged with respect to the cartridge body to allow for easy insertion into a housing.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 4, 2014
    Inventor: Edward Michael Goldsmith
  • Publication number: 20140352047
    Abstract: A hybrid flushing system for water free urinals is presented with a housing having a wall portion forming a cavity for receiving a cartridge. The housing also includes a flushing fluid inlet portion for receiving a flushing fluid and a flushing fluid directing portion configured to direct the flushing fluid. A cartridge for installation into a housing is presented, including a cartridge wall, a flushing fluid receiving portion and a flushing fluid directing portion to direct flushing fluid received to any portion to clean areas of the housing, the cartridge, and connected plumbing. Steps for cleaning a hybrid flushing system are presented with an act of directing a flushing fluid into an area, where the area is one of a cartridge for a hybrid flushing system, a housing for a hybrid flushing system, and a plumbing system connected with the hybrid flushing system.
    Type: Application
    Filed: April 28, 2014
    Publication date: December 4, 2014
    Inventor: Edward Michael Goldsmith