Patents by Inventor Michael Shore

Michael Shore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of continuously rolling a product exiting from an upstream roll stand at a velocity higher than the take in velocity of a downstream roll stand
    Patent number: 7093472
    Abstract: A method is disclosed for continuously rolling a product exiting from an upstream roll stand at a delivery velocity V1 higher than the take in velocity V3 of a downstream roll stand. The excess product resulting from the velocity differential between V1 and V3 is temporarily accumulated between the roll stands.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: August 22, 2006
    Assignee: Morgan Construction Company
    Inventors: T. Michael Shore, Maurice E. Gauthier
  • Laying head bearing with offset preloading
    Patent number: 7086783
    Abstract: A bearing assembly is disclosed for rotatably supporting a quill in the housing of a rolling mill laying head. The bearing assembly includes first and second axially spaced roller bearing sets interposed between the quill and the housing. The bearing assembly also includes a force exerting unit for applying a radial preloading force to the first bearing set at a first location around the circumference thereof. The preloading force is opposed by a reactionary force acting on the second bearing set at a second location around the circumference thereof disposed 180° from the first location.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: August 8, 2006
    Assignee: Morgan Construction Company
    Inventors: T. Michael Shore, James F. Walsh
  • Bar delivery system and method
    Patent number: 7069759
    Abstract: A method and system are disclosed for receiving a hot rolled bar product from a rolling mill, and for delivering the bar product to a cooling bed. A shear subdivides the bar product into bar segments and alternately directs the bar segments to one or the other of two downstream intermediate paths for continued travel thereon. A switch on each of said intermediate paths alternately directs bar segments traveling thereon to one or the other of two respective downstream delivery paths for continued travel thereon to the cooling bed. Decelerators slow the bar segments traveling along the delivery paths.
    Type: Grant
    Filed: November 5, 2003
    Date of Patent: July 4, 2006
    Assignee: Morgan Construction Company
    Inventors: T. Michael Shore, Matthew Palfreman
  • Method and apparatus for decelerating and temporarily accumulating a hot rolled product
    Patent number: 7021103
    Abstract: A method and apparatus is disclosed for decelerating and temporarily accumulating a hot rolled product moving longitudinally along a receiving axis at a first velocity V1. The product is directed through a curved guide having an entry end aligned with the receiving axis to receive the product, and an exit end spaced radially from the receiving axis and oriented to deliver the product in an exit direction transverse to the receiving axis. The curved guide is rotated about the receiving axis in a direction opposite to the exit direction of the product and at a speed at which the guide exit end has a velocity V2, thereby decelerating the product being delivered from the guide exit end to a reduced velocity V3 equal to V1?V2. The curvature of the guide and the orientation of its exit end is such as to form the delivered product into a helix deposited and temporarily accumulated on a cylindrical drum.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: April 4, 2006
    Assignee: Morgan Construction Company
    Inventor: T. Michael Shore
  • Laying head for rod rolling mill
    Patent number: 7011264
    Abstract: In a laying head for forming a longitudinally moving hot rolled product into a helix, a tubular quill has a central axis of rotation and a through passageway extending along the central axis from a first end to an opposite second end of the quill. The interior quill surface has a cylindrical section leading from the first end of the passageway to a radially outwardly flared section which in turn leads to the second end of the passageway. A laying pipe is received in the through passageway. The laying pipe has an entry end aligned with the central axis at the first end of the passageway, a curved intermediate portion surrounded by the flared section of the interior quill surface, and an end portion projecting axially from the second end of the passageway to a delivery end spaced radially from the central axis.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: March 14, 2006
    Assignee: Morgan Construction Company
    Inventors: T. Michael Shore, William X. Shen, Peiliang L. Zhang
  • Visual cue for display testing having one bit resolution
    Patent number: 7006130
    Abstract: A display test system includes a symbol source and a controller connected to the symbol source for receiving a symbol in response to a testing event whereupon the controller causes the display to produce a first area having a first light intensity, and the symbol at a second light intensity within the first area. A viewer uses an input device to verify to the controller the ability to discern the difference in light intensities of the symbol and the first area by describing or identifying the symbol.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: February 28, 2006
    Inventors: John H. Harshbarger, Jr., W. Michael Shores
  • Device having a memory array storing each bit in multiple memory cells
    Publication number: 20060039178
    Abstract: A memory array is provided, having at least two memory cells accessed for each row address to retain a sufficient electric charge to properly store “1” and “0” bits. For such a memory array, both even and odd row decoders in the array are permanently enabled so that each row address the array receives causes the even row decoder to energize at least one even word line and the odd row decoder to energize at least one odd word line. As a result, at least two memory cells are accessed for each row address so that each “1” or “0” bit is stored as an electric charge in at least two memory cells.
    Type: Application
    Filed: October 6, 2005
    Publication date: February 23, 2006
    Inventor: Michael Shore
  • Uninterrupted continuous rolling of bar and rod products
    Patent number: 6976617
    Abstract: Discrete billets are rolled through a plurality of roll stands arranged along a rolling mill pass line to produce successive product lengths having reduced cross sections and front and tail ends. At a selected location along the pass line, the tail end of each product length is joined to the front end of the next successive product length to thereby permit uninterrupted continuous rolling through the remainder of the mill.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: December 20, 2005
    Assignee: Morgan Construction Company
    Inventors: T. Michael Shore, Melicher Puchovsky
  • Device having a memory array storing each bit in multiple memory cells
    Patent number: 6958945
    Abstract: A memory array is provided, having at least two memory cells accessed for each row address to retain a sufficient electric charge to properly store “1” and “0” bits. For such a memory array, both even and odd row decoders in the array are permanently enabled so that each row address the array receives causes the even row decoder to energize at least one even word line and the odd row decoder to energize at least one odd word line. As a result, at least two memory cells are accessed for each row address so that each “1” or “0” bit is stored as an electric charge in at least two memory cells.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: October 25, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Michael A. Shore
  • Reducing digit equilibrate current during self-refresh mode
    Patent number: 6947346
    Abstract: Digit equilibrate current is reduced during self-refresh mode by reducing the time that the sub-arrays in a volatile memory are precharged with the bleeder device enabled. A selected sub-array is precharged with the bleeder device enabled one cycle prior to having a given row of memory cells refreshed. An auto-refresh counter and row address block are used to generate a section address and a row address of memory cells to refresh. Each sub-array has a given row of memory cells refreshed before another row of memory cells in a given sub-array is refreshed.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: September 20, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Michael Shore, Brian P. Callaway
  • Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs
    Patent number: 6925021
    Abstract: A dual mode, full density/half density SDRAM includes a refresh controller specifically adapted to refresh memory cells of the SDRAM in the half density mode at a rate that is significantly slower than the rate at which the memory cells are refreshed in the full density mode. In the half density mode, the refresh controller increments a counter at a rate that is half the rate the counter is incremented in the full density mode. A refresh trigger pulse, which initiates the refresh of the memory cells, is generated when the counter has incremented to one of a first counter stage in the full density mode and a counter stage two stages beyond the first counter stage in the half density mode. Circuitry is also provided for ignoring some auto-refresh commands applied to the SDRAM in the half density mode so that the memory cells are also refreshed less frequently in the auto-refresh mode.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: August 2, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Timoty B. Cowles, Michael A. Shore, Patrick J. Mullarkey
  • Pinch roll unit
    Patent number: 6920772
    Abstract: A pinch roll unit for either propelling or retarding a product moving along the pass line of a rolling mill comprises a pair of levers mounted for rotation about parallel first axes. Roll shafts are carried by the levers with each roll shaft being journalled for rotation about a second axis parallel to the first axis of its respective lever. Pinch rolls are carried by the roll shafts and are positioned to define a gap therebetween for receiving the product. An electrically powered first motor operates via a linkage to rotate the levers about the first axes and to move the pinch rolls between open positions spaced from the product, and closed positions contacting and gripping the product therebetween. An electrically powered second motor rotatably drives the pinch rolls.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: July 26, 2005
    Assignee: Morgan Construction Company
    Inventors: T. Michael Shore, Paul B. Riches, Yun Ling, Melicher Puchovsky
  • Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
    Patent number: 6853601
    Abstract: A memory array having at least two memory cells accessed for each row address to retain a sufficient electric charge to properly store “1” and “0” bits. For such a memory array both even and odd row decoders in the array are permanently enabled so that each row address the array receives causes the even row decoder to energize at least one even word line and the odd row decoder to energize at least one odd word line. As a result, at least two memory cells are accessed for each row address so that each “1” or “0” bit is stored as an electric charge in at least two memory cells.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: February 8, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Michael A. Shore
  • Device having a memory array storing each bit in multiple memory cells
    Publication number: 20050024970
    Abstract: A memory array having at least two memory cells accessed for each row address to retain a sufficient electric charge to properly store “1” and “0” bits. For such a memory array both even and odd row decoders in the array are permanently enabled so that each row address the array receives causes the even row decoder to energize at least one even word line and the odd row decoder to energize at least one odd word line. As a result, at least two memory cells are accessed for each row address so that each “1” or “0” bit is stored as an electric charge in at least two memory cells.
    Type: Application
    Filed: August 27, 2004
    Publication date: February 3, 2005
    Inventor: Michael Shore
  • Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMS
    Patent number: 6850457
    Abstract: A dual mode, full density/half density SDRAM includes a refresh controller specifically adapted to refresh memory cells of the SDRAM in the half density mode at a rate that is significantly slower than the rate at which the memory cells are refreshed in the full density mode. In the half density mode, the refresh controller increments a counter at a rate that is half the rate the counter is incremented in the full density mode. A refresh trigger pulse, which initiates the refresh of the memory cells, is generated when the counter has incremented to one of a first counter stage in the full density mode and a counter stage two stages beyond the first counter stage in the half density mode. Circuitry is also provided for ignoring some auto-refresh commands applied to the SDRAM in the half density mode so that the memory cells are also refreshed less frequently in the auto-refresh mode.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: February 1, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Timoty B. Cowles, Michael A. Shore, Patrick J. Mullarkey
  • Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs
    Patent number: 6839300
    Abstract: A dual mode, full density/half density SDRAM includes a refresh controller specifically adapted to refresh memory cells of the SDRAM in the half density mode at a rate that is significantly slower than the rate at which the memory cells are refreshed in the full density mode. In the full density mode, the refresh controller increments a counter at a rate that is half the rate the counter is incremented in the full density mode. A refresh trigger pulse, which initiates the refresh of the memory cells, is generated when the counter has incremented to one of a first counter stage in the full density mode and a counter stage two stages beyond the first counter stage in the half density mode. Circuitry is also provided for ignoring some auto-refresh commands applied to the SDRAM in the half density mode so that the memory cells are also refreshed less frequently in the auto-refresh mode.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: January 4, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Timoty B. Cowles, Michael A. Shore, Patrick J. Mullarkey
  • Method and apparatus for decelerating and temporarily accumulating a hot rolled product
    Publication number: 20040250590
    Abstract: A method and apparatus is disclosed for decelerating and temporarily accumulating a hot rolled product moving longitudinally along a receiving axis at a first velocity V1. The product is directed through a curved guide having an entry end aligned with the receiving axis to receive the product, and an exit end spaced radially from the receiving axis and oriented to deliver the product in an exit direction transverse to the receiving axis. The curved guide is rotated about the receiving axis in a direction opposite to the exit direction of the product and at a speed at which the guide exit end has a velocity V2, thereby decelerating the product being delivered from the guide exit end to a reduced velocity V3 equal to V1-V2. The curvature of the guide and the orientation of its exit end is such as to form the delivered product into a helix deposited and temporarily accumulated on a cylindrical drum.
    Type: Application
    Filed: April 26, 2004
    Publication date: December 16, 2004
    Inventor: T. Michael Shore
  • Reducing digit equilibrate current during self-refresh mode
    Publication number: 20040184336
    Abstract: Digit equilibrate current is reduced during self-refresh mode by reducing the time that the sub-arrays in a volatile memory are precharged with the bleeder device enabled. A selected sub-array is precharged with the bleeder device enabled one cycle prior to having a given row of memory cells refreshed. An auto-refresh counter and row address block are used to generate a section address and a row address of memory cells to refresh. Each sub-array has a given row of memory cells refreshed before another row of memory cells in a given sub-array is refreshed.
    Type: Application
    Filed: January 30, 2004
    Publication date: September 23, 2004
    Applicant: Micron Technology, Inc.
    Inventors: Michael Shore, Brian P. Callaway
  • Sacrifice read test mode
    Patent number: 6781901
    Abstract: Testing methods and facilitating circuitry permit activation and latching of multiple word lines in a dynamic memory device in conjunction with external control over digit line equilibrate and activation of sense amplifiers. Such testing methods are adaptable for use prior to row repair or post row repair. Such testing methods permit controlled stressing of cell margin and beta ratio by selective coupling of one or more sacrificial rows to a digit line prior to sensing of data in a target row. Useful design and reliability information may be obtained through application of various embodiments of such testing methods.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: August 24, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Michael Shore
  • Uninterrupted continuous rolling of bar and rod products
    Publication number: 20040108361
    Abstract: Discrete billets are rolled through a plurality of roll stands arranged along a rolling mill pass line to produce successive product lengths having reduced cross sections and front and tail ends. At a selected location along the pass line, the tail end of each product length is joined to the front end of the next successive product length to thereby permit uninterrupted continuous rolling through the remainder of the mill.
    Type: Application
    Filed: April 28, 2003
    Publication date: June 10, 2004
    Inventors: T. Michael Shore, Melicher Puchovsky