Patents by Inventor Mikihiko Nishitani

Mikihiko Nishitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080160346
    Abstract: Disclosed is a PDP and a manufacturing method therefor having improved display performance even if the PDP is of a fine-cell structure. The PDP has a protective layer that is composed of an MgO film layer and an MgO particle layer made of MgO particles. The MgO particles are formed by burning an MgO precursor and satisfy that a/b?1.2, where a denotes a spectrum integral value in a wavelength region of a CL spectrum from 650 nm to 900 nm, exclusive of 900 nm, and b denotes a spectrum integral value of a wavelength region of the CL spectrum from 300 nm to 550 nm, exclusive of 550 nm. The MgO particles have many high energy levels in the energy band and thus emission of initial electrons is caused more easily, which leads to suppress discharge delay and also to suppress temperature dependence of the discharge delay.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 3, 2008
    Inventors: Masaharu Terauchi, Yusuke Fukui, Takuji Tsujita, Michiko Okafuji, Mikihiko Nishitani
  • Publication number: 20080079664
    Abstract: In a plasma display device, a lighting rate is calculated from a video signal input in a plasma display device, and an output current of DC-DC converter (140), which is the same as a discharge current in a sustain period corresponding to the lighting rate, is synchronized with a generation timing of discharge current. With such a configuration, even if discharge current in the sustain period of each subfield is rapidly changed, a sustain pulse voltage can be kept constant.
    Type: Application
    Filed: July 5, 2005
    Publication date: April 3, 2008
    Inventors: Satoshi Ikeda, Yoshinori Yamada, Katsumi Adachi, Mikihiko Nishitani, Masashi Goto
  • Patent number: 7352002
    Abstract: A method of manufacturing a thin-film semiconductor device substrate includes a step of forming a non-single crystalline semiconductor thin film on a base layer, and an annealing step of irradiating the non-single crystalline semiconductor thin film with an energy beam to enhance crystallinity of a non-single crystalline semiconductor constituting the non-single crystalline semiconductor thin film. The annealing step includes simultaneously irradiating the non-single crystalline semiconductor thin film with a plurality of energy beams to form a plurality of unit regions each including at least one irradiated region irradiated with the energy beam and at least one non-irradiated region that is not irradiated with the energy beam.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: April 1, 2008
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yoshinobu Kimura, Masakiyo Matsumura, Yoshitaka Yamamoto, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Fumiki Nakano
  • Patent number: 7335261
    Abstract: Disclosed are apparatus for forming a semiconductor film having an excellent crystallinity from a non-single crystal semiconducting layer formed on a base layer made of an insulating material. The apparatus includes a light source, a homogenizer for homogenizing an intensity distribution of the emitted light, an amplitude-modulation means for performing the amplitude-modulation such that the amplitude of the light, of which the intensity distribution is homogenized, is increased in the direction of the relative motion of the light to the base layer, an optional light projection optical system for projecting the amplitude-modulated light onto the surface of the non-single crystal semiconductor such that a predetermined irradiation energy can be obtained, a phase shifter for providing a low temperature point in the surface irradiated by the light, and a substrate stage to move the light relative to the substrate thereby enabling scanning in the X and Y axis.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center
    Inventors: Masakiyo Matsumura, Mikihiko Nishitani, Yoshinobu Kimura, Masayuki Jyumonji, Yukio Taniguchi, Masato Hiramatsu, Fumiki Nakano
  • Publication number: 20080019002
    Abstract: A crystallization apparatus includes an illumination system which applies illumination light for crystallization to a non-single-crystal semiconductor film, and a phase shifter which includes first and second regions disposed to form a straight boundary and transmitting the illumination light from the illumination system by a first phase retardation therebetween, and phase-modulates the illumination light to provide a light intensity distribution having an inverse peak pattern that light intensity falls in a zone of the non-single-crystal semiconductor film containing an axis corresponding to the boundary. The phase shifter further includes a small region which extends into at least one of the first and second regions from the boundary and transmits the illumination light by a second phase retardation with respect to the at least one of the first and second regions.
    Type: Application
    Filed: September 26, 2007
    Publication date: January 24, 2008
    Applicant: Advanced LCD Technologies Dev. Ctr. Co., Ltd
    Inventors: Yukio TANIGUCHI, Masakiyo Matsumura, Hirotaka Yamaguchi, Mikihiko Nishitani, Susumu Tsujikawa, Yoshinobu Kimura, Masayuki Jyumonji
  • Publication number: 20070216302
    Abstract: Provided is a gas discharge display panel that exhibits a favorable display performance by maintaining a wall charge retaining power, controlling discharge delay within a range adequate for optimal image display, and reducing the discharge starting voltage at comparatively low cost. Also provided is a PDP that exhibits more reliability with enhanced display quality by further improving the secondary electron emission factor ? compared to conventional cases and lowering the discharge starting voltage to widen the driving margin. In addition, provided is a manufacturing method of a gas discharge display panel, by which the manufacturing cost lowers by reduction of the exhaustion time in the sealing exhaustion process, and by which the driving circuit cost is reduced. In the present invention, the protective layer contains, with respect to a MgO content of the protective layer, Si in a range of 20 mass ppm to 5000 mass ppm inclusive and H in a range of 300 mass ppm to 10000 mass ppm inclusive.
    Type: Application
    Filed: April 7, 2005
    Publication date: September 20, 2007
    Inventors: Jun Hashimoto, Masatoshi Kitagawa, Mikihiko Nishitani, Masaharu Terauchi, Shinichi Yamamoto
  • Publication number: 20070096103
    Abstract: The semiconductor device according to the present invention has a semiconductor layer having not smaller than two types of crystal grains different in size within a semiconductor circuit on a same substrate.
    Type: Application
    Filed: December 19, 2006
    Publication date: May 3, 2007
    Applicant: Advanced LCD Technologies Dev. Ctr. Co., Ltd
    Inventors: Masayuki Jyumonji, Masakiyo Matsumura, Yoshinobu Kimura, Mikihiko Nishitani, Masato Hiramatsu, Yukio Taniguchi, Fumiki Nakano, Hiroyuki Ogawa
  • Publication number: 20070052348
    Abstract: The present invention is a plasma display panel in which a plurality of pairs of display electrodes extending in a row direction are disposed on a surface of a first substrate and a plurality of discharge cells are formed along each pair of display electrodes, wherein, at least within each discharge cell, each display electrode of the pair of display electrodes comprises a bus line and a band-shaped electrode member that is electrically connected to the bus line, the band-shaped electrode member extending in the row direction and being disposed at least mainly on a same side of the bus line as a gap between the pair of display electrodes, and each band-shaped electrode member has at least one cut-out formed from a gap-side edge towards the bus line, each cut-out having a length that is shorter than a distance between the gap-side edge and the bus line.
    Type: Application
    Filed: October 28, 2004
    Publication date: March 8, 2007
    Inventors: Masashi Goto, Mikihiko Nishitani, Katsumi Adachi, Yoshinori Yamada, Satoshi Ikeda
  • Patent number: 7186602
    Abstract: The semiconductor device according to the present invention has a semiconductor layer having not smaller than two types of crystal grains different in size within a semiconductor circuit on a same substrate.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: March 6, 2007
    Assignee: Advanced LCD Technologies Development Center Co. Ltd.
    Inventors: Masayuki Jyumonji, Masakiyo Matsumura, Yoshinobu Kimura, Mikihiko Nishitani, Masato Hiramatsu, Yukio Taniguchi, Fumiki Nakano, Hiroyuki Ogawa
  • Publication number: 20070029908
    Abstract: A plasma display panel in which a plurality of pairs of display electrodes extending in a row direction are aligned on a surface of a first substrate, a plurality of address electrodes extending in a column direction are disposed in a stripe pattern on a surface of a second substrate, the first and second substrates are disposed opposite each other so that the pairs of display electrodes and the address electrodes cross over sandwiching discharge space therebetween, and a discharge cell is formed corresponding to each crossover portion. The pairs of display electrodes are composed of a metallic material, each display electrode of each pair of display electrodes includes a base part extending in the row direction and a plurality of opposing parts extending from the base part into a discharge interval between the each pair of display electrodes.
    Type: Application
    Filed: October 28, 2004
    Publication date: February 8, 2007
    Inventors: Masashi Goto, Mikihiko Nishitani, Katsumi Adachi, Yoshinori Yamada, Satoshi Ikeda
  • Publication number: 20070023759
    Abstract: A thin film transistor includes a one conductive type semiconductor layer (11); a source region (12) and a drain region (13) which are separately provided in the semiconductor layer; and a gate electrode (14) provided above or below the semiconductor layer with an insulating film interposed therebetween, wherein the width (Ws) of the junction face between the source region and the channel (16) which is provided between the source region and drain region, is different from the width (Wd) of the junction face between the above channel region and the drain region.
    Type: Application
    Filed: September 1, 2006
    Publication date: February 1, 2007
    Inventors: Masato Hiramatsu, Masakiyo Matsumura, Mikihiko Nishitani, Yoshinobu Kimura, Yoshitaka Yamamoto
  • Publication number: 20070001601
    Abstract: In the plasma display panel of the present invention, a protective layer covers a dielectric layer covering electrodes in discharge cells and faces a discharge space filled with a discharge gas. Here, the discharge gas includes at least one selected from the group consisting of Xe and Kr. In the protective layer, an electron band including at least electrons having energy level of 4 eV or less below a vacuum level is formed within a forbidden band in energy bands.
    Type: Application
    Filed: October 29, 2004
    Publication date: January 4, 2007
    Inventors: Mikihiko Nishitani, Masaharu Terauchi, Yakuhiro Morita, Shinichi Yamamoto, Masatoshi Kitagawa
  • Publication number: 20060250147
    Abstract: A measuring device, a measuring method, and an evaluating device for easily and accurately obtaining information suitable to evaluate, for example, the discharge characteristic of an insulating film such as an MgO protective layer of a plasma display are provided. An MgO film surface, a sample to be measured, is irradiated with electrons or ions emitted from an electron gun (130) or an ion gun (140). The energy distribution of the secondary electrons emitted from the sample is measured by an electron spectrograph (150), and the spectrum data on the measured secondary electrons is supplied to an analyzing device (200). The analyzing device (200) analyzes the spectrum data and determines information (evaluation values) to evaluate the properties of the sample to be measured.
    Type: Application
    Filed: August 23, 2004
    Publication date: November 9, 2006
    Inventors: Yukihiro Morita, Mikihiko Nishitani, Masatoshi Kitagawa, Takaharu Nagotomi
  • Publication number: 20060251799
    Abstract: A plasma display panel is composed of a first substrate and a second substrate facing each other via a discharge space and sealed together. A protective layer on the first substrate is composed principally of magnesium oxide, includes a substance or structure that creates a first energy level in an area of a forbidden band, the area being in a vicinity of a conduction band, and includes a substance or structure that creates a second energy level in another area in the forbidden band, the other area being in a vicinity of a valence band. During driving the second energy level is occupied by electrons, and few electrons exist in the first energy level, or electrons can easily occupy the first energy level due to a minus charge state, and MgO insultaive resistance is not lowered. This maintains wall charge retention and reduces discharge irregularities and firing voltage Vf.
    Type: Application
    Filed: July 13, 2006
    Publication date: November 9, 2006
    Inventors: Mikihiko Nishitani, Yukihiro Morita, Masatoshi Kitagawa, Masaharu Terauchi
  • Patent number: 7118946
    Abstract: A thin film transistor includes a one conductive type semiconductor layer; a source region and a drain region which are separately provided in the semiconductor layer; and a gate electrode provided above or below the semiconductor layer with an insulating film interposed therebetween, wherein the width of the junction face between the source region and the channel which is provided between the source region and drain region, is different from the width of the junction face between the above channel region and the drain region.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: October 10, 2006
    Assignee: Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center
    Inventors: Masato Hiramatsu, Masakiyo Matsumura, Mikihiko Nishitani, Yoshinobu Kimura, Yoshitaka Yamamoto
  • Publication number: 20060213431
    Abstract: A crystallization method includes wavefront-dividing an incident light beam into a plurality of light beams, condensing the wavefront-divided light beams in a corresponding phase shift portion of a phase shift mask or in the vicinity of the phase shift portion to form a light beam having an light intensity distribution of an inverse peak pattern in which a light intensity is minimum in a point corresponding to the phase shift portion of the phase shift mask, and irradiating a polycrystalline semiconductor film or an amorphous semiconductor film with the light beam having the light intensity distribution to produce a crystallized semiconductor film.
    Type: Application
    Filed: May 30, 2006
    Publication date: September 28, 2006
    Inventors: Yukio Taniguchi, Masakiyo Matsumura, Hirotaka Yamaguchi, Mikihiko Nishitani, Susumu Tsujikawa, Yoshinobu Kimura, Masayuki Jyumonji
  • Publication number: 20060197093
    Abstract: A method of manufacturing a thin-film semiconductor device substrate includes a step of forming a non-single crystalline semiconductor thin film on a base layer, and an annealing step of irradiating the non-single crystalline semiconductor thin film with an energy beam to enhance crystallinity of a non-single crystalline semiconductor constituting the non-single crystalline semiconductor thin film. The annealing step includes simultaneously irradiating the non-single crystalline semiconductor thin film with a plurality of energy beams to form a plurality of unit regions each including at least one irradiated region irradiated with the energy beam and at least one non-irradiated region that is not irradiated with the energy beam.
    Type: Application
    Filed: April 14, 2006
    Publication date: September 7, 2006
    Inventors: Yoshinobu Kimura, Masakiyo Matsumura, Yoshitaka Yamamoto, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Fumiki Nakano
  • Patent number: 7102287
    Abstract: A plasma display panel is composed of a first substrate and a second substrate facing each other via a discharge space and sealed together. A protective layer on the first substrate is composed principally of magnesium oxide, includes a substance or structure that creates a first energy level in an area of a forbidden band, the area being in a vicinity of a conduction band, and includes a substance or structure that creates a second energy level in another area in the forbidden band, the other area being in a vicinity of a valence band. During driving the second energy level is occupied by electrons, and few electrons exist in the first energy level, or electrons can easily occupy the first energy level due to a minus charge state, and MgO insultaive resistance is not lowered. This maintains wall charge retention and reduces discharge irregularities and firing voltage Vf.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: September 5, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mikihiko Nishitani, Yukihiro Morita, Masatoshi Kitagawa, Masaharu Terauchi
  • Patent number: 7101436
    Abstract: A crystallization apparatus includes an optical illumination system to illuminate a phase shift mask and which irradiates an amorphous semiconductor film with a light beam having an inverse peak type light intensity distribution including a minimum light intensity in a point corresponding to a phase shift portion of the phase shift mask to produce a crystallized semiconductor film. A wavefront dividing element is disposed on a light path between the optical illumination system and the phase shift mask. The wavefront dividing element wavefront-divides the light beam supplied from the optical illumination system into a plurality of light beams, and condenses the wavefront-divided light beams in the corresponding phase shift portion or in the vicinity of the portion.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: September 5, 2006
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yukio Taniguchi, Masakiyo Matsumura, Hirotaka Yamaguchi, Mikihiko Nishitani, Susumu Tsujikawa, Yoshinobu Kimura, Masayuki Jyumonji
  • Patent number: 7087505
    Abstract: A method of manufacturing a thin-film semiconductor device substrate includes a step of forming a non-single crystalline semiconductor thin film on a base layer, and an annealing step of irradiating the non-single crystalline semiconductor thin film with an energy beam to enhance crystallinity of a non-single crystalline semiconductor constituting the non-single crystalline semiconductor thin film. The annealing step includes simultaneously irradiating the non-single crystalline semiconductor thin film with a plurality of energy beams to form a plurality of unit regions each including at least one irradiated region irradiated with the energy beam and at least one non-irradiated region that is not irradiated with the energy beam.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: August 8, 2006
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yoshinobu Kimura, Masakiyo Matsumura, Yoshitaka Yamamoto, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Fumiki Nakano