Abstract: A cycloidal reducer includes a housing, an input bushing mounted in the housing for input of a rotational force, and two speed-reduced output units, each of which includes a cycloidal disc, an output member, a cross Oldham coupling member, and a plurality of rolling elements. The cycloidal disc is mounted to the input bushing and has troughs formed in an end face thereof and each having a sidewall forming an inclined surface. The output member has troughs formed in an end face thereof. The cross Oldham coupling member has coupling sections, each having a sidewall forming an inclined surface. The coupling sections are respectively received in the troughs of the cycloidal disc and the output member. The rolling elements are arranged between the inclined surfaces of the cycloidal disc and the cross Oldham coupling member and between the sidewalls of the output member and the cross Oldham coupling member.

Abstract: A power supply includes a transformer winding, a switching circuit, a controller and a filter circuit. The transformer winding is configured to provide a first voltage. The switching circuit is coupled to the transformer winding and includes a first and a second switching unit. On the condition that the power supply is operated under a standby mode, the controller controls the first and the second switching units to provide a discharging path between two terminals of the transformer winding. On the condition that the power supply is operated under an operating mode, the controller controls the switching circuit such that the switching circuit provides a second voltage according to the first voltage. The filter circuit is coupled to the switching circuit and configured to filter the second voltage to provide an output voltage.

Abstract: A cycloidal reducer includes a housing, an input bushing mounted in the housing for input of a rotational force, and two speed-reduced output units, each of which includes a cycloidal disc, an output member, a cross Oldham coupling member, and a plurality of rolling elements. The cycloidal disc is mounted to the input bushing and has troughs formed in an end face thereof and each having a sidewall forming an inclined surface. The output member has troughs formed in an end face thereof. The cross Oldham coupling member has coupling sections, each having a sidewall forming an inclined surface. The coupling sections are respectively received in the troughs of the cycloidal disc and the output member. The rolling elements are arranged between the inclined surfaces of the cycloidal disc and the cross Oldham coupling member and between the sidewalls of the output member and the cross Oldham coupling member.

Abstract: A semiconductor device includes a gate structure on a substrate, in which the gate structure includes a silicon layer on the substrate, a titanium nitride (TiN) layer on the silicon layer, a titanium (Ti) layer between the TiN layer and the silicon layer, a metal silicide between the Ti layer and the silicon layer, a titanium silicon nitride (TiSiN) layer on the TiN layer, and a conductive layer on the TiSiN layer.

Abstract: A memory device and manufacturing method thereof are provided. The memory device includes a pair of stacked structures, a charge storage layer, and a channel layer. The stacked structures are disposed on a substrate. Each stacked structure includes gate layers and insulating layers stacked alternately, and a cap layer on the gate layers and the insulating layers. The charge storage layer is disposed on sidewalls of the stacked structures facing each other. The channel layer covers the charge storage layer, and has a top portion, a body portion, and a bottom portion. The top portion covers sidewalls of the cap layers of the stacked structures. The bottom portion covers a portion of the substrate located between the stacked structures. The body portion is connected between the top and bottom portions. Dopant concentrations of the top and bottom portions are respectively greater than a dopant concentration of the body portion.

Abstract: A method of fabricating a cobalt silicide layer includes providing a substrate disposed in a chamber. A deposition process is performed to form a cobalt layer covering the substrate. The deposition process is performed when the temperature of the substrate is between 50° C. and 100° C., and the temperature of the chamber is between 300° C. and 350° C. After the deposition process, an annealing process is performed to transform the cobalt layer into a cobalt silicide layer. The annealing process is performed when the substrate is between 300° C. and 350° C., and the duration of the annealing process is between 50 seconds and 60 seconds.

Abstract: A braking control method for a braking system of a vehicle is provided according to an exemplary embodiment of the disclosure. The braking control method comprises: obtaining a total braking distance and a first speed of the vehicle; obtaining braking delay information related to the braking system, wherein the braking delay information includes first time information and second time information, the first time information reflects a delay time of a braking signal, and the second time information reflects a preparation time for performing a braking operation according to the braking signal by the braking system; obtaining deceleration information according to the total braking distance, the first speed and the braking delay information; generating the braking signal according to the deceleration information; and performing the braking operation according to the braking signal.

Abstract: A semiconductor structure for preventing row hammering issue in DRAM cell is provided in the present invention. The structure includes a trench with a gate dielectric, an n-type work function metal layer, a TiN layer conformally formed within, and a buried word line filled in the trench.

Abstract: A method includes moving a sticky structure to a wafer table such that a first particle on the wafer table is adhered to the sticky structure, moving the sticky structure away from the wafer table after the first particle is adhered to the sticky structure, and performing a lithography process to a wafer held by the wafer table after moving the sticky structure away from the wafer table.

Abstract: A method of forming a bit line gate structure of a dynamic random access memory (DRAM) includes the following steps. A polysilicon layer is formed on a substrate. A sacrificial layer is formed on the polysilicon layer. An implantation process is performed on the sacrificial layer and the polysilicon layer. The sacrificial layer is removed. A metal stack is formed on the polysilicon layer. The present invention also provides another method of forming a bit line gate structure of a dynamic random access memory (DRAM) including the following steps. A polysilicon layer is formed on a substrate. A plasma doping process is performed on a surface of the polysilicon layer. A metal stack is formed on the surface of the polysilicon layer.

Abstract: Described herein are methods and kits for detecting the presence or absence of gene dysregulations such as those arising from gene fusions and/or chromosomal abnormalities, e.g. translocations, insertions, inversions and deletions. The methods, compositions and kits are useful for detecting mutations that cause the differential expression of a 5? portion of a target gene relative to the 3? region of the target gene. The average expression of the 5? portion of the target gene is compared with the average expression of the 3? portion of the target gene to determine an intragenic differential expression (IDE). The IDE can then be used to determine if a dysregulation or a particular disease (or susceptibility to a disease) is present or absent in a subject or sample.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a titanium nitride (TiN) layer on a silicon layer; performing a first treatment process by reacting the TiN layer with dichlorosilane (DCS) to form a titanium silicon nitride (TiSiN) layer; forming a conductive layer on the TiSiN layer; and patterning the conductive layer, the metal silicon nitride layer, and the silicon layer to form a gate structure.

Abstract: A method for semiconductor fabrication includes mounting a wafer onto a first wafer table. The first wafer table includes a first set of pins that support the wafer, the first set of pins having a first pitch between adjacent pins. The method further includes forming a first set of overlay marks on the wafer; and transferring the wafer onto a second wafer table. The second wafer table includes a second set of pins having a second pitch between adjacent pins. The second set of pins are individually and vertically movable, and the second pitch is smaller than the first pitch. The method further includes moving a portion of the second set of pins such that a remaining portion of the second set of pins supports the wafer and the remaining portion has the first pitch between adjacent pins.

Abstract: The present disclosure relates to toner compositions containing an IR-taggant, and method of making thereof. The disclosure also relates to method for confirming authenticity of an item.

Abstract: A method for semiconductor fabrication includes mounting a wafer onto a first wafer table. The first wafer table includes a first set of pins that support the wafer, the first set of pins having a first pitch between adjacent pins. The method further includes forming a first set of overlay marks on the wafer; and transferring the wafer onto a second wafer table. The second wafer table includes a second set of pins having a second pitch between adjacent pins. The second set of pins are individually and vertically movable, and the second pitch is smaller than the first pitch. The method further includes moving a portion of the second set of pins such that a remaining portion of the second set of pins supports the wafer and the remaining portion has the first pitch between adjacent pins.

Abstract: Polar silane linkers are provided that attach to resins to form silane-functionalized resins. The functionalized resins can be bound to hydroxyl groups on the surface of silica particles to improve the dispersibility of the silica particles in rubber mixtures. Further disclosed are synthetic routes to provide the silane-functionalized resins, as well as various uses and end products that benefit from the unexpected properties of the silane-functionalized resins. Silane-functionalized resins impart remarkable properties on various rubber compositions, such as tires, belts, hoses, brakes, and the like. Automobile tires incorporating the silane-functionalized resins are shown to possess excellent results in balancing the properties of rolling resistance, tire wear, and wet braking performance.

Abstract: A semiconductor apparatus includes a light source, a reflection mirror, and a heat exchanger. The reflection mirror has a reflection surface configured to reflect a light of the light source and a channel behind the reflection surface. The heat exchanger is connected to the channel and configured to circulate a working fluid in the channel.

Abstract: A method of lithography includes obtaining a profile of a single field of a substrate that having a photoresist layer thereon, in which the profile includes a first feature and a second feature having different heights. A depth of focus distribution map is generated according to the profile. A project lens is tuned based on the generated depth of focus distribution map, such that the project lens provides a first focus length in a first project pixel of the project lens and a second focus length in a second project pixel of the project lens, wherein the first focus length and the second focus lengths. The single field of the substrate is exposed by using the tuned project lens.

Abstract: A vertical channel structure including a substrate, a stack structure, and a channel structure is provided. The stack structure is disposed on the substrate. The channel structure is disposed in an opening that at least partially penetrates through the stack structure. The channel structure includes a first channel layer and a second channel layer. The first channel layer is disposed on a bottom of the opening. The second channel layer is disposed on the first channel layer. A resistance value of the first channel layer is less than a resistance value of the second channel layer.