Abstract: An electrochemical sensor device that is efficiently and economically produced at the chip level for a variety of applications is disclosed. In some aspects, the device is made on or using a wafer technology whereby a sensor chamber is created by said wafer and a gas port allows for a working electrode of the sensor to detect certain gases. Large scale production is possible using wafer technology where individual sensors are produced from one or more common wafers. Integrated circuits are made in or on the wafers in an integrated way so that the wafers provide the substrate for the integrated circuitry and interconnects as well as providing the definition of the chambers in which the gas sensors are disposed.

Abstract: The present invention provides a system and a method for service continuity in heterogeneous wireless networks, which comprises a handover decision module and a session continuity module. The handover decision module is responsible for maintaining link layer association and network layer reachability in according to the underlying network conditions to fulfill the service requirement of applications. When acting as a sender, the session continuity module will select transmission path(s), reestablish the transport connection(s) and tag packets with session IDs and sequence numbers. When acting as a receiver, the session continuity module will identify and reorder packets using session IDs and sequence numbers, regardless of the IP addresses and ports of the packets. To sum up, the present invention can provide service continuity and multipath transmission for network devices.

Abstract: A process for fabricating a 3D memory is shown. Linear stacks, each of which includes alternately stacked gate lines and insulating layers, are formed. A charge trapping layer is formed covering the linear stacks. An amorphous semiconductor layer is formed on the charge trapping layer. An ultra-thin cap layer is formed on the amorphous semiconductor layer. The amorphous semiconductor layer is annealed to form a crystalline channel layer, wherein agglomeration of the material of the amorphous semiconductor layer is suppressed by then ultra-thin cap layer.

Abstract: Systems are provided for delivering a suture to close a surgical opening. An elongated deployment member may have at its distal end a retracted counterforce member. The counterforce member may be inserted into the surgical opening and deployed to resist being withdrawn from the opening. A compression member may be slid down the elongated member to compress the tissue to be sutured against the counterforce member. Suture passers loaded with suture ends may be passed through needle tubes within the elongated member to emerge from the elongated member and pierce the tissue to be sutured, then deposit the suture ends with a suture catcher. The suture passers may be withdrawn, leaving the suture ends. The suture catcher may be retracted, retaining the suture ends and the device—elongated member, retracted suture catcher, and retained suture end—may be withdrawn from the surgical opening. The suture may then be completed.

Abstract: An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure.

Abstract: The invention is directed to delayed gelation agents comprising a degradable polymeric cage containing therein one or more gelation agents. The cage degrades in situ, e.g., in an oil reservoir, thus releasing the gelation agent(s), which can then crosslink second polymers in situ to form a gel.

Abstract: A method of forming a three-dimensional memory device is provided. Insulating layers and sacrificial layers are stacked alternatively on a substrate. At least one first opening is formed through the insulating layers and the sacrificial layers. Protection layers are formed on surfaces of the sacrificial layers exposed by the sidewall of the first opening. A charge storage layer is formed on the sidewall of the first opening and covers the protection layers. A channel layer is formed on the charge storage layer. The sacrificial layers and the protection layers are replaced with electrode layers. A three-dimensional memory device is further provided.

Abstract: A semiconductor memory device is provided, and which includes a substrate, plural gates, plural plugs, a capacitor structure and a conducting cap layer. The gates are disposed within the substrate, and the plugs are disposed on the substrate, with each plug electrically connected to two sides of each gate on the substrate. The capacitor structure is disposed on the substrate, and the capacitor structure includes plural capacitors, with each capacitor electrically connected to the plugs respectively. The conducting cap layer covers the top surface and sidewalls of the capacitor structure. Also, the semiconductor memory device further includes an adhesion layer and an insulating layer. The adhesion layer covers the conducting cap layer and the capacitor structure, and the insulating layer covers the adhesion layer.

Abstract: A substrate table is provided. The substrate table includes a main body configured to support a substrate thereon. The substrate table further includes a number of vacuum channels provided in the main body and respectively formed with a vacuum opening on a surface of the main body. The vacuum channels are configured to apply a vacuum to the substrate. The vacuum channels are distributed throughout the main body and arranged in a grid pattern.

Abstract: A monitoring system includes a first storage device and a processor. The first storage is configured to temporarily store a first iterated value corresponding to first history parameters. The processor is configured to receive first parameters of first products tested by a test machine, generate a second iterated value by performing an iterative calculation of the first parameters and the first iterated value, and update the first iterated value temporarily stored in the first storage device to the second iterated value for follow-up iterative calculations to selectively output an alert information, wherein the second iterated value corresponds to the first parameters and the first history parameters.

Abstract: A method of forming dynamic random access memory (DRAM) device, comprises the following steps. First of all, a plurality of active areas is formed in a substrate along a first direction. Next, a plurality of buried gates disposed in the substrate is formed along a second trench extending along a second direction across the first direction. Then, a plurality of bit lines is formed over the buried gates and extended along a third direction across the first direction and the second direction, wherein each of the bit lines comprises a polysilicon layer, a barrier layer and a metal layer and the barrier layer is formed through a radio frequency physical vapor deposition (RF-PVD) process.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a silicon layer on a substrate; forming a first metal silicon nitride layer on the silicon layer; performing an oxygen treatment process to form an oxide layer on the first metal silicon nitride layer; forming a second metal silicon nitride layer on the oxide layer; forming a conductive layer on the second metal silicon nitride layer; and patterning the conductive layer, the second metal silicon nitride layer, the oxide layer, the first metal silicon nitride layer, and the silicon layer to form a gate structure.

Abstract: The present technology relates to methods for determining whether a patient having thyroid nodules with indeterminate cytology will benefit from diagnostic surgery, e.g., lobectomy. These methods are based on screening a patient's thyroid nodules and detecting alterations in target nucleic acid sequences corresponding to a specific set of thyroid cancer-related genes. Kits for use in practicing the methods are also provided.

Abstract: A cycloidal reducer includes a housing, an input bushing mounted in the housing for input of a rotational force, and two speed-reduced output units, each of which includes a cycloidal disc, an output member, a cross Oldham coupling member, and a plurality of rolling elements. The cycloidal disc is mounted to the input bushing and has troughs formed in an end face thereof and each having a sidewall forming an inclined surface. The output member has troughs formed in an end face thereof. The cross Oldham coupling member has coupling sections, each having a sidewall forming an inclined surface. The coupling sections are respectively received in the troughs of the cycloidal disc and the output member. The rolling elements are arranged between the inclined surfaces of the cycloidal disc and the cross Oldham coupling member and between the sidewalls of the output member and the cross Oldham coupling member.

Abstract: A method for protecting corneal endothelial cells from the impact caused by an eye surgery is disclosed. The ophthalmic composition is administered to a patient's eye continuously for at least five days before an eye surgery for reducing the impact to the corneal endothelial cells caused by the eye surgery. The ophthalmic composition comprises an ascorbic acid and a pharmaceutically acceptable ophthalmic carrier.

Abstract: Graphene-containing toners are provided. In an embodiment, a graphene-containing toner comprises a core comprising graphene, a crystalline polyester resin, and an amorphous polyester resin, the toner further comprising a shell over the core. Methods of making and using the toners are also provided.

Abstract: A method for semiconductor fabrication includes mounting a wafer onto a first wafer table. The first wafer table includes a first set of pins that support the wafer, the first set of pins having a first pitch between adjacent pins. The method further includes forming a first set of overlay marks on the wafer; and transferring the wafer onto a second wafer table. The second wafer table includes a second set of pins having a second pitch between adjacent pins. The second set of pins are individually and vertically movable, and the second pitch is smaller than the first pitch. The method further includes moving a portion of the second set of pins such that a remaining portion of the second set of pins supports the wafer and the remaining portion has the first pitch between adjacent pins.

Abstract: A method for semiconductor fabrication includes mounting a wafer onto a first wafer table. The first wafer table includes a first set of pins that support the wafer, the first set of pins having a first pitch between adjacent pins. The method further includes forming a first set of overlay marks on the wafer; and transferring the wafer onto a second wafer table. The second wafer table includes a second set of pins having a second pitch between adjacent pins. The second set of pins are individually and vertically movable, and the second pitch is smaller than the first pitch. The method further includes moving a portion of the second set of pins such that a remaining portion of the second set of pins supports the wafer and the remaining portion has the first pitch between adjacent pins.

Abstract: The disclosure is directed to polyelectrolyte complex nanoparticles that can be used to deliver agents deep into hydrocarbon reservoirs. Methods of making and using said polyelectrolyte complex nanoparticles are also provided.

Abstract: A method for fabricating buried word line of a dynamic random access memory (DRAM) includes the steps of: forming a trench in a substrate; forming a first conductive layer in the trench; forming a second conductive layer on the first conductive layer, in which the second conductive layer above the substrate and the second conductive layer below the substrate comprise different thickness; and forming a third conductive layer on the second conductive layer to fill the trench.