Abstract: A resistive memory apparatus includes a memory cell array, a local switch, and a global switch. The memory cell array may include a plurality of resistive memory cells coupled to a plurality of connection lines. The local switch may select a target connection line coupled to a target memory cell and a preset number of connection lines adjacent to the target connection line according to a signal obtained by decoding an address. The global switch may apply a preset level of voltage to the selected adjacent connection lines according to the signal obtained by decoding the address.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: Provided are a semiconductor package and a manufacturing method thereof for securing a space for mounting a semiconductor device by etching a temporary metal plate to form a plurality of conductive posts.

Abstract: A memory apparatus may be provided. The memory apparatus may include a global bit line configured to receive a drift current. A voltage clamping circuit configured to limit a voltage level of the global bit line.

Abstract: A thin film transistor includes a semiconductor layer, a gate electrode, and an insulating layer. The semiconductor layer includes a source electrode, a drain electrode, and a channel part disposed therebetween. The gate electrode is disposed on the channel part and extends in a direction crossing a channel length direction of the semiconductor layer. The insulating layer includes a second region connected to the first region and extending in a same direction as an extending direction of the gate electrode from the first region. A hydrogen content of the source electrode or the drain electrode is in a range between a maximum hydrogen content that is larger than a hydrogen content of the second region of the insulating layer by about 10% and a minimum hydrogen content that is smaller than the hydrogen content of the second region of the insulating layer by about 10%.

Abstract: Provided is a solidification apparatus that makes variations in the surface height of a molten metal relatively non-affected by the proceeding speed of a metal sheet to significantly increase the proceeding speed of the metal sheet and to increase the productivity of the metal sheet. The solidification apparatus for producing a metal sheet by solidifying molten metal includes rows of rollers arranged in a proceeding direction of the metal sheet, wherein when the rows of rollers are grouped into a plurality of sections, an average of roller pitches each being a distance between centers of rollers adjacent in the proceeding direction of the metal sheet is smaller in a given section than in a preceding section.

Abstract: A resistive memory apparatus includes a memory cell array, a local switch, and a global switch. The memory cell array may include a plurality of resistive memory cells coupled to a plurality of connection lines. The local switch may select a target connection line coupled to a target memory cell and a preset number of connection lines adjacent to the target connection line according to a signal obtained by decoding an address. The global switch may apply a preset level of voltage to the selected adjacent connection lines according to the signal obtained by decoding the address.

Abstract: A thin film transistor includes a semiconductor layer, a gate electrode, and an insulating layer. The semiconductor layer includes a source electrode, a drain electrode, and a channel part disposed therebetween. The gate electrode is disposed on the channel part and extends in a direction crossing a channel length direction of the semiconductor layer. The insulating layer includes a second region connected to the first region and extending in a same direction as an extending direction of the gate electrode from the first region. A hydrogen content of the source electrode or the drain electrode is in a range between a maximum hydrogen content that is larger than a hydrogen content of the second region of the insulating layer by about 10% and a minimum hydrogen content that is smaller than the hydrogen content of the second region of the insulating layer by about 10%.

Abstract: An AFS system for a vehicle may include a motor which has a hollow motor shaft, an input shaft connected with a steering wheel and rotatably and penetratively inserted into the motor shaft, a planetary gear set including a sun gear formed at a lower end portion of the motor shaft, upper planet gears that engage with the sun gear, lower planet gears connected coaxially with the upper planet gears, a ring gear that engages with the lower planet gears, a carrier connected with a lower end portion of the input shaft so as to transmit power and connected to the lower planet gears so as to transmit power, and an output shaft formed integrally with the ring gear and extending toward a lower side of the ring gear.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device, and a method of manufacturing thereof, that comprises a substrate including a dielectric layer, at least one conductive trace and conductive bump pad formed on one surface of the dielectric layer, and a protection layer covering the at least one conductive trace and conductive bump pad, the at least one conductive bump pad having one end exposed through the protection layer, and a semiconductor die electrically connected to the conductive bump pad of the substrate.

Abstract: Provided are a semiconductor package and a manufacturing method thereof for securing a space for mounting a semiconductor device by etching a temporary metal plate to form a plurality of conductive posts.

Abstract: An organic light emitting display device, including a substrate, a first conductive layer pattern on the substrate, a first insulation layer pattern on the first conductive layer pattern, a first semiconductor layer pattern on the first insulation layer pattern, a gate insulation layer pattern on the gate insulation layer pattern, a gate electrode on the gate insulation layer pattern, a planarization layer on the gate electrode, the planarization layer including a first protruding portion protruded in a first direction perpendicular to an upper surface of the substrate, a lower electrode on the first protruding portion, a pixel defining layer exposing at least a portion of the lower electrode, the pixel defining layer covering opposite side portions of the first protruding portion, a light emitting layer on the lower electrode, and an upper electrode on the light emitting layer.

Abstract: A clamp on type of an ultrasonic flow rate-measuring device attached to an outer wall and having an automatic pipe thickness measuring function is disclosed. The ultrasonic flow rate measuring-device includes an automatic pipe thickness measuring function. The ultrasonic flow rate-measuring device is fixed to the outer diameter of a pipe of which the material is known but the thickness is unknown. The ultrasonic flow rate-measuring device adopts a resonant frequency, which generates a maximum voltage level during frequency sweeping through the entire path.

Abstract: A memory apparatus includes a first memory bank, a second memory bank, a row decoder and repair circuit, and an input/output driver controller. The row decoder and repair circuit is coupled to the first and second memory banks in common. The row decoder and repair circuit generates a shared repair signal according to whether a word line disposed in a first memory bank is replaced with a word line disposed in a second memory bank. The input/output driver controller allows read or write operations for one of the first and second memory banks to be performed based on the shared repair signal and an operation signal.

Abstract: An organic light emitting diode display includes: a substrate including a first and a second gate electrode formed over a first and a second region, respectively, a first and a second gate insulator formed on the first and the second gate electrode, respectively, a first and a second semiconductor layer formed on the first and the second gate insulator, respectively, the first semiconductor layer including a first channel region, the second semiconductor layer including a second channel region, an interlayer insulator formed over the substrate and over at least part of the first and second semiconductor layers, a first and a second etching stop layer formed over the first and second channel regions, respectively, and surrounded by the interlayer insulator, and a first and a second source electrode and a first and a second drain electrode contacting the first and the second semiconductor layer, respectively, through the interlayer insulator.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: An AFS system for a vehicle may include a motor which has a hollow motor shaft, an input shaft connected with a steering wheel and rotatably and penetratively inserted into the motor shaft, a planetary gear set including a sun gear formed at a lower end portion of the motor shaft, upper planet gears that engage with the sun gear, lower planet gears connected coaxially with the upper planet gears, a ring gear that engages with the lower planet gears, a carrier connected with a lower end portion of the input shaft so as to transmit power and connected to the lower planet gears so as to transmit power, and an output shaft formed integrally with the ring gear and extending toward a lower side of the ring gear.

Abstract: An organic light emitting display device, including a substrate, a first conductive layer pattern on the substrate, a first insulation layer pattern on the first conductive layer pattern, a first semiconductor layer pattern on the first insulation layer pattern, a gate insulation layer pattern on the gate insulation layer pattern, a gate electrode on the gate insulation layer pattern, a planarization layer on the gate electrode, the planarization layer including a first protruding potion protruded in a first direction perpendicular to an upper surface of the substrate, a lower electrode on the first protruding portion, a pixel defining layer exposing at least a portion of the lower electrode, the pixel defining layer covering opposite side portions of the first protruding portion, a light emitting layer on the lower electrode, and an upper electrode on the light emitting layer.

Abstract: A steering linkage structure of a rear wheel device may include a housing receiving a screw nut integrally and rotatably connected to a driving motor, a steering shaft inserted in the housing and having a lead portion coupled to the screw nut that rotates and being movable left and right in the housing by the screw nut, and linkages coupled to the steering shaft to connect both ends of the steering shaft to rear wheels, in which coupling portions where the linkages are coupled to the steering shaft are inserted and protrude into and out of the housing, such that when a bending load is applied, the coupling portions support the bending load and are in contact with the housing.