Abstract: A clamp on type of an ultrasonic flow rate-measuring device attached to an outer wall and having an automatic pipe thickness measuring function is disclosed. The ultrasonic flow rate measuring-device includes an automatic pipe thickness measuring function. The ultrasonic flow rate-measuring device is fixed to the outer diameter of a pipe of which the material is known but the thickness is unknown. The ultrasonic flow rate-measuring device adopts a resonant frequency, which generates a maximum voltage level during frequency sweeping through the entire path.

Abstract: A memory apparatus includes a first memory bank, a second memory bank, a row decoder and repair circuit, and an input/output driver controller. The row decoder and repair circuit is coupled to the first and second memory banks in common. The row decoder and repair circuit generates a shared repair signal according to whether a word line disposed in a first memory bank is replaced with a word line disposed in a second memory bank. The input/output driver controller allows read or write operations for one of the first and second memory banks to be performed based on the shared repair signal and an operation signal.

Abstract: An organic light emitting diode display includes: a substrate including a first and a second gate electrode formed over a first and a second region, respectively, a first and a second gate insulator formed on the first and the second gate electrode, respectively, a first and a second semiconductor layer formed on the first and the second gate insulator, respectively, the first semiconductor layer including a first channel region, the second semiconductor layer including a second channel region, an interlayer insulator formed over the substrate and over at least part of the first and second semiconductor layers, a first and a second etching stop layer formed over the first and second channel regions, respectively, and surrounded by the interlayer insulator, and a first and a second source electrode and a first and a second drain electrode contacting the first and the second semiconductor layer, respectively, through the interlayer insulator.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: An AFS system for a vehicle may include a motor which has a hollow motor shaft, an input shaft connected with a steering wheel and rotatably and penetratively inserted into the motor shaft, a planetary gear set including a sun gear formed at a lower end portion of the motor shaft, upper planet gears that engage with the sun gear, lower planet gears connected coaxially with the upper planet gears, a ring gear that engages with the lower planet gears, a carrier connected with a lower end portion of the input shaft so as to transmit power and connected to the lower planet gears so as to transmit power, and an output shaft formed integrally with the ring gear and extending toward a lower side of the ring gear.

Abstract: An organic light emitting display device, including a substrate, a first conductive layer pattern on the substrate, a first insulation layer pattern on the first conductive layer pattern, a first semiconductor layer pattern on the first insulation layer pattern, a gate insulation layer pattern on the gate insulation layer pattern, a gate electrode on the gate insulation layer pattern, a planarization layer on the gate electrode, the planarization layer including a first protruding potion protruded in a first direction perpendicular to an upper surface of the substrate, a lower electrode on the first protruding portion, a pixel defining layer exposing at least a portion of the lower electrode, the pixel defining layer covering opposite side portions of the first protruding portion, a light emitting layer on the lower electrode, and an upper electrode on the light emitting layer.

Abstract: A steering linkage structure of a rear wheel device may include a housing receiving a screw nut integrally and rotatably connected to a driving motor, a steering shaft inserted in the housing and having a lead portion coupled to the screw nut that rotates and being movable left and right in the housing by the screw nut, and linkages coupled to the steering shaft to connect both ends of the steering shaft to rear wheels, in which coupling portions where the linkages are coupled to the steering shaft are inserted and protrude into and out of the housing, such that when a bending load is applied, the coupling portions support the bending load and are in contact with the housing.

Abstract: A display device integrated with a sensor includes a first substrate and a second substrate disposed while facing each other, and having exposed ends at different sides thereof, a sealing material configured to seal an overlapping region between the first and second substrates, a display unit including a plurality of pixels provided in a sealed region inside the sealing material, a sensor electrode unit formed on the second substrate, a first pad unit formed in an exposed part of the first substrate, and a second pad unit formed in an exposed part of the second substrate.

Abstract: An organic light emitting diode display includes: a substrate including a first and a second gate electrode formed over a first and a second region, respectively, a first and a second gate insulator formed on the first and the second gate electrode, respectively, a first and a second semiconductor layer formed on the first and the second gate insulator, respectively, the first semiconductor layer including a first channel region, the second semiconductor layer including a second channel region, an interlayer insulator formed over the substrate and over at least part of the first and second semiconductor layers, a first and a second etching stop layer formed over the first and second channel regions, respectively, and surrounded by the interlayer insulator, and a first and a second source electrode and a first and a second drain electrode contacting the first and the second semiconductor layer, respectively, through the interlayer insulator.

Abstract: A nonvolatile memory apparatus includes a memory cell array including a plurality of sub arrays. A plurality of analog-to-digital converters (ADCs) configured to sense sensing voltages outputted from memory cells of the plurality of sub arrays and a path selection unit configured to electrically couple the plurality of sub arrays with the plurality of ADCs in one-to-one correspondence in a first operation mode, and electrically couple the plurality of ADCs with a terminal of a power supply voltage in a second operation mode.

Abstract: Disclosed are a liquid crystal display device and a method for fabricating the same. The liquid crystal display device includes first and second substrates joined to and facing each other, a TFT formed in each pixel of an active area on the first substrate, a first discharge line formed in a non-active area on the first substrate, a protective layer formed over the entire surface of the first substrate, including the TFT and the first discharge line, a second discharge line surrounding an outer region of the first discharge line in the non-active area on the first substrate, a plurality of contact holes passing through the protective layer to expose a portion of the first discharge line, a connection pattern branching from the second discharge line, and covering the respective contact holes, and an electrostatic discharge layer formed on the outside surface of the second substrate.

Abstract: Methods and devices for a semiconductor device having conductive pads to prevent solder reflow are disclosed and may include a substrate comprising conductive pads of rectangular shape and neck-down portions on opposite sides of the rectangular shape, a semiconductor die comprising conductive pillars, and a solder electrically coupling the conductive pillars to the conductive pads. The neck-down portions may comprise a solder mask for the conductive pads to prevent solder from flowing in an unwanted direction on the conductive pads. The conductive pillars may comprise an elliptical cross-section with a minor axis length X and a major axis length Y. The major axis of the elliptical cross-section may be parallel to a long axis of the rectangular shape of the conductive pads. A decrease (W) in width of the conductive pads from the rectangular shape to the neck-down portions may be defined by X/5?W?X/2.

Abstract: In an organic light-emitting display apparatus for improving image quality and a method of manufacturing the same, the organic light-emitting display apparatus comprises a substrate, a first electrode disposed on the substrate, an intermediate layer disposed on the first electrode and including an organic emission layer, a second electrode disposed on the intermediate layer, and a reflective unit disposed near the intermediate layer and reflecting visible light emitted from the intermediate layer.

Abstract: A catch-up prevention method of an active front steering may include (a) judging whether an output of a power steering system is required in a vehicle to which the active front steering (AFS) is applied, (b) judging whether a steering angle of a steering wheel is increased to a preset predetermined angle or more, (c) judging whether an input speed of a pinion is larger than an output speed of the pinion, and (d) lowering a gear ratio of the active front steering when (a), (b) and (c) are satisfied.

Abstract: A display device includes a substrate, a first conductive film pattern including a gate electrode and a first capacitor electrode on the substrate, a gate insulating layer pattern on the first conductive film pattern, a polycrystalline silicon film pattern including an active layer and a second capacitor electrode on the gate insulating layer pattern, an interlayer insulating layer on the polycrystalline silicon film pattern, a plurality of first contact holes through the gate insulating layer pattern and the interlayer insulating layer to expose a portion of the first conductive film pattern, a plurality of second contact holes through the interlayer insulating layer to expose a portion of the polycrystalline silicon film pattern, and a second conductive film pattern including a source electrode, a drain electrode, and a pixel electrode on the interlayer insulating layer.

Abstract: Disclosed is a method for measuring a fiber content of polyethyleneterephthalate (PET) and polytrimethyleneterephthalate (PTT) fibers, particularly wherein the method includes: a qualitative analysis step of identifying a presence of polyethyleneterephthalate (PET) and polytrimethyleneterephthalate (PTT) fibers in a mixed-spun fiber product; and a quantitative analysis step of measuring the fiber content by a microscopic count through difference in color between PET and PTT fibers by birefringence in a cross polarization state of a polarized light microscope (PLM). Through the present invention, it is possible to simply and accurately calculate the fiber content of PET and PTT fibers in a mixed-spun fiber material in which various kinds of fibers are mixed.

Abstract: A crystallization apparatus for crystallizing a semiconductor layer formed on a substrate, the crystallization apparatus including: a laser generator, which generates a laser beam, and a stage on which the substrate is mounted, where the semiconductor layer is divided into a plurality of crystallization areas and a plurality of non-crystallization areas, and the laser beam is radiated onto the crystallization areas a plurality of times to crystallize the crystallization areas, where the laser beam is radiated onto different positions of the same crystallization area a plurality of times.

Abstract: Provided is an apparatus for testing the performance of carbon dioxide sorbents, the apparatus including: a reactor accommodating carbon dioxide sorbents therein; an injection part coupled with the reactor and injecting a gas mixture containing carbon dioxide into the reactor; a reaction furnace which is maintained at a preset temperature and into which the reactor is inserted; a discharge part coupled with the reactor and discharging exhaust gas generated after a reaction of the gas mixture and the sorbents out from the reactor; and analysis part analyzing a carbon dioxide concentration of the exhaust gas discharged from the discharge part, wherein the reactor includes a reactor for wet-type carbon dioxide sorbents and a reactor for dry-type carbon dioxide sorbents, and the reactor for wet-type carbon dioxide sorbents and the reactor for dry-type carbon dioxide sorbents can be alternately inserted into the reaction furnace.

Abstract: A steering linkage structure of a rear wheel device may include a housing receiving a screw nut integrally and rotatably connected to a driving motor, a steering shaft inserted in the housing and having a lead portion coupled to the screw nut that rotates and being movable left and right in the housing by the screw nut, and linkages coupled to the steering shaft to connect both ends of the steering shaft to rear wheels, in which coupling portions where the linkages are coupled to the steering shaft are inserted and protrude into and out of the housing, such that when a bending load is applied, the coupling portions support the bending load and are in contact with the housing.

Abstract: An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy layer, a third amorphous silicon layer pattern including first source and drain resistant contact layers on a predetermined region of the first active layer, second source and drain resistant contact layers on a predetermined region of the second active layer, and a capacitor amorphous dummy layer on the capacitor polycrystalline dummy layer, and a data metal layer pattern including first source/drain electrodes, second source/drain electrodes, and a second capacitor electrode.